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get rid of formatted_operands
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a97c89378e
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@ -330,10 +330,6 @@ def method2dot(mx, colors=None):
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operands = instruction.get_operands(ins_idx)
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output = ", ".join(_get_operand_html(i, registers, colors) for i in operands)
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formatted_operands = instruction.get_formatted_operands()
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if formatted_operands:
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output += " ; %s" % str(formatted_operands)
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bg_idx = colors["bg_idx"]
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if ins_idx == 0 and "bg_start_idx" in colors:
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bg_idx = colors["bg_start_idx"]
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@ -651,7 +647,7 @@ def method2json_direct(mx):
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c_ins = {"idx": ins_idx,
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"name": DVMBasicMethodBlockInstruction.get_name(),
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"operands": DVMBasicMethodBlockInstruction.get_operands(ins_idx),
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"formatted_operands": DVMBasicMethodBlockInstruction.get_formatted_operands()}
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}
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cblock["instructions"].append(c_ins)
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@ -4197,8 +4197,10 @@ class Instruction:
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Returns None if no operands, otherwise a List
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:return:
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.. deprecated:: 3.4.0
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Will be removed! This method always returns None
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"""
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warnings.warn("deprecated, this class will be removed!", DeprecationWarning)
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return None
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def get_hex(self):
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@ -4728,36 +4730,24 @@ class Instruction21h(Instruction):
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"""
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This class represents all instructions which have the 21h format
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"""
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length = 4
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def __init__(self, cm, buff):
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super().__init__()
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self.cm = cm
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# FIXME: the actual literal value should be BBBB0000: Move the given literal value (right-zero-extended to 32 bits) into the specified register.
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i16, self.BBBB = cm.packer["Hh"].unpack(buff[0:4])
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self.OP = i16 & 0xff
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self.AA = (i16 >> 8) & 0xff
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self.formatted_operands = []
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# FIXME: the actual literal value should be BBBB0000: Move the given literal value (right-zero-extended to 32/64 bits) into the specified register.
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# FIXME: the actual literal value should be BBBB0000 or BBBB00000000000: Move the given literal value (right-zero-extended to 32 bits) into the specified register.
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# The question is, if we should leave BBBB untouched and only show it in the formatted operands or not.
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if self.OP == 0x15:
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self.formatted_operands.append(cm.packer["i"].unpack(bytearray([0] * 2) + cm.packer["h"].pack(self.BBBB))[0])
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elif self.OP == 0x19:
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self.formatted_operands.append(cm.packer["q"].unpack(bytearray([0] * 6) + cm.packer["h"].pack(self.BBBB))[0])
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# OP 0x15: int16_t -> int32_t
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# OP 0x19: int16_t -> int64_t
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self.OP, self.AA, self.BBBB = cm.packer["BBh"].unpack(buff[:self.length])
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def get_output(self, idx=-1):
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return "v{}, {}{}".format(self.AA, self.BBBB,
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' # {}'.format(self.formatted_operands[0]) if self.formatted_operands else '')
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return "v{}, {}".format(self.AA, self.BBBB)
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def get_operands(self, idx=-1):
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return [(Operand.REGISTER, self.AA), (Operand.LITERAL, self.BBBB)]
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def get_formatted_operands(self):
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return self.formatted_operands
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def get_literals(self):
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return [self.BBBB]
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@ -5071,7 +5061,6 @@ class Instruction31i(Instruction):
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"""
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This class represents all instructions which have the 31i format
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"""
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length = 6
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def __init__(self, cm, buff):
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@ -5079,29 +5068,19 @@ class Instruction31i(Instruction):
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self.cm = cm
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self.OP, self.AA, self.BBBBBBBB = cm.packer["BBI"].unpack(buff[:self.length])
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self.formatted_operands = []
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if self.OP == 0x14:
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# const vAA, #+BBBBBBBB: arbitrary 32-bit constant
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# Show as hex (as it is often used for resources)
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self.formatted_operands.append(hex(self.BBBBBBBB))
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elif self.OP == 0x17:
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# const-wide/32 vAA, #+BBBBBBBB: signed int (32 bits)
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# FIXME: it would be better to have the signed variant in BBBBBBBB and not just in formatted
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self.formatted_operands.append(cm.packer["i"].unpack(cm.packer["I"].pack(self.BBBBBBBB))[0])
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# FIXME: value transformation
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# 0x14 // const vAA, #+BBBBBBBB: arbitrary 32-bit constant
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# 0x17 // const-wide/32 vAA, #+BBBBBBBB: signed int (32 bits)
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def get_output(self, idx=-1):
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#FIXME: on const-wide/32: it is actually a register pair vAA:vAA+1!
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#FIXME: the value must be sign extended to 64bit
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return "v{}, {}{}".format(self.AA, self.BBBBBBBB, ' # {}'.format(self.formatted_operands[0]) if self.formatted_operands else '')
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return "v{}, {}".format(self.AA, self.BBBBBBBB)
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def get_operands(self, idx=-1):
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return [(Operand.REGISTER, self.AA), (Operand.LITERAL, self.BBBBBBBB)]
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def get_formatted_operands(self):
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return self.formatted_operands
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return [self.BBBBBBBB]
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def get_raw(self):
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return self.cm.packer["BBI"].pack(self.OP, self.AA, self.BBBBBBBB)
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@ -402,29 +402,26 @@ class InstructionTest(unittest.TestCase):
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"""Test function of Instruction 21h used for const{,-wide}/high16"""
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ins = dvm.Instruction21h(MockClassManager(), bytearray([0x15, 0x00, 0x42, 0x11]))
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self.assertEqual(ins.get_op_value(), 0x15)
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self.assertEqual(ins.get_formatted_operands(), [0x11420000])
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self.assertEqual(ins.get_literals(), [0x1142])
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self.assertEqual(ins.get_operands(), [(dvm.Operand.REGISTER, 0x00), (dvm.Operand.LITERAL, 0x1142)])
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self.assertEqual(ins.get_name(), 'const/high16')
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self.assertEqual(ins.get_output(), 'v0, 4418 # 289538048')
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self.assertEqual(ins.get_output(), 'v0, 4418')
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self.assertEqual(ins.get_raw(), bytearray([0x15, 0x00, 0x42, 0x11]))
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ins = dvm.Instruction21h(MockClassManager(), bytearray([0x19, 0x00, 0x42, 0x11]))
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self.assertEqual(ins.get_op_value(), 0x19)
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self.assertEqual(ins.get_formatted_operands(), [0x1142000000000000])
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self.assertEqual(ins.get_literals(), [0x1142])
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self.assertEqual(ins.get_operands(), [(dvm.Operand.REGISTER, 0x00), (dvm.Operand.LITERAL, 0x1142)])
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self.assertEqual(ins.get_name(), 'const-wide/high16')
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self.assertEqual(ins.get_output(), 'v0, 4418 # 1243556447107678208')
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self.assertEqual(ins.get_output(), 'v0, 4418')
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self.assertEqual(ins.get_raw(), bytearray([0x19, 0x00, 0x42, 0x11]))
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ins = dvm.Instruction21h(MockClassManager(), bytearray([0x19, 0x00, 0xbe, 0xff]))
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self.assertEqual(ins.get_op_value(), 0x19)
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self.assertEqual(ins.get_formatted_operands(), [-0x42000000000000])
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self.assertEqual(ins.get_literals(), [-66])
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self.assertEqual(ins.get_operands(), [(dvm.Operand.REGISTER, 0x00), (dvm.Operand.LITERAL, -66)])
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self.assertEqual(ins.get_name(), 'const-wide/high16')
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self.assertEqual(ins.get_output(), 'v0, -66 # -18577348462903296')
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self.assertEqual(ins.get_output(), 'v0, -66')
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self.assertEqual(ins.get_raw(), bytearray([0x19, 0x00, 0xbe, 0xff]))
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def testInstruction11n(self):
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