capstone/MCInstrDesc.h

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//===-- llvm/MC/MCInstrDesc.h - Instruction Descriptors -*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file defines the MCOperandInfo and MCInstrDesc classes, which
// are used to describe target instructions and their operands.
//
//===----------------------------------------------------------------------===//
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/* Capstone Disassembly Engine */
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/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2019 */
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#ifndef CS_LLVM_MC_MCINSTRDESC_H
#define CS_LLVM_MC_MCINSTRDESC_H
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#include "MCRegisterInfo.h"
#include "capstone/platform.h"
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//===----------------------------------------------------------------------===//
// Machine Operand Flags and Description
//===----------------------------------------------------------------------===//
/// Operand constraints. These are encoded in 16 bits with one of the
/// low-order 3 bits specifying that a constraint is present and the
/// corresponding high-order hex digit specifying the constraint value.
/// This allows for a maximum of 3 constraints.
typedef enum {
MCOI_TIED_TO = 0, // Operand tied to another operand.
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MCOI_EARLY_CLOBBER // Operand is an early clobber register operand
} MCOI_OperandConstraint;
// Define a macro to produce each constraint value.
#define CONSTRAINT_MCOI_TIED_TO(op) \
((1 << MCOI_TIED_TO) | ((op) << (4 + MCOI_TIED_TO * 4)))
#define CONSTRAINT_MCOI_EARLY_CLOBBER \
(1 << MCOI_EARLY_CLOBBER)
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/// OperandFlags - These are flags set on operands, but should be considered
/// private, all access should go through the MCOperandInfo accessors.
/// See the accessors for a description of what these are.
enum MCOI_OperandFlags {
MCOI_LookupPtrRegClass = 0,
MCOI_Predicate,
MCOI_OptionalDef
};
/// Operand Type - Operands are tagged with one of the values of this enum.
enum MCOI_OperandType {
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MCOI_OPERAND_UNKNOWN = 0,
MCOI_OPERAND_IMMEDIATE = 1,
MCOI_OPERAND_REGISTER = 2,
MCOI_OPERAND_MEMORY = 3,
MCOI_OPERAND_PCREL = 4,
MCOI_OPERAND_FIRST_GENERIC = 6,
MCOI_OPERAND_GENERIC_0 = 6,
MCOI_OPERAND_GENERIC_1 = 7,
MCOI_OPERAND_GENERIC_2 = 8,
MCOI_OPERAND_GENERIC_3 = 9,
MCOI_OPERAND_GENERIC_4 = 10,
MCOI_OPERAND_GENERIC_5 = 11,
MCOI_OPERAND_LAST_GENERIC = 11,
MCOI_OPERAND_FIRST_GENERIC_IMM = 12,
MCOI_OPERAND_GENERIC_IMM_0 = 12,
MCOI_OPERAND_LAST_GENERIC_IMM = 12,
MCOI_OPERAND_FIRST_TARGET = 13,
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};
/// MCOperandInfo - This holds information about one operand of a machine
/// instruction, indicating the register class for register operands, etc.
///
typedef struct MCOperandInfo {
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/// This specifies the register class enumeration of the operand
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/// if the operand is a register. If isLookupPtrRegClass is set, then this is
/// an index that is passed to TargetRegisterInfo::getPointerRegClass(x) to
/// get a dynamic register class.
int16_t RegClass;
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/// These are flags from the MCOI::OperandFlags enum.
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uint8_t Flags;
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/// Information about the type of the operand.
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uint8_t OperandType;
Architecture updater (auto-sync) - Updating ARM (#1949) * Add auto-sync updater. * Update Capstone core with auto-sync changes. * Update ARM via auto-sync. * Make changes to arch modules which are introduced by auto-sync. * Update tests for ARM. * Fix build warnings for make * Remove meson.build * Print shift amount in decimal * Patch non LLVM register alias. * Change type of immediate operand to unsiged (due to: #771) * Replace all occurances of a register with its alias. * Fix printing of signed imms * Print rotate amount in decimal * CHange imm type to int64_t to match LLVM imm type. * Fix search for register names, by completing string first. * Print ModImm operands always in decimal * Use number format of previous capstone version. * Correct implicit writes and update_flags according to SBit. * Add missing test for RegImmShift * Reverse incorrect comparision. * Set shift information for move instructions. * Set mem access for all memory operands * Set subtracted flag if offset is negative. * Add flag for post-index memory operands. * Add detail op for BX_RET and MOVPCLR * Use instruction post_index operand. * Add VPOP and VPUSH as unique CS IDs. * Add shifting info for MOVsr. * Add TODOs. * Add in LLVM hardcoded operands to detail. * Move detail editing from InstPrinter to Mapping * Formatting * Add removed check. * Add writeback register and constraints to RFEI instructions. * Translate shift immediate * Print negative immediates * Remove duplicate invalid entry * Add CS groups to instructions * Fix write attriutes of stores. * Add missing names of added instructions * Fix LLVM bug * Add more post_index flags * http -> https * Make generated functions static * Remove tab prefix for alias instructions. * Set ValidateMCOperand to NULL. * Fix AddrMode3Operand operands * Allow getting system and banked register name via API * Add writeback to STC/LDC instructions. * Fix (hopefully) last case where disp is negative and subtracted = true * Remove accidentially introduced regressions
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/// The lower 3 bits are used to specify which constraints are set.
/// The higher 13 bits are used to specify the value of constraints (4 bits each).
uint16_t Constraints;
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/// Currently no other information.
} MCOperandInfo;
//===----------------------------------------------------------------------===//
// Machine Instruction Flags and Description
//===----------------------------------------------------------------------===//
/// MCInstrDesc flags - These should be considered private to the
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/// implementation of the MCInstrDesc class. Clients should use the predicate
/// methods on MCInstrDesc, not use these directly. These all correspond to
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/// bitfields in the MCInstrDesc::Flags field.
enum {
MCID_Variadic = 0,
MCID_HasOptionalDef,
MCID_Pseudo,
MCID_Return,
MCID_Call,
MCID_Barrier,
MCID_Terminator,
MCID_Branch,
MCID_IndirectBranch,
MCID_Compare,
MCID_MoveImm,
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MCID_MoveReg,
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MCID_Bitcast,
MCID_Select,
MCID_DelaySlot,
MCID_FoldableAsLoad,
MCID_MayLoad,
MCID_MayStore,
MCID_Predicable,
MCID_NotDuplicable,
MCID_UnmodeledSideEffects,
MCID_Commutable,
MCID_ConvertibleTo3Addr,
MCID_UsesCustomInserter,
MCID_HasPostISelHook,
MCID_Rematerializable,
MCID_CheapAsAMove,
MCID_ExtraSrcRegAllocReq,
MCID_ExtraDefRegAllocReq,
MCID_RegSequence,
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MCID_ExtractSubreg,
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MCID_InsertSubreg,
MCID_Convergent,
MCID_Add,
MCID_Trap,
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};
/// MCInstrDesc - Describe properties that are true of each instruction in the
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/// target description file. This captures information about side effects,
/// register use and many other things. There is one instance of this struct
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/// for each target instruction class, and the MachineInstr class points to
/// this struct directly to describe itself.
typedef struct MCInstrDesc {
unsigned char NumOperands; // Num of args (may be more if variable_ops)
Constify backend data (#1040) * Constify string literals Use -Wwrite-strings to force string literals to be of type "const char[]", then fix up all warning fallout. * Constify common infrastructure Step one in allowing backend data to be readonly. Minimal changes to backends for now; just set all pointers in common structs that aren't modified to const. * Constify AArch64 backend Section size changes within libcapstone.so are -.rodata 602587 -.data.rel.ro 228416 -.data 1003746 +.rodata 769051 +.data.rel.ro 241120 +.data 824578 * Constify ARM backend Section size changes within libcapstone.so are -.rodata 769051 -.data.rel.ro 241120 -.data 824578 +.rodata 959835 +.data.rel.ro 245120 +.data 629506 * Constify Mips backend Section size changes within libcapstone.so are -.rodata 959835 -.data.rel.ro 245120 -.data 629506 +.rodata 1069851 +.data.rel.ro 256416 +.data 508194 * Constify PowerPC backend Section size changes within libcapstone.so are -.rodata 1069851 -.data.rel.ro 256416 -.data 508194 +.rodata 1142715 +.data.rel.ro 272224 +.data 419490 * Constify Sparc backend Section size changes within libcapstone.so are -.rodata 1142715 -.data.rel.ro 272224 -.data 419490 +.rodata 1175227 +.data.rel.ro 277536 +.data 381666 * Constify SystemZ backend Section size changes within libcapstone.so are -.rodata 1175227 -.data.rel.ro 277536 -.data 381666 +.rodata 1221883 +.data.rel.ro 278016 +.data 334498 * Constify X86 backend Section size changes within libcapstone.so are -.rodata 1221883 -.data.rel.ro 278016 -.data 334498 +.rodata 1533531 +.data.rel.ro 281184 +.data 19714 * Constify XCore backend Section size changes within libcapstone.so are -.rodata 1533531 -.data.rel.ro 281184 -.data 19714 +.rodata 1553026 +.data.rel.ro 281280 +.data 40
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const MCOperandInfo *OpInfo; // 'NumOperands' entries about operands
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} MCInstrDesc;
Constify backend data (#1040) * Constify string literals Use -Wwrite-strings to force string literals to be of type "const char[]", then fix up all warning fallout. * Constify common infrastructure Step one in allowing backend data to be readonly. Minimal changes to backends for now; just set all pointers in common structs that aren't modified to const. * Constify AArch64 backend Section size changes within libcapstone.so are -.rodata 602587 -.data.rel.ro 228416 -.data 1003746 +.rodata 769051 +.data.rel.ro 241120 +.data 824578 * Constify ARM backend Section size changes within libcapstone.so are -.rodata 769051 -.data.rel.ro 241120 -.data 824578 +.rodata 959835 +.data.rel.ro 245120 +.data 629506 * Constify Mips backend Section size changes within libcapstone.so are -.rodata 959835 -.data.rel.ro 245120 -.data 629506 +.rodata 1069851 +.data.rel.ro 256416 +.data 508194 * Constify PowerPC backend Section size changes within libcapstone.so are -.rodata 1069851 -.data.rel.ro 256416 -.data 508194 +.rodata 1142715 +.data.rel.ro 272224 +.data 419490 * Constify Sparc backend Section size changes within libcapstone.so are -.rodata 1142715 -.data.rel.ro 272224 -.data 419490 +.rodata 1175227 +.data.rel.ro 277536 +.data 381666 * Constify SystemZ backend Section size changes within libcapstone.so are -.rodata 1175227 -.data.rel.ro 277536 -.data 381666 +.rodata 1221883 +.data.rel.ro 278016 +.data 334498 * Constify X86 backend Section size changes within libcapstone.so are -.rodata 1221883 -.data.rel.ro 278016 -.data 334498 +.rodata 1533531 +.data.rel.ro 281184 +.data 19714 * Constify XCore backend Section size changes within libcapstone.so are -.rodata 1533531 -.data.rel.ro 281184 -.data 19714 +.rodata 1553026 +.data.rel.ro 281280 +.data 40
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bool MCOperandInfo_isPredicate(const MCOperandInfo *m);
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Constify backend data (#1040) * Constify string literals Use -Wwrite-strings to force string literals to be of type "const char[]", then fix up all warning fallout. * Constify common infrastructure Step one in allowing backend data to be readonly. Minimal changes to backends for now; just set all pointers in common structs that aren't modified to const. * Constify AArch64 backend Section size changes within libcapstone.so are -.rodata 602587 -.data.rel.ro 228416 -.data 1003746 +.rodata 769051 +.data.rel.ro 241120 +.data 824578 * Constify ARM backend Section size changes within libcapstone.so are -.rodata 769051 -.data.rel.ro 241120 -.data 824578 +.rodata 959835 +.data.rel.ro 245120 +.data 629506 * Constify Mips backend Section size changes within libcapstone.so are -.rodata 959835 -.data.rel.ro 245120 -.data 629506 +.rodata 1069851 +.data.rel.ro 256416 +.data 508194 * Constify PowerPC backend Section size changes within libcapstone.so are -.rodata 1069851 -.data.rel.ro 256416 -.data 508194 +.rodata 1142715 +.data.rel.ro 272224 +.data 419490 * Constify Sparc backend Section size changes within libcapstone.so are -.rodata 1142715 -.data.rel.ro 272224 -.data 419490 +.rodata 1175227 +.data.rel.ro 277536 +.data 381666 * Constify SystemZ backend Section size changes within libcapstone.so are -.rodata 1175227 -.data.rel.ro 277536 -.data 381666 +.rodata 1221883 +.data.rel.ro 278016 +.data 334498 * Constify X86 backend Section size changes within libcapstone.so are -.rodata 1221883 -.data.rel.ro 278016 -.data 334498 +.rodata 1533531 +.data.rel.ro 281184 +.data 19714 * Constify XCore backend Section size changes within libcapstone.so are -.rodata 1533531 -.data.rel.ro 281184 -.data 19714 +.rodata 1553026 +.data.rel.ro 281280 +.data 40
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bool MCOperandInfo_isOptionalDef(const MCOperandInfo *m);
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bool MCOperandInfo_isTiedToOp(const MCOperandInfo *m);
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int MCOperandInfo_getOperandConstraint(const MCInstrDesc *OpInfo,
unsigned OpNum,
MCOI_OperandConstraint Constraint);
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#endif