2016-07-15 12:37:19 +00:00
|
|
|
.DS_Store
|
|
|
|
|
|
2013-11-27 02:32:11 +00:00
|
|
|
# Object files
|
|
|
|
|
*.o
|
|
|
|
|
*.ko
|
|
|
|
|
|
2014-05-10 14:05:49 +00:00
|
|
|
# Gcc dependency-tracking files
|
|
|
|
|
*.d
|
|
|
|
|
|
2013-11-27 02:32:11 +00:00
|
|
|
# Libraries
|
|
|
|
|
*.lib
|
|
|
|
|
*.a
|
|
|
|
|
|
|
|
|
|
# Shared objects (inc. Windows DLLs)
|
|
|
|
|
*.dll
|
|
|
|
|
*.so
|
|
|
|
|
*.so.*
|
|
|
|
|
*.dylib
|
|
|
|
|
|
|
|
|
|
# Executables
|
|
|
|
|
*.exe
|
|
|
|
|
*.out
|
|
|
|
|
*.app
|
2013-11-28 07:45:57 +00:00
|
|
|
|
|
|
|
|
# python
|
|
|
|
|
bindings/python/build/
|
2015-06-20 06:20:27 +00:00
|
|
|
bindings/python/capstone.egg-info/
|
2013-11-28 07:45:57 +00:00
|
|
|
*.pyc
|
|
|
|
|
|
|
|
|
|
# java
|
|
|
|
|
bindings/java/capstone.jar
|
|
|
|
|
|
2014-06-26 14:10:41 +00:00
|
|
|
# ocaml
|
|
|
|
|
bindings/ocaml/*.cmi
|
|
|
|
|
bindings/ocaml/*.cmx
|
|
|
|
|
bindings/ocaml/*.cmxa
|
|
|
|
|
bindings/ocaml/*.mli
|
|
|
|
|
bindings/ocaml/test
|
|
|
|
|
bindings/ocaml/test_arm
|
|
|
|
|
bindings/ocaml/test_arm64
|
M680X: Target ready for pull request (#1034)
* Added new M680X target. Supports M6800/1/2/3/9, HD6301
* M680X: Reformat for coding guide lines. Set alphabetical order in HACK.TXT
* M680X: Prepare for python binding. Move cs_m680x, m680x_insn to m680x_info. Chec
> k cpu type, no default.
* M680X: Add python bindings. Added python tests.
* M680X: Added cpu types to usage message.
* cstool: Avoid segfault for invalid <arch+mode>.
* Make test_m680x.c/test_m680x.py output comparable (diff params: -bu). Keep xprint.py untouched.
* M680X: Update CMake/make for m680x support. Update .gitignore.
* M680X: Reduce compiler warnings.
* M680X: Reduce compiler warnings.
* M680X: Reduce compiler warnings.
* M680X: Make test_m680x.c/test_m680x.py output comparable (diff params: -bu).
* M680X: Add ocaml bindings and tests.
* M680X: Add java bindings and tests.
* M680X: Added tests for all indexed addressing modes. C/Python/Ocaml
* M680X: Naming, use page1 for PAGE1 instructions (without prefix).
* M680X: Naming, use page1 for PAGE1 instructions (without prefix).
* M680X: Used M680X_FIRST_OP_IN_MNEM in tests C/python/java/ocaml.
* M680X: Added access property to cs_m680x_op.
* M680X: Added operand size.
* M680X: Remove compiler warnings.
* M680X: Added READ/WRITE access property per operator.
* M680X: Make reg_inherent_hdlr independent of CPU type.
* M680X: Add HD6309 support + bug fixes
* M680X: Remove errors and warning.
* M680X: Add Bcc/LBcc to group BRAREL (relative branch).
* M680X: Add group JUMP to BVS/BVC/LBVS/LBVC. Remove BRAREL from BRN/LBRN.
* M680X: Remove LBRN from group BRAREL.
* M680X: Refactored cpu_type initialization for better readability.
* M680X: Add two operands for insn having two reg. in mnemonic. e.g. ABX.
* M680X: Remove typo in cstool.c
* M680X: Some format improvements in changed_regs.
* M680X: Remove insn id string list from tests (C/python/java/ocaml).
* M680X: SEXW, set access of reg. D to WRITE.
* M680X: Sort changed_regs in increasing m680x_insn order.
* M680X: Add M68HC11 support + Reduced from two to one INDEXED operand.
* M680X: cstool, also write '(in mnemonic)' for second reg. operand.
* M680X: Add BRN/LBRN to group JUMP and BRAREL.
* M680X: For Bcc/LBcc/BRSET/BRCLR set reg. CC to read access.
* M680X: Correctly print negative immediate values with option CS_OPT_UNSIGNED.
* M680X: Rename some instruction handlers.
* M680X: Add M68HC05 support.
* M680X: Dont print prefix '<' for direct addr. mode.
* M680X: Add M68HC08 support + resorted tables + bug fixes.
* M680X: Add Freescale HCS08 support.
* M680X: Changed group names, avoid spaces.
* M680X: Refactoring, rename addessing mode handlers.
* M680X: indexed addr. mode, changed pre/post inc-/decrement representation.
* M680X: Rename some M6809/HD6309 specific functions.
* M680X: Add CPU12 (68HC12/HCS12) support.
* M680X: Correctly display illegal instruction as FCB .
* M680X: bugfix: BRA/BRN/BSR/LBRA/LBRN/LBSR does not read CC reg.
* M680X: bugfix: Correctly check for sufficient code size for M6809 indexed addressing.
* M680X: Better support for changing insn id within handler for addessing mode.
* M680X: Remove warnings.
* M680X: In set_changed_regs_read_write_counts use own access_mode.
* M680X: Split cpu specific tables into separate *.inc files.
* M680X: Remove warnings.
* M680X: Removed address_mode. Addressing mode is available in operand.type
* M680X: Bugfix: BSET/BCLR/BRSET/BRCLR correct read/modify CC reg.
* M680X: Remove register TMP1. It is first visible in CPU12X.
* M680X: Performance improvement + bug fixes.
* M680X: Performance improvement, make cpu_tables const static.
* M680X: Simplify operand decoding by using two handlers.
* M680X: Replace M680X_OP_INDEX by M680X_OP_CONSTANT + bugfix in java/python/ocaml bindings.
* M680X: Format with astyle.
* M680X: Update documentation.
* M680X: Corrected author for m680x specific files.
* M680X: Make max. number of architectures single source.
2017-10-21 13:44:36 +00:00
|
|
|
bindings/ocaml/test_basic
|
2014-06-26 14:10:41 +00:00
|
|
|
bindings/ocaml/test_mips
|
|
|
|
|
bindings/ocaml/test_x86
|
|
|
|
|
bindings/ocaml/test_detail
|
2014-08-19 15:11:04 +00:00
|
|
|
bindings/ocaml/test_ppc
|
|
|
|
|
bindings/ocaml/test_sparc
|
|
|
|
|
bindings/ocaml/test_systemz
|
|
|
|
|
bindings/ocaml/test_xcore
|
M680X: Target ready for pull request (#1034)
* Added new M680X target. Supports M6800/1/2/3/9, HD6301
* M680X: Reformat for coding guide lines. Set alphabetical order in HACK.TXT
* M680X: Prepare for python binding. Move cs_m680x, m680x_insn to m680x_info. Chec
> k cpu type, no default.
* M680X: Add python bindings. Added python tests.
* M680X: Added cpu types to usage message.
* cstool: Avoid segfault for invalid <arch+mode>.
* Make test_m680x.c/test_m680x.py output comparable (diff params: -bu). Keep xprint.py untouched.
* M680X: Update CMake/make for m680x support. Update .gitignore.
* M680X: Reduce compiler warnings.
* M680X: Reduce compiler warnings.
* M680X: Reduce compiler warnings.
* M680X: Make test_m680x.c/test_m680x.py output comparable (diff params: -bu).
* M680X: Add ocaml bindings and tests.
* M680X: Add java bindings and tests.
* M680X: Added tests for all indexed addressing modes. C/Python/Ocaml
* M680X: Naming, use page1 for PAGE1 instructions (without prefix).
* M680X: Naming, use page1 for PAGE1 instructions (without prefix).
* M680X: Used M680X_FIRST_OP_IN_MNEM in tests C/python/java/ocaml.
* M680X: Added access property to cs_m680x_op.
* M680X: Added operand size.
* M680X: Remove compiler warnings.
* M680X: Added READ/WRITE access property per operator.
* M680X: Make reg_inherent_hdlr independent of CPU type.
* M680X: Add HD6309 support + bug fixes
* M680X: Remove errors and warning.
* M680X: Add Bcc/LBcc to group BRAREL (relative branch).
* M680X: Add group JUMP to BVS/BVC/LBVS/LBVC. Remove BRAREL from BRN/LBRN.
* M680X: Remove LBRN from group BRAREL.
* M680X: Refactored cpu_type initialization for better readability.
* M680X: Add two operands for insn having two reg. in mnemonic. e.g. ABX.
* M680X: Remove typo in cstool.c
* M680X: Some format improvements in changed_regs.
* M680X: Remove insn id string list from tests (C/python/java/ocaml).
* M680X: SEXW, set access of reg. D to WRITE.
* M680X: Sort changed_regs in increasing m680x_insn order.
* M680X: Add M68HC11 support + Reduced from two to one INDEXED operand.
* M680X: cstool, also write '(in mnemonic)' for second reg. operand.
* M680X: Add BRN/LBRN to group JUMP and BRAREL.
* M680X: For Bcc/LBcc/BRSET/BRCLR set reg. CC to read access.
* M680X: Correctly print negative immediate values with option CS_OPT_UNSIGNED.
* M680X: Rename some instruction handlers.
* M680X: Add M68HC05 support.
* M680X: Dont print prefix '<' for direct addr. mode.
* M680X: Add M68HC08 support + resorted tables + bug fixes.
* M680X: Add Freescale HCS08 support.
* M680X: Changed group names, avoid spaces.
* M680X: Refactoring, rename addessing mode handlers.
* M680X: indexed addr. mode, changed pre/post inc-/decrement representation.
* M680X: Rename some M6809/HD6309 specific functions.
* M680X: Add CPU12 (68HC12/HCS12) support.
* M680X: Correctly display illegal instruction as FCB .
* M680X: bugfix: BRA/BRN/BSR/LBRA/LBRN/LBSR does not read CC reg.
* M680X: bugfix: Correctly check for sufficient code size for M6809 indexed addressing.
* M680X: Better support for changing insn id within handler for addessing mode.
* M680X: Remove warnings.
* M680X: In set_changed_regs_read_write_counts use own access_mode.
* M680X: Split cpu specific tables into separate *.inc files.
* M680X: Remove warnings.
* M680X: Removed address_mode. Addressing mode is available in operand.type
* M680X: Bugfix: BSET/BCLR/BRSET/BRCLR correct read/modify CC reg.
* M680X: Remove register TMP1. It is first visible in CPU12X.
* M680X: Performance improvement + bug fixes.
* M680X: Performance improvement, make cpu_tables const static.
* M680X: Simplify operand decoding by using two handlers.
* M680X: Replace M680X_OP_INDEX by M680X_OP_CONSTANT + bugfix in java/python/ocaml bindings.
* M680X: Format with astyle.
* M680X: Update documentation.
* M680X: Corrected author for m680x specific files.
* M680X: Make max. number of architectures single source.
2017-10-21 13:44:36 +00:00
|
|
|
bindings/ocaml/test_m680x
|
2014-08-19 15:11:04 +00:00
|
|
|
|
2014-06-26 14:10:41 +00:00
|
|
|
|
2013-11-28 07:45:57 +00:00
|
|
|
# test binaries
|
2015-06-07 07:56:34 +00:00
|
|
|
tests/test_basic
|
2013-11-28 07:45:57 +00:00
|
|
|
tests/test_detail
|
2014-10-12 22:47:16 +00:00
|
|
|
tests/test_iter
|
2013-11-28 07:45:57 +00:00
|
|
|
tests/test_arm
|
|
|
|
|
tests/test_arm64
|
|
|
|
|
tests/test_mips
|
|
|
|
|
tests/test_x86
|
2014-01-04 16:00:05 +00:00
|
|
|
tests/test_ppc
|
2014-05-10 14:05:49 +00:00
|
|
|
tests/test_skipdata
|
2014-03-10 07:03:16 +00:00
|
|
|
tests/test_sparc
|
2014-03-26 06:59:53 +00:00
|
|
|
tests/test_systemz
|
2014-05-26 15:47:04 +00:00
|
|
|
tests/test_xcore
|
2014-01-09 06:28:05 +00:00
|
|
|
tests/*.static
|
2015-09-30 02:51:22 +00:00
|
|
|
tests/test_customized_mnem
|
2018-04-03 15:03:56 +00:00
|
|
|
tests/test_m68k
|
|
|
|
|
tests/test_tms320c64x
|
M680X: Target ready for pull request (#1034)
* Added new M680X target. Supports M6800/1/2/3/9, HD6301
* M680X: Reformat for coding guide lines. Set alphabetical order in HACK.TXT
* M680X: Prepare for python binding. Move cs_m680x, m680x_insn to m680x_info. Chec
> k cpu type, no default.
* M680X: Add python bindings. Added python tests.
* M680X: Added cpu types to usage message.
* cstool: Avoid segfault for invalid <arch+mode>.
* Make test_m680x.c/test_m680x.py output comparable (diff params: -bu). Keep xprint.py untouched.
* M680X: Update CMake/make for m680x support. Update .gitignore.
* M680X: Reduce compiler warnings.
* M680X: Reduce compiler warnings.
* M680X: Reduce compiler warnings.
* M680X: Make test_m680x.c/test_m680x.py output comparable (diff params: -bu).
* M680X: Add ocaml bindings and tests.
* M680X: Add java bindings and tests.
* M680X: Added tests for all indexed addressing modes. C/Python/Ocaml
* M680X: Naming, use page1 for PAGE1 instructions (without prefix).
* M680X: Naming, use page1 for PAGE1 instructions (without prefix).
* M680X: Used M680X_FIRST_OP_IN_MNEM in tests C/python/java/ocaml.
* M680X: Added access property to cs_m680x_op.
* M680X: Added operand size.
* M680X: Remove compiler warnings.
* M680X: Added READ/WRITE access property per operator.
* M680X: Make reg_inherent_hdlr independent of CPU type.
* M680X: Add HD6309 support + bug fixes
* M680X: Remove errors and warning.
* M680X: Add Bcc/LBcc to group BRAREL (relative branch).
* M680X: Add group JUMP to BVS/BVC/LBVS/LBVC. Remove BRAREL from BRN/LBRN.
* M680X: Remove LBRN from group BRAREL.
* M680X: Refactored cpu_type initialization for better readability.
* M680X: Add two operands for insn having two reg. in mnemonic. e.g. ABX.
* M680X: Remove typo in cstool.c
* M680X: Some format improvements in changed_regs.
* M680X: Remove insn id string list from tests (C/python/java/ocaml).
* M680X: SEXW, set access of reg. D to WRITE.
* M680X: Sort changed_regs in increasing m680x_insn order.
* M680X: Add M68HC11 support + Reduced from two to one INDEXED operand.
* M680X: cstool, also write '(in mnemonic)' for second reg. operand.
* M680X: Add BRN/LBRN to group JUMP and BRAREL.
* M680X: For Bcc/LBcc/BRSET/BRCLR set reg. CC to read access.
* M680X: Correctly print negative immediate values with option CS_OPT_UNSIGNED.
* M680X: Rename some instruction handlers.
* M680X: Add M68HC05 support.
* M680X: Dont print prefix '<' for direct addr. mode.
* M680X: Add M68HC08 support + resorted tables + bug fixes.
* M680X: Add Freescale HCS08 support.
* M680X: Changed group names, avoid spaces.
* M680X: Refactoring, rename addessing mode handlers.
* M680X: indexed addr. mode, changed pre/post inc-/decrement representation.
* M680X: Rename some M6809/HD6309 specific functions.
* M680X: Add CPU12 (68HC12/HCS12) support.
* M680X: Correctly display illegal instruction as FCB .
* M680X: bugfix: BRA/BRN/BSR/LBRA/LBRN/LBSR does not read CC reg.
* M680X: bugfix: Correctly check for sufficient code size for M6809 indexed addressing.
* M680X: Better support for changing insn id within handler for addessing mode.
* M680X: Remove warnings.
* M680X: In set_changed_regs_read_write_counts use own access_mode.
* M680X: Split cpu specific tables into separate *.inc files.
* M680X: Remove warnings.
* M680X: Removed address_mode. Addressing mode is available in operand.type
* M680X: Bugfix: BSET/BCLR/BRSET/BRCLR correct read/modify CC reg.
* M680X: Remove register TMP1. It is first visible in CPU12X.
* M680X: Performance improvement + bug fixes.
* M680X: Performance improvement, make cpu_tables const static.
* M680X: Simplify operand decoding by using two handlers.
* M680X: Replace M680X_OP_INDEX by M680X_OP_CONSTANT + bugfix in java/python/ocaml bindings.
* M680X: Format with astyle.
* M680X: Update documentation.
* M680X: Corrected author for m680x specific files.
* M680X: Make max. number of architectures single source.
2017-10-21 13:44:36 +00:00
|
|
|
tests/test_m680x
|
2018-04-03 15:03:56 +00:00
|
|
|
tests/test_evm
|
2019-01-22 07:31:39 +00:00
|
|
|
tests/test_mos65xx
|
2013-11-28 07:45:57 +00:00
|
|
|
|
2015-11-19 06:36:54 +00:00
|
|
|
# regress binaries
|
|
|
|
|
suite/regress/invalid_read_in_print_operand
|
|
|
|
|
|
2013-11-28 07:45:57 +00:00
|
|
|
# vim tmp file
|
|
|
|
|
*.swp
|
2014-05-14 13:54:09 +00:00
|
|
|
*~
|
2013-12-03 05:40:11 +00:00
|
|
|
|
|
|
|
|
capstone.pc
|
2013-12-16 02:31:41 +00:00
|
|
|
|
|
|
|
|
# local files
|
|
|
|
|
_*
|
2014-03-31 00:21:34 +00:00
|
|
|
|
|
|
|
|
# freebsd ports: generated file with "make makesum" command
|
|
|
|
|
packages/freebsd/ports/devel/capstone/distinfo
|
2014-05-14 13:54:09 +00:00
|
|
|
|
|
|
|
|
# VisualStudio
|
2016-09-27 15:05:06 +00:00
|
|
|
ProjectUpgradeLog.log
|
2014-08-26 10:46:42 +00:00
|
|
|
Debug/
|
|
|
|
|
Release/
|
|
|
|
|
ipch/
|
2016-12-16 17:43:32 +00:00
|
|
|
build*/
|
2014-05-14 13:54:09 +00:00
|
|
|
*.sdf
|
|
|
|
|
*.opensdf
|
|
|
|
|
*.suo
|
2014-05-16 07:47:52 +00:00
|
|
|
*.user
|
2016-09-27 15:05:06 +00:00
|
|
|
*.backup
|
2016-04-10 05:35:52 +00:00
|
|
|
*.VC.db
|
|
|
|
|
*.VC.opendb
|
2014-07-31 10:24:51 +00:00
|
|
|
|
2016-06-23 14:53:07 +00:00
|
|
|
# CMake build directories
|
|
|
|
|
build*/
|
|
|
|
|
|
2014-10-02 20:28:09 +00:00
|
|
|
# Xcode
|
|
|
|
|
xcode/Capstone.xcodeproj/xcuserdata
|
2015-04-07 18:58:43 +00:00
|
|
|
xcode/Capstone.xcodeproj/project.xcworkspace/xcuserdata
|
2014-10-02 20:28:09 +00:00
|
|
|
|
2014-07-31 10:24:51 +00:00
|
|
|
# suite/
|
|
|
|
|
test_arm_regression
|
|
|
|
|
test_arm_regression.o
|
2015-06-16 09:32:03 +00:00
|
|
|
fuzz_harness
|
2015-09-30 02:51:22 +00:00
|
|
|
test_iter_benchmark
|
2018-12-19 04:16:31 +00:00
|
|
|
fuzz_bindisasm
|
|
|
|
|
fuzz_disasm
|
2019-01-09 05:45:29 +00:00
|
|
|
capstone_get_setup
|
2015-06-16 09:32:03 +00:00
|
|
|
|
2014-10-12 23:27:16 +00:00
|
|
|
|
2014-12-26 08:49:10 +00:00
|
|
|
*.s
|
2016-10-10 16:06:07 +00:00
|
|
|
|
|
|
|
|
cstool/cstool
|