2013-11-27 04:11:31 +00:00
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/* Capstone Disassembler Engine */
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/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013> */
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <capstone.h>
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#include "cs_priv.h"
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#include "MCRegisterInfo.h"
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#include "arch/X86/X86Disassembler.h"
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#include "arch/X86/X86InstPrinter.h"
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#include "arch/X86/mapping.h"
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#include "arch/ARM/ARMDisassembler.h"
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#include "arch/ARM/ARMInstPrinter.h"
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#include "arch/ARM/mapping.h"
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#include "arch/Mips/MipsDisassembler.h"
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#include "arch/Mips/MipsInstPrinter.h"
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#include "arch/Mips/mapping.h"
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#include "arch/AArch64/AArch64Disassembler.h"
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#include "arch/AArch64/AArch64InstPrinter.h"
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#include "arch/AArch64/mapping.h"
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#include "utils.h"
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2013-12-03 04:27:46 +00:00
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// Package version
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#define PKG_MAJOR 1
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#define PKG_MINOR 0
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// API version
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#define API_MAJOR 1
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2013-12-04 15:08:32 +00:00
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#define API_MINOR 7
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2013-11-27 04:11:31 +00:00
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cs_err cs_errno(csh handle)
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{
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if (!handle)
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return CS_ERR_CSH;
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cs_struct *ud = (cs_struct *)(uintptr_t)handle;
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2013-11-27 07:24:47 +00:00
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return ud->errnum;
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2013-11-27 04:11:31 +00:00
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}
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void cs_version(int *major, int *minor)
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{
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2013-12-03 04:27:46 +00:00
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*major = API_MAJOR;
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*minor = API_MINOR;
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2013-11-27 04:11:31 +00:00
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}
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cs_err cs_open(cs_arch arch, cs_mode mode, csh *handle)
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{
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cs_struct *ud;
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ud = calloc(1, sizeof(*ud));
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if (!ud) {
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// memory insufficient
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return CS_ERR_MEM;
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}
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2013-11-27 07:24:47 +00:00
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ud->errnum = CS_ERR_OK;
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2013-11-27 04:11:31 +00:00
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ud->arch = arch;
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ud->mode = mode;
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ud->big_endian = mode & CS_MODE_BIG_ENDIAN;
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ud->reg_name = NULL;
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switch (ud->arch) {
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case CS_ARCH_X86:
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2013-12-03 13:00:09 +00:00
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// by default, we use Intel syntax
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ud->printer = X86_Intel_printInst;
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2013-11-27 04:11:31 +00:00
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ud->printer_info = NULL;
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ud->disasm = X86_getInstruction;
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ud->reg_name = X86_reg_name;
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ud->insn_id = X86_get_insn_id;
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ud->insn_name = X86_insn_name;
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break;
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case CS_ARCH_ARM: {
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MCRegisterInfo *mri = malloc(sizeof(*mri));
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ARM_init(mri);
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ud->printer = ARM_printInst;
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ud->printer_info = mri;
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ud->reg_name = ARM_reg_name;
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ud->insn_id = ARM_get_insn_id;
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ud->insn_name = ARM_insn_name;
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ud->post_printer = ARM_post_printer;
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if (ud->mode & CS_MODE_THUMB)
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ud->disasm = Thumb_getInstruction;
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else
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ud->disasm = ARM_getInstruction;
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break;
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}
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case CS_ARCH_MIPS: {
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MCRegisterInfo *mri = malloc(sizeof(*mri));
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Mips_init(mri);
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ud->printer = Mips_printInst;
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ud->printer_info = mri;
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ud->getinsn_info = mri;
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ud->reg_name = Mips_reg_name;
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ud->insn_id = Mips_get_insn_id;
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ud->insn_name = Mips_insn_name;
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if (ud->mode & CS_MODE_32)
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ud->disasm = Mips_getInstruction;
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else
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ud->disasm = Mips64_getInstruction;
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if (ud->mode & CS_MODE_MICRO)
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ud->micro_mips = true;
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break;
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}
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case CS_ARCH_ARM64: {
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MCRegisterInfo *mri = malloc(sizeof(*mri));
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AArch64_init(mri);
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ud->printer = AArch64_printInst;
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ud->printer_info = mri;
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ud->getinsn_info = mri;
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ud->disasm = AArch64_getInstruction;
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ud->reg_name = AArch64_reg_name;
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ud->insn_id = AArch64_get_insn_id;
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ud->insn_name = AArch64_insn_name;
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ud->post_printer = AArch64_post_printer;
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break;
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}
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default: // unsupported architecture
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free(ud);
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return CS_ERR_ARCH;
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}
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*handle = (uintptr_t)ud;
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return CS_ERR_OK;
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}
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cs_err cs_close(csh handle)
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{
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if (!handle)
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return CS_ERR_CSH;
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cs_struct *ud = (cs_struct *)(uintptr_t)handle;
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switch (ud->arch) {
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case CS_ARCH_X86:
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break;
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case CS_ARCH_ARM:
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case CS_ARCH_MIPS:
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case CS_ARCH_ARM64:
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free(ud->printer_info);
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break;
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default: // unsupported architecture
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return CS_ERR_HANDLE;
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}
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memset(ud, 0, sizeof(*ud));
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free(ud);
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return CS_ERR_OK;
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}
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2013-12-04 14:57:04 +00:00
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#define MIN(x, y) ((x) < (y) ? (x) : (y))
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2013-11-27 04:11:31 +00:00
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// fill insn with mnemonic & operands info
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static void fill_insn(cs_struct *handle, cs_insn *insn, char *buffer, MCInst *mci,
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2013-12-04 06:11:32 +00:00
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PostPrinter_t printer, unsigned char *code)
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2013-11-27 04:11:31 +00:00
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{
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memcpy(insn, &mci->pub_insn, sizeof(*insn));
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// map internal instruction opcode to public insn ID
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2013-11-30 08:23:31 +00:00
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if (handle->insn_id)
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handle->insn_id(insn, MCInst_getOpcode(mci));
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// alias instruction might have ID saved in OpcodePub
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2013-11-29 16:54:24 +00:00
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if (MCInst_getOpcodePub(mci))
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2013-11-30 08:23:31 +00:00
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insn->id = MCInst_getOpcodePub(mci);
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2013-11-27 04:11:31 +00:00
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if (printer)
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printer(insn->id, insn, buffer);
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// fill in mnemonic & operands
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char *tab = strchr(buffer, '\t');
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if (tab) {
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*tab = '\0';
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strncpy(insn->op_str, tab + 1, sizeof(insn->op_str) - 1);
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insn->op_str[sizeof(insn->op_str) - 1] = '\0';
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} else
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insn->op_str[0] = '\0';
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strncpy(insn->mnemonic, buffer, sizeof(insn->mnemonic) - 1);
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insn->mnemonic[sizeof(insn->mnemonic) - 1] = '\0';
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2013-12-04 14:57:04 +00:00
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// fill the instruction bytes
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memcpy(insn->bytes, code, MIN(sizeof(insn->bytes), insn->size));
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2013-11-27 04:11:31 +00:00
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}
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2013-12-04 01:44:07 +00:00
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cs_err cs_option(csh ud, cs_opt_type type, size_t value)
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2013-12-03 13:00:09 +00:00
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{
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cs_struct *handle = (cs_struct *)(uintptr_t)ud;
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if (!handle)
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return CS_ERR_CSH;
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2013-12-03 13:56:54 +00:00
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switch (handle->arch) {
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default:
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2013-12-05 16:37:32 +00:00
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return CS_ERR_OPTION;
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2013-12-03 13:56:54 +00:00
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case CS_ARCH_X86:
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2013-12-03 15:45:08 +00:00
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if (type & CS_OPT_SYNTAX) {
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switch(value) {
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default:
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2013-12-05 16:37:32 +00:00
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return CS_ERR_OPTION;
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2013-12-03 16:05:04 +00:00
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case CS_OPT_SYNTAX_INTEL:
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2013-12-03 15:45:08 +00:00
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handle->printer = X86_Intel_printInst;
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break;
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2013-12-05 16:37:32 +00:00
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2013-12-03 16:05:04 +00:00
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case CS_OPT_SYNTAX_ATT:
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2013-12-03 15:45:08 +00:00
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handle->printer = X86_ATT_printInst;
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break;
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}
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2013-12-05 16:37:32 +00:00
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} else
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return CS_ERR_OPTION;
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2013-12-03 13:56:54 +00:00
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break;
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}
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2013-12-03 13:00:09 +00:00
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return CS_ERR_OK;
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}
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2013-12-03 01:51:46 +00:00
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size_t cs_disasm(csh ud, unsigned char *buffer, size_t size, uint64_t offset, size_t count, cs_insn *insn)
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2013-11-27 04:11:31 +00:00
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{
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cs_struct *handle = (cs_struct *)(uintptr_t)ud;
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MCInst mci;
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uint16_t insn_size;
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2013-11-29 09:40:07 +00:00
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size_t c = 0;
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2013-11-27 04:11:31 +00:00
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if (!handle) {
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// FIXME: handle this case?
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2013-11-27 07:24:47 +00:00
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// handle->errnum = CS_ERR_HANDLE;
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2013-11-27 04:11:31 +00:00
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return 0;
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}
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2013-11-27 07:24:47 +00:00
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handle->errnum = CS_ERR_OK;
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2013-11-27 04:11:31 +00:00
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while (size > 0) {
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MCInst_Init(&mci);
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bool r = handle->disasm(ud, buffer, size, &mci, &insn_size, offset, handle->getinsn_info);
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if (r) {
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SStream ss;
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SStream_Init(&ss);
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mci.pub_insn.size = insn_size;
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mci.pub_insn.address = offset;
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mci.mode = handle->mode;
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handle->printer(&mci, &ss, handle->printer_info);
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2013-12-04 06:11:32 +00:00
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fill_insn(handle, insn, ss.buffer, &mci, handle->post_printer, buffer);
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2013-11-27 04:11:31 +00:00
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c++;
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insn++;
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buffer += insn_size;
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size -= insn_size;
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offset += insn_size;
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if (count > 0) {
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if (c == count)
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return c;
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}
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2013-12-04 14:57:04 +00:00
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} else
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// face a broken instruction?
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2013-11-27 04:11:31 +00:00
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return c;
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}
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return c;
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}
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// dynamicly allocate memory to contain disasm insn
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// NOTE: caller must free() the allocated memory itself to avoid memory leaking
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2013-12-03 01:51:46 +00:00
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size_t cs_disasm_dyn(csh ud, unsigned char *buffer, size_t size, uint64_t offset, size_t count, cs_insn **insn)
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2013-11-27 04:11:31 +00:00
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{
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cs_struct *handle = (cs_struct *)(uintptr_t)ud;
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MCInst mci;
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uint16_t insn_size;
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2013-11-29 09:40:07 +00:00
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size_t c = 0, f = 0;
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2013-11-27 04:11:31 +00:00
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cs_insn insn_cache[64];
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void *total = NULL;
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2013-11-29 09:40:07 +00:00
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size_t total_size = 0;
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2013-11-27 04:11:31 +00:00
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if (!handle) {
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// FIXME: how to handle this case:
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2013-11-27 07:24:47 +00:00
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// handle->errnum = CS_ERR_HANDLE;
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2013-11-27 04:11:31 +00:00
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return 0;
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}
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2013-11-27 07:24:47 +00:00
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handle->errnum = CS_ERR_OK;
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2013-11-27 04:11:31 +00:00
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while (size > 0) {
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MCInst_Init(&mci);
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bool r = handle->disasm(ud, buffer, size, &mci, &insn_size, offset, handle->getinsn_info);
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if (r) {
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SStream ss;
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SStream_Init(&ss);
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mci.pub_insn.size = insn_size;
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mci.pub_insn.address = offset;
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mci.mode = handle->mode;
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handle->printer(&mci, &ss, handle->printer_info);
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2013-12-04 06:11:32 +00:00
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fill_insn(handle, &insn_cache[f], ss.buffer, &mci, handle->post_printer, buffer);
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2013-11-27 04:11:31 +00:00
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f++;
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if (f == ARR_SIZE(insn_cache)) {
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// resize total to contain newly disasm insns
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total_size += sizeof(insn_cache);
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void *tmp = realloc(total, total_size);
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if (tmp == NULL) { // insufficient memory
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free(total);
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2013-11-27 07:24:47 +00:00
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handle->errnum = CS_ERR_MEM;
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2013-11-27 04:11:31 +00:00
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return 0;
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}
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total = tmp;
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memcpy(total + total_size - sizeof(insn_cache), insn_cache, sizeof(insn_cache));
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// reset f back to 0
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f = 0;
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}
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c++;
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buffer += insn_size;
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size -= insn_size;
|
|
|
|
offset += insn_size;
|
|
|
|
|
|
|
|
if (count > 0 && c == count)
|
|
|
|
break;
|
2013-12-04 14:57:04 +00:00
|
|
|
} else {
|
|
|
|
// encounter a broken instruction
|
|
|
|
// XXX: TODO: JOXEAN continue here
|
|
|
|
break;
|
|
|
|
}
|
2013-11-27 04:11:31 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
if (f) {
|
|
|
|
// resize total to contain newly disasm insns
|
|
|
|
void *tmp = realloc(total, total_size + f * sizeof(insn_cache[0]));
|
|
|
|
if (tmp == NULL) { // insufficient memory
|
|
|
|
free(total);
|
2013-11-27 07:24:47 +00:00
|
|
|
handle->errnum = CS_ERR_MEM;
|
2013-11-27 04:11:31 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
total = tmp;
|
|
|
|
memcpy(total + total_size, insn_cache, f * sizeof(insn_cache[0]));
|
|
|
|
}
|
|
|
|
|
|
|
|
*insn = total;
|
|
|
|
|
|
|
|
return c;
|
|
|
|
}
|
|
|
|
|
|
|
|
void cs_free(void *m)
|
|
|
|
{
|
|
|
|
free(m);
|
|
|
|
}
|
|
|
|
|
|
|
|
// return friendly name of regiser in a string
|
|
|
|
char *cs_reg_name(csh ud, unsigned int reg)
|
|
|
|
{
|
|
|
|
cs_struct *handle = (cs_struct *)(uintptr_t)ud;
|
|
|
|
|
|
|
|
if (!handle || handle->reg_name == NULL) {
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
return handle->reg_name(reg);
|
|
|
|
}
|
|
|
|
|
|
|
|
char *cs_insn_name(csh ud, unsigned int insn)
|
|
|
|
{
|
|
|
|
cs_struct *handle = (cs_struct *)(uintptr_t)ud;
|
|
|
|
|
|
|
|
if (!handle || handle->insn_name == NULL) {
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
return handle->insn_name(insn);
|
|
|
|
}
|
|
|
|
|
|
|
|
static bool arr_exist(unsigned int *arr, int max, unsigned int id)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < max; i++) {
|
|
|
|
if (arr[i] == id)
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool cs_insn_group(csh handle, cs_insn *insn, unsigned int group_id)
|
|
|
|
{
|
|
|
|
if (!handle)
|
|
|
|
return false;
|
|
|
|
|
2013-12-03 03:10:26 +00:00
|
|
|
return arr_exist(insn->groups, insn->groups_count, group_id);
|
2013-11-27 04:11:31 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
bool cs_reg_read(csh handle, cs_insn *insn, unsigned int reg_id)
|
|
|
|
{
|
|
|
|
if (!handle)
|
|
|
|
return false;
|
|
|
|
|
2013-12-03 03:10:26 +00:00
|
|
|
return arr_exist(insn->regs_read, insn->regs_read_count, reg_id);
|
2013-11-27 04:11:31 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
bool cs_reg_write(csh handle, cs_insn *insn, unsigned int reg_id)
|
|
|
|
{
|
|
|
|
if (!handle)
|
|
|
|
return false;
|
|
|
|
|
2013-12-03 03:10:26 +00:00
|
|
|
return arr_exist(insn->regs_write, insn->regs_write_count, reg_id);
|
2013-11-27 04:11:31 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
int cs_op_count(csh ud, cs_insn *insn, unsigned int op_type)
|
|
|
|
{
|
|
|
|
if (!ud)
|
|
|
|
return -1;
|
|
|
|
|
|
|
|
cs_struct *handle = (cs_struct *)(uintptr_t)ud;
|
|
|
|
unsigned int count = 0, i;
|
|
|
|
|
2013-11-27 07:24:47 +00:00
|
|
|
handle->errnum = CS_ERR_OK;
|
2013-11-27 04:11:31 +00:00
|
|
|
|
|
|
|
switch (handle->arch) {
|
|
|
|
default:
|
2013-11-27 07:24:47 +00:00
|
|
|
handle->errnum = CS_ERR_HANDLE;
|
2013-11-27 04:11:31 +00:00
|
|
|
return -1;
|
|
|
|
case CS_ARCH_ARM:
|
|
|
|
for (i = 0; i < insn->arm.op_count; i++)
|
|
|
|
if (insn->arm.operands[i].type == op_type)
|
|
|
|
count++;
|
|
|
|
break;
|
|
|
|
case CS_ARCH_ARM64:
|
|
|
|
for (i = 0; i < insn->arm64.op_count; i++)
|
|
|
|
if (insn->arm64.operands[i].type == op_type)
|
|
|
|
count++;
|
|
|
|
break;
|
|
|
|
case CS_ARCH_X86:
|
|
|
|
for (i = 0; i < insn->x86.op_count; i++)
|
|
|
|
if (insn->x86.operands[i].type == op_type)
|
|
|
|
count++;
|
|
|
|
break;
|
|
|
|
case CS_ARCH_MIPS:
|
|
|
|
for (i = 0; i < insn->mips.op_count; i++)
|
|
|
|
if (insn->mips.operands[i].type == op_type)
|
|
|
|
count++;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return count;
|
|
|
|
}
|
|
|
|
|
|
|
|
int cs_op_index(csh ud, cs_insn *insn, unsigned int op_type,
|
|
|
|
unsigned int post)
|
|
|
|
{
|
|
|
|
if (!ud)
|
|
|
|
return -1;
|
|
|
|
|
|
|
|
cs_struct *handle = (cs_struct *)(uintptr_t)ud;
|
|
|
|
unsigned int count = 0, i;
|
|
|
|
|
2013-11-27 07:24:47 +00:00
|
|
|
handle->errnum = CS_ERR_OK;
|
2013-11-27 04:11:31 +00:00
|
|
|
|
|
|
|
switch (handle->arch) {
|
|
|
|
default:
|
2013-11-27 07:24:47 +00:00
|
|
|
handle->errnum = CS_ERR_HANDLE;
|
2013-11-27 04:11:31 +00:00
|
|
|
return -1;
|
|
|
|
case CS_ARCH_ARM:
|
|
|
|
for (i = 0; i < insn->arm.op_count; i++) {
|
|
|
|
if (insn->arm.operands[i].type == op_type)
|
|
|
|
count++;
|
|
|
|
if (count == post)
|
|
|
|
return i;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case CS_ARCH_ARM64:
|
|
|
|
for (i = 0; i < insn->arm64.op_count; i++) {
|
|
|
|
if (insn->arm64.operands[i].type == op_type)
|
|
|
|
count++;
|
|
|
|
if (count == post)
|
|
|
|
return i;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case CS_ARCH_X86:
|
|
|
|
for (i = 0; i < insn->x86.op_count; i++) {
|
|
|
|
if (insn->x86.operands[i].type == op_type)
|
|
|
|
count++;
|
|
|
|
if (count == post)
|
|
|
|
return i;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case CS_ARCH_MIPS:
|
|
|
|
for (i = 0; i < insn->mips.op_count; i++) {
|
|
|
|
if (insn->mips.operands[i].type == op_type)
|
|
|
|
count++;
|
|
|
|
if (count == post)
|
|
|
|
return i;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return -1;
|
|
|
|
}
|