2014-05-18 09:03:15 +00:00
|
|
|
cmake_minimum_required(VERSION 2.6)
|
|
|
|
|
project(capstone)
|
|
|
|
|
|
2019-01-09 05:53:17 +00:00
|
|
|
set(VERSION_MAJOR 5)
|
|
|
|
|
set(VERSION_MINOR 0)
|
2014-05-31 02:45:15 +00:00
|
|
|
set(VERSION_PATCH 0)
|
2014-05-28 08:27:53 +00:00
|
|
|
|
2015-08-04 17:31:06 +00:00
|
|
|
if(POLICY CMP0042)
|
|
|
|
|
# http://www.cmake.org/cmake/help/v3.0/policy/CMP0042.html
|
|
|
|
|
cmake_policy(SET CMP0042 NEW)
|
|
|
|
|
endif(POLICY CMP0042)
|
|
|
|
|
|
2015-08-04 18:48:55 +00:00
|
|
|
if (POLICY CMP0048)
|
|
|
|
|
# use old policy to honor version set using VERSION_* variables to preserve backwards
|
|
|
|
|
# compatibility. change OLD to NEW when minimum cmake version is updated to 3.* and
|
|
|
|
|
# set VERSION using project(capstone VERSION 4.0.0).
|
|
|
|
|
# http://www.cmake.org/cmake/help/v3.0/policy/CMP0048.html
|
|
|
|
|
cmake_policy (SET CMP0048 OLD)
|
|
|
|
|
endif()
|
2014-05-28 08:27:53 +00:00
|
|
|
|
2014-05-31 02:44:27 +00:00
|
|
|
# to configure the options specify them in in the command line or change them in the cmake UI.
|
|
|
|
|
# Don't edit the makefile!
|
2017-05-09 07:35:05 +00:00
|
|
|
option(CAPSTONE_BUILD_STATIC_RUNTIME "Embed static runtime" ON)
|
2014-09-19 16:39:22 +00:00
|
|
|
option(CAPSTONE_BUILD_STATIC "Build static library" ON)
|
|
|
|
|
option(CAPSTONE_BUILD_SHARED "Build shared library" ON)
|
|
|
|
|
option(CAPSTONE_BUILD_DIET "Build diet library" OFF)
|
|
|
|
|
option(CAPSTONE_BUILD_TESTS "Build tests" ON)
|
2018-04-26 02:15:59 +00:00
|
|
|
option(CAPSTONE_BUILD_CSTOOL "Build cstool" ON)
|
2014-09-19 16:39:22 +00:00
|
|
|
option(CAPSTONE_USE_DEFAULT_ALLOC "Use default memory allocation functions" ON)
|
|
|
|
|
|
2019-02-01 15:03:47 +00:00
|
|
|
set(SUPPORTED_ARCHITECTURES ARM ARM64 M68K MIPS PPC SPARC SYSZ XCORE X86 TMS320C64X M680X EVM MOS65XX WASM)
|
|
|
|
|
set(SUPPORTED_ARCHITECTURE_LABELS ARM ARM64 M68K MIPS PowerPC Sparc SystemZ XCore x86 TMS320C64x M680x EVM MOS65XX WASM)
|
2015-07-30 20:01:19 +00:00
|
|
|
|
|
|
|
|
list(LENGTH SUPPORTED_ARCHITECTURES count)
|
|
|
|
|
math(EXPR count "${count}-1")
|
|
|
|
|
# create options controlling whether support for a particular architecture is needed
|
|
|
|
|
foreach(i RANGE ${count})
|
|
|
|
|
list(GET SUPPORTED_ARCHITECTURES ${i} supported_architecture)
|
|
|
|
|
list(GET SUPPORTED_ARCHITECTURE_LABELS ${i} supported_architecture_label)
|
|
|
|
|
option("CAPSTONE_${supported_architecture}_SUPPORT" "${supported_architecture_label} support" ON)
|
|
|
|
|
endforeach(i)
|
|
|
|
|
|
2018-09-17 12:54:00 +00:00
|
|
|
# propagate architecture support variables to preprocessor
|
2015-07-31 17:34:33 +00:00
|
|
|
foreach(supported_architecture ${SUPPORTED_ARCHITECTURES})
|
2015-07-30 20:01:19 +00:00
|
|
|
set(option_name "CAPSTONE_${supported_architecture}_SUPPORT")
|
|
|
|
|
if(${option_name})
|
2015-07-31 17:34:33 +00:00
|
|
|
message("Enabling ${option_name}")
|
|
|
|
|
add_definitions("-D${option_name}")
|
2015-07-30 20:01:19 +00:00
|
|
|
endif()
|
|
|
|
|
endforeach(supported_architecture)
|
|
|
|
|
|
2019-02-01 15:03:47 +00:00
|
|
|
option(CAPSTONE_X86_ONLY "Enable just x86, and disable building every other architectures" OFF)
|
2014-09-19 16:39:22 +00:00
|
|
|
option(CAPSTONE_X86_REDUCE "x86 with reduce instruction sets to minimize library" OFF)
|
2014-10-13 23:55:30 +00:00
|
|
|
option(CAPSTONE_X86_ATT_DISABLE "Disable x86 AT&T syntax" OFF)
|
2015-04-09 17:28:19 +00:00
|
|
|
option(CAPSTONE_OSXKERNEL_SUPPORT "Support to embed Capstone into OS X Kernel extensions" OFF)
|
2014-09-19 16:39:22 +00:00
|
|
|
|
2018-03-29 14:18:04 +00:00
|
|
|
if (MSVC)
|
|
|
|
|
set(CMAKE_CXX_FLAGS_RELEASE "${CMAKE_CXX_FLAGS_RELEASE} /MT")
|
|
|
|
|
set(CMAKE_CXX_FLAGS_DEBUG "${CMAKE_CXX_FLAGS_DEBUG} /MTd")
|
|
|
|
|
endif ()
|
|
|
|
|
|
2015-05-30 19:03:49 +00:00
|
|
|
enable_testing()
|
|
|
|
|
|
2014-09-19 16:39:22 +00:00
|
|
|
if (CAPSTONE_BUILD_DIET)
|
2014-05-31 02:44:27 +00:00
|
|
|
add_definitions(-DCAPSTONE_DIET)
|
|
|
|
|
endif ()
|
|
|
|
|
|
2014-09-19 16:39:22 +00:00
|
|
|
if (CAPSTONE_USE_DEFAULT_ALLOC)
|
2014-06-03 09:38:29 +00:00
|
|
|
add_definitions(-DCAPSTONE_USE_SYS_DYN_MEM)
|
2014-05-31 02:44:27 +00:00
|
|
|
endif ()
|
2014-05-18 09:03:15 +00:00
|
|
|
|
2014-09-19 16:39:22 +00:00
|
|
|
if (CAPSTONE_X86_REDUCE)
|
2014-05-31 02:44:27 +00:00
|
|
|
add_definitions(-DCAPSTONE_X86_REDUCE)
|
2014-05-18 09:03:15 +00:00
|
|
|
endif ()
|
|
|
|
|
|
2014-09-19 16:39:22 +00:00
|
|
|
if (CAPSTONE_X86_ATT_DISABLE)
|
2014-08-17 18:59:05 +00:00
|
|
|
add_definitions(-DCAPSTONE_X86_ATT_DISABLE)
|
|
|
|
|
endif ()
|
|
|
|
|
|
2014-06-03 21:04:23 +00:00
|
|
|
## sources
|
2015-04-15 18:31:32 +00:00
|
|
|
set(SOURCES_ENGINE
|
2014-05-18 09:03:15 +00:00
|
|
|
cs.c
|
|
|
|
|
MCInst.c
|
|
|
|
|
MCInstrDesc.c
|
|
|
|
|
MCRegisterInfo.c
|
|
|
|
|
SStream.c
|
|
|
|
|
utils.c
|
2015-04-22 17:35:47 +00:00
|
|
|
)
|
2015-04-15 18:31:32 +00:00
|
|
|
set(HEADERS_ENGINE
|
2015-04-22 17:35:47 +00:00
|
|
|
cs_priv.h
|
|
|
|
|
LEB128.h
|
|
|
|
|
MathExtras.h
|
|
|
|
|
MCDisassembler.h
|
|
|
|
|
MCFixedLenDisassembler.h
|
2015-04-15 10:15:26 +00:00
|
|
|
MCInst.h
|
|
|
|
|
MCInstrDesc.h
|
2015-04-22 17:35:47 +00:00
|
|
|
MCRegisterInfo.h
|
2015-04-15 10:15:26 +00:00
|
|
|
SStream.h
|
2015-04-22 17:35:47 +00:00
|
|
|
utils.h
|
2015-04-15 10:15:26 +00:00
|
|
|
)
|
|
|
|
|
|
2015-04-23 18:39:48 +00:00
|
|
|
set(HEADERS_COMMON
|
2015-04-22 19:03:47 +00:00
|
|
|
include/capstone/arm64.h
|
|
|
|
|
include/capstone/arm.h
|
|
|
|
|
include/capstone/capstone.h
|
2018-07-20 04:36:50 +00:00
|
|
|
include/capstone/evm.h
|
2019-02-01 15:03:47 +00:00
|
|
|
include/capstone/wasm.h
|
2015-04-22 19:03:47 +00:00
|
|
|
include/capstone/mips.h
|
|
|
|
|
include/capstone/ppc.h
|
|
|
|
|
include/capstone/x86.h
|
|
|
|
|
include/capstone/sparc.h
|
|
|
|
|
include/capstone/systemz.h
|
|
|
|
|
include/capstone/xcore.h
|
2015-08-03 16:45:08 +00:00
|
|
|
include/capstone/m68k.h
|
2016-05-03 12:52:11 +00:00
|
|
|
include/capstone/tms320c64x.h
|
M680X: Target ready for pull request (#1034)
* Added new M680X target. Supports M6800/1/2/3/9, HD6301
* M680X: Reformat for coding guide lines. Set alphabetical order in HACK.TXT
* M680X: Prepare for python binding. Move cs_m680x, m680x_insn to m680x_info. Chec
> k cpu type, no default.
* M680X: Add python bindings. Added python tests.
* M680X: Added cpu types to usage message.
* cstool: Avoid segfault for invalid <arch+mode>.
* Make test_m680x.c/test_m680x.py output comparable (diff params: -bu). Keep xprint.py untouched.
* M680X: Update CMake/make for m680x support. Update .gitignore.
* M680X: Reduce compiler warnings.
* M680X: Reduce compiler warnings.
* M680X: Reduce compiler warnings.
* M680X: Make test_m680x.c/test_m680x.py output comparable (diff params: -bu).
* M680X: Add ocaml bindings and tests.
* M680X: Add java bindings and tests.
* M680X: Added tests for all indexed addressing modes. C/Python/Ocaml
* M680X: Naming, use page1 for PAGE1 instructions (without prefix).
* M680X: Naming, use page1 for PAGE1 instructions (without prefix).
* M680X: Used M680X_FIRST_OP_IN_MNEM in tests C/python/java/ocaml.
* M680X: Added access property to cs_m680x_op.
* M680X: Added operand size.
* M680X: Remove compiler warnings.
* M680X: Added READ/WRITE access property per operator.
* M680X: Make reg_inherent_hdlr independent of CPU type.
* M680X: Add HD6309 support + bug fixes
* M680X: Remove errors and warning.
* M680X: Add Bcc/LBcc to group BRAREL (relative branch).
* M680X: Add group JUMP to BVS/BVC/LBVS/LBVC. Remove BRAREL from BRN/LBRN.
* M680X: Remove LBRN from group BRAREL.
* M680X: Refactored cpu_type initialization for better readability.
* M680X: Add two operands for insn having two reg. in mnemonic. e.g. ABX.
* M680X: Remove typo in cstool.c
* M680X: Some format improvements in changed_regs.
* M680X: Remove insn id string list from tests (C/python/java/ocaml).
* M680X: SEXW, set access of reg. D to WRITE.
* M680X: Sort changed_regs in increasing m680x_insn order.
* M680X: Add M68HC11 support + Reduced from two to one INDEXED operand.
* M680X: cstool, also write '(in mnemonic)' for second reg. operand.
* M680X: Add BRN/LBRN to group JUMP and BRAREL.
* M680X: For Bcc/LBcc/BRSET/BRCLR set reg. CC to read access.
* M680X: Correctly print negative immediate values with option CS_OPT_UNSIGNED.
* M680X: Rename some instruction handlers.
* M680X: Add M68HC05 support.
* M680X: Dont print prefix '<' for direct addr. mode.
* M680X: Add M68HC08 support + resorted tables + bug fixes.
* M680X: Add Freescale HCS08 support.
* M680X: Changed group names, avoid spaces.
* M680X: Refactoring, rename addessing mode handlers.
* M680X: indexed addr. mode, changed pre/post inc-/decrement representation.
* M680X: Rename some M6809/HD6309 specific functions.
* M680X: Add CPU12 (68HC12/HCS12) support.
* M680X: Correctly display illegal instruction as FCB .
* M680X: bugfix: BRA/BRN/BSR/LBRA/LBRN/LBSR does not read CC reg.
* M680X: bugfix: Correctly check for sufficient code size for M6809 indexed addressing.
* M680X: Better support for changing insn id within handler for addessing mode.
* M680X: Remove warnings.
* M680X: In set_changed_regs_read_write_counts use own access_mode.
* M680X: Split cpu specific tables into separate *.inc files.
* M680X: Remove warnings.
* M680X: Removed address_mode. Addressing mode is available in operand.type
* M680X: Bugfix: BSET/BCLR/BRSET/BRCLR correct read/modify CC reg.
* M680X: Remove register TMP1. It is first visible in CPU12X.
* M680X: Performance improvement + bug fixes.
* M680X: Performance improvement, make cpu_tables const static.
* M680X: Simplify operand decoding by using two handlers.
* M680X: Replace M680X_OP_INDEX by M680X_OP_CONSTANT + bugfix in java/python/ocaml bindings.
* M680X: Format with astyle.
* M680X: Update documentation.
* M680X: Corrected author for m680x specific files.
* M680X: Make max. number of architectures single source.
2017-10-21 13:44:36 +00:00
|
|
|
include/capstone/m680x.h
|
2018-12-02 20:39:41 +00:00
|
|
|
include/capstone/mos65xx.h
|
2015-04-22 19:03:47 +00:00
|
|
|
include/capstone/platform.h
|
2015-04-23 18:39:48 +00:00
|
|
|
)
|
|
|
|
|
|
2017-05-11 15:58:12 +00:00
|
|
|
set(TEST_SOURCES test_basic.c test_detail.c test_skipdata.c test_iter.c)
|
2014-05-28 06:29:20 +00:00
|
|
|
|
2014-06-03 21:04:23 +00:00
|
|
|
## architecture support
|
2019-02-01 15:03:47 +00:00
|
|
|
if (NOT CAPSTONE_X86_ONLY AND CAPSTONE_ARM_SUPPORT)
|
2014-05-18 09:03:15 +00:00
|
|
|
add_definitions(-DCAPSTONE_HAS_ARM)
|
2015-04-15 10:15:26 +00:00
|
|
|
set(SOURCES_ARM
|
2014-05-18 09:03:15 +00:00
|
|
|
arch/ARM/ARMDisassembler.c
|
|
|
|
|
arch/ARM/ARMInstPrinter.c
|
|
|
|
|
arch/ARM/ARMMapping.c
|
|
|
|
|
arch/ARM/ARMModule.c
|
2015-04-22 17:35:47 +00:00
|
|
|
)
|
|
|
|
|
set(HEADERS_ARM
|
|
|
|
|
arch/ARM/ARMAddressingModes.h
|
|
|
|
|
arch/ARM/ARMBaseInfo.h
|
|
|
|
|
arch/ARM/ARMDisassembler.h
|
|
|
|
|
arch/ARM/ARMGenAsmWriter.inc
|
|
|
|
|
arch/ARM/ARMGenDisassemblerTables.inc
|
|
|
|
|
arch/ARM/ARMGenInstrInfo.inc
|
|
|
|
|
arch/ARM/ARMGenRegisterInfo.inc
|
|
|
|
|
arch/ARM/ARMGenSubtargetInfo.inc
|
|
|
|
|
arch/ARM/ARMInstPrinter.h
|
|
|
|
|
arch/ARM/ARMMapping.h
|
|
|
|
|
arch/ARM/ARMMappingInsn.inc
|
|
|
|
|
arch/ARM/ARMMappingInsnOp.inc
|
2014-05-18 09:03:15 +00:00
|
|
|
)
|
2015-04-15 18:31:32 +00:00
|
|
|
set(HEADERS_ARM
|
|
|
|
|
arch/ARM/ARMAddressingModes.h
|
|
|
|
|
arch/ARM/ARMBaseInfo.h
|
|
|
|
|
arch/ARM/ARMDisassembler.h
|
|
|
|
|
arch/ARM/ARMGenAsmWriter.inc
|
|
|
|
|
arch/ARM/ARMGenDisassemblerTables.inc
|
|
|
|
|
arch/ARM/ARMGenInstrInfo.inc
|
|
|
|
|
arch/ARM/ARMGenRegisterInfo.inc
|
|
|
|
|
arch/ARM/ARMGenSubtargetInfo.inc
|
|
|
|
|
arch/ARM/ARMInstPrinter.h
|
|
|
|
|
arch/ARM/ARMMapping.h
|
|
|
|
|
)
|
2014-05-18 09:03:15 +00:00
|
|
|
set(TEST_SOURCES ${TEST_SOURCES} test_arm.c)
|
|
|
|
|
endif ()
|
2014-05-28 06:29:20 +00:00
|
|
|
|
2019-02-01 15:03:47 +00:00
|
|
|
if (NOT CAPSTONE_X86_ONLY AND CAPSTONE_ARM64_SUPPORT)
|
2014-05-18 09:03:15 +00:00
|
|
|
add_definitions(-DCAPSTONE_HAS_ARM64)
|
2015-04-15 10:15:26 +00:00
|
|
|
set(SOURCES_ARM64
|
2014-05-18 09:03:15 +00:00
|
|
|
arch/AArch64/AArch64BaseInfo.c
|
|
|
|
|
arch/AArch64/AArch64Disassembler.c
|
|
|
|
|
arch/AArch64/AArch64InstPrinter.c
|
|
|
|
|
arch/AArch64/AArch64Mapping.c
|
|
|
|
|
arch/AArch64/AArch64Module.c
|
2015-04-22 17:35:47 +00:00
|
|
|
)
|
|
|
|
|
set(HEADERS_ARM64
|
|
|
|
|
arch/AArch64/AArch64AddressingModes.h
|
|
|
|
|
arch/AArch64/AArch64BaseInfo.h
|
|
|
|
|
arch/AArch64/AArch64Disassembler.h
|
|
|
|
|
arch/AArch64/AArch64GenAsmWriter.inc
|
|
|
|
|
arch/AArch64/AArch64GenDisassemblerTables.inc
|
|
|
|
|
arch/AArch64/AArch64GenInstrInfo.inc
|
|
|
|
|
arch/AArch64/AArch64GenRegisterInfo.inc
|
|
|
|
|
arch/AArch64/AArch64GenSubtargetInfo.inc
|
|
|
|
|
arch/AArch64/AArch64InstPrinter.h
|
|
|
|
|
arch/AArch64/AArch64Mapping.h
|
|
|
|
|
arch/AArch64/AArch64MappingInsn.inc
|
2014-05-18 09:03:15 +00:00
|
|
|
)
|
2015-04-15 18:31:32 +00:00
|
|
|
set(HEADERS_ARM64
|
|
|
|
|
arch/AArch64/AArch64AddressingModes.h
|
|
|
|
|
arch/AArch64/AArch64BaseInfo.h
|
|
|
|
|
arch/AArch64/AArch64Disassembler.h
|
|
|
|
|
arch/AArch64/AArch64GenAsmWriter.inc
|
|
|
|
|
arch/AArch64/AArch64GenDisassemblerTables.inc
|
|
|
|
|
arch/AArch64/AArch64GenInstrInfo.inc
|
|
|
|
|
arch/AArch64/AArch64GenRegisterInfo.inc
|
|
|
|
|
arch/AArch64/AArch64GenSubtargetInfo.inc
|
|
|
|
|
arch/AArch64/AArch64InstPrinter.h
|
|
|
|
|
arch/AArch64/AArch64Mapping.h
|
|
|
|
|
)
|
2014-05-18 09:03:15 +00:00
|
|
|
set(TEST_SOURCES ${TEST_SOURCES} test_arm64.c)
|
|
|
|
|
endif ()
|
|
|
|
|
|
2019-02-01 15:03:47 +00:00
|
|
|
if (NOT CAPSTONE_X86_ONLY AND CAPSTONE_MIPS_SUPPORT)
|
2014-05-18 09:03:15 +00:00
|
|
|
add_definitions(-DCAPSTONE_HAS_MIPS)
|
2015-04-15 10:15:26 +00:00
|
|
|
set(SOURCES_MIPS
|
2014-05-18 09:03:15 +00:00
|
|
|
arch/Mips/MipsDisassembler.c
|
2014-05-28 06:29:20 +00:00
|
|
|
arch/Mips/MipsInstPrinter.c
|
2014-05-18 09:03:15 +00:00
|
|
|
arch/Mips/MipsMapping.c
|
|
|
|
|
arch/Mips/MipsModule.c
|
2015-04-22 17:35:47 +00:00
|
|
|
)
|
|
|
|
|
set(HEADERS_MIPS
|
|
|
|
|
arch/Mips/MipsDisassembler.h
|
|
|
|
|
arch/Mips/MipsGenAsmWriter.inc
|
|
|
|
|
arch/Mips/MipsGenDisassemblerTables.inc
|
|
|
|
|
arch/Mips/MipsGenInstrInfo.inc
|
|
|
|
|
arch/Mips/MipsGenRegisterInfo.inc
|
|
|
|
|
arch/Mips/MipsGenSubtargetInfo.inc
|
|
|
|
|
arch/Mips/MipsInstPrinter.h
|
|
|
|
|
arch/Mips/MipsMapping.h
|
|
|
|
|
arch/Mips/MipsMappingInsn.inc
|
2014-05-18 09:03:15 +00:00
|
|
|
)
|
2015-04-15 18:31:32 +00:00
|
|
|
set(HEADERS_MIPS
|
|
|
|
|
arch/Mips/MipsDisassembler.h
|
|
|
|
|
arch/Mips/MipsGenAsmWriter.inc
|
|
|
|
|
arch/Mips/MipsGenDisassemblerTables.inc
|
|
|
|
|
arch/Mips/MipsGenInstrInfo.inc
|
|
|
|
|
arch/Mips/MipsGenRegisterInfo.inc
|
|
|
|
|
arch/Mips/MipsGenSubtargetInfo.inc
|
|
|
|
|
arch/Mips/MipsInstPrinter.h
|
|
|
|
|
arch/Mips/MipsMapping.h
|
|
|
|
|
)
|
2014-05-18 09:03:15 +00:00
|
|
|
set(TEST_SOURCES ${TEST_SOURCES} test_mips.c)
|
|
|
|
|
endif ()
|
|
|
|
|
|
2019-02-01 15:03:47 +00:00
|
|
|
if (NOT CAPSTONE_X86_ONLY AND CAPSTONE_PPC_SUPPORT)
|
2014-05-18 09:03:15 +00:00
|
|
|
add_definitions(-DCAPSTONE_HAS_POWERPC)
|
2015-04-15 10:15:26 +00:00
|
|
|
set(SOURCES_PPC
|
2014-05-18 09:03:15 +00:00
|
|
|
arch/PowerPC/PPCDisassembler.c
|
|
|
|
|
arch/PowerPC/PPCInstPrinter.c
|
|
|
|
|
arch/PowerPC/PPCMapping.c
|
|
|
|
|
arch/PowerPC/PPCModule.c
|
2015-04-22 17:35:47 +00:00
|
|
|
)
|
|
|
|
|
set(HEADERS_PPC
|
|
|
|
|
arch/PowerPC/PPCDisassembler.h
|
|
|
|
|
arch/PowerPC/PPCGenAsmWriter.inc
|
|
|
|
|
arch/PowerPC/PPCGenDisassemblerTables.inc
|
|
|
|
|
arch/PowerPC/PPCGenInstrInfo.inc
|
|
|
|
|
arch/PowerPC/PPCGenRegisterInfo.inc
|
|
|
|
|
arch/PowerPC/PPCGenSubtargetInfo.inc
|
|
|
|
|
arch/PowerPC/PPCInstPrinter.h
|
|
|
|
|
arch/PowerPC/PPCMapping.h
|
|
|
|
|
arch/PowerPC/PPCMappingInsn.inc
|
|
|
|
|
arch/PowerPC/PPCPredicates.h
|
2014-05-18 09:03:15 +00:00
|
|
|
)
|
2015-04-15 18:31:32 +00:00
|
|
|
set(HEADERS_PPC
|
|
|
|
|
arch/PowerPC/PPCDisassembler.h
|
|
|
|
|
arch/PowerPC/PPCGenAsmWriter.inc
|
|
|
|
|
arch/PowerPC/PPCGenDisassemblerTables.inc
|
|
|
|
|
arch/PowerPC/PPCGenInstrInfo.inc
|
|
|
|
|
arch/PowerPC/PPCGenRegisterInfo.inc
|
|
|
|
|
arch/PowerPC/PPCGenSubtargetInfo.inc
|
|
|
|
|
arch/PowerPC/PPCInstPrinter.h
|
|
|
|
|
arch/PowerPC/PPCMapping.h
|
|
|
|
|
arch/PowerPC/PPCPredicates.h
|
|
|
|
|
)
|
2014-05-18 09:03:15 +00:00
|
|
|
set(TEST_SOURCES ${TEST_SOURCES} test_ppc.c)
|
|
|
|
|
endif ()
|
|
|
|
|
|
2014-09-19 16:39:22 +00:00
|
|
|
if (CAPSTONE_X86_SUPPORT)
|
2014-05-18 09:03:15 +00:00
|
|
|
add_definitions(-DCAPSTONE_HAS_X86)
|
2015-04-15 10:15:26 +00:00
|
|
|
set(SOURCES_X86
|
2014-05-18 09:03:15 +00:00
|
|
|
arch/X86/X86Disassembler.c
|
|
|
|
|
arch/X86/X86DisassemblerDecoder.c
|
|
|
|
|
arch/X86/X86IntelInstPrinter.c
|
|
|
|
|
arch/X86/X86Mapping.c
|
|
|
|
|
arch/X86/X86Module.c
|
2015-04-22 17:35:47 +00:00
|
|
|
)
|
|
|
|
|
set(HEADERS_X86
|
|
|
|
|
arch/X86/X86BaseInfo.h
|
|
|
|
|
arch/X86/X86Disassembler.h
|
|
|
|
|
arch/X86/X86DisassemblerDecoder.h
|
|
|
|
|
arch/X86/X86DisassemblerDecoderCommon.h
|
|
|
|
|
arch/X86/X86GenAsmWriter.inc
|
|
|
|
|
arch/X86/X86GenAsmWriter1.inc
|
|
|
|
|
arch/X86/X86GenAsmWriter1_reduce.inc
|
|
|
|
|
arch/X86/X86GenAsmWriter_reduce.inc
|
|
|
|
|
arch/X86/X86GenDisassemblerTables.inc
|
|
|
|
|
arch/X86/X86GenDisassemblerTables_reduce.inc
|
|
|
|
|
arch/X86/X86GenInstrInfo.inc
|
|
|
|
|
arch/X86/X86GenInstrInfo_reduce.inc
|
|
|
|
|
arch/X86/X86GenRegisterInfo.inc
|
|
|
|
|
arch/X86/X86InstPrinter.h
|
|
|
|
|
arch/X86/X86Mapping.h
|
|
|
|
|
arch/X86/X86MappingInsn.inc
|
|
|
|
|
arch/X86/X86MappingInsnOp.inc
|
|
|
|
|
arch/X86/X86MappingInsnOp_reduce.inc
|
|
|
|
|
arch/X86/X86MappingInsn_reduce.inc
|
2014-05-18 09:03:15 +00:00
|
|
|
)
|
2015-04-15 18:31:32 +00:00
|
|
|
set(HEADERS_X86
|
|
|
|
|
arch/X86/X86BaseInfo.h
|
|
|
|
|
arch/X86/X86Disassembler.h
|
|
|
|
|
arch/X86/X86DisassemblerDecoder.h
|
|
|
|
|
arch/X86/X86DisassemblerDecoderCommon.h
|
|
|
|
|
arch/X86/X86GenAsmWriter.inc
|
|
|
|
|
arch/X86/X86GenAsmWriter1.inc
|
|
|
|
|
arch/X86/X86GenAsmWriter1_reduce.inc
|
|
|
|
|
arch/X86/X86GenAsmWriter_reduce.inc
|
|
|
|
|
arch/X86/X86GenDisassemblerTables.inc
|
|
|
|
|
arch/X86/X86GenDisassemblerTables_reduce.inc
|
|
|
|
|
arch/X86/X86GenInstrInfo.inc
|
|
|
|
|
arch/X86/X86GenInstrInfo_reduce.inc
|
|
|
|
|
arch/X86/X86GenRegisterInfo.inc
|
|
|
|
|
arch/X86/X86InstPrinter.h
|
|
|
|
|
arch/X86/X86Mapping.h
|
|
|
|
|
)
|
2014-09-19 16:39:22 +00:00
|
|
|
if (NOT CAPSTONE_BUILD_DIET)
|
2015-04-15 19:39:10 +00:00
|
|
|
set(SOURCES_X86 ${SOURCES_X86} arch/X86/X86ATTInstPrinter.c)
|
2014-05-31 02:44:27 +00:00
|
|
|
endif ()
|
2015-07-30 20:01:19 +00:00
|
|
|
set(TEST_SOURCES ${TEST_SOURCES} test_x86.c test_customized_mnem.c)
|
2014-05-18 09:03:15 +00:00
|
|
|
endif ()
|
2014-05-28 06:29:20 +00:00
|
|
|
|
2019-02-01 15:03:47 +00:00
|
|
|
if (NOT CAPSTONE_X86_ONLY AND CAPSTONE_SPARC_SUPPORT)
|
2014-05-28 07:15:00 +00:00
|
|
|
add_definitions(-DCAPSTONE_HAS_SPARC)
|
2015-04-15 10:15:26 +00:00
|
|
|
set(SOURCES_SPARC
|
|
|
|
|
arch/Sparc/SparcDisassembler.c
|
|
|
|
|
arch/Sparc/SparcInstPrinter.c
|
|
|
|
|
arch/Sparc/SparcMapping.c
|
|
|
|
|
arch/Sparc/SparcModule.c
|
2014-05-28 07:15:00 +00:00
|
|
|
)
|
2015-04-15 18:31:32 +00:00
|
|
|
set(HEADERS_SPARC
|
|
|
|
|
arch/Sparc/Sparc.h
|
|
|
|
|
arch/Sparc/SparcDisassembler.h
|
|
|
|
|
arch/Sparc/SparcGenAsmWriter.inc
|
|
|
|
|
arch/Sparc/SparcGenDisassemblerTables.inc
|
|
|
|
|
arch/Sparc/SparcGenInstrInfo.inc
|
|
|
|
|
arch/Sparc/SparcGenRegisterInfo.inc
|
|
|
|
|
arch/Sparc/SparcGenSubtargetInfo.inc
|
|
|
|
|
arch/Sparc/SparcInstPrinter.h
|
|
|
|
|
arch/Sparc/SparcMapping.h
|
2015-04-22 17:35:47 +00:00
|
|
|
arch/Sparc/SparcMappingInsn.inc
|
2015-04-15 18:31:32 +00:00
|
|
|
)
|
2014-05-28 07:15:00 +00:00
|
|
|
set(TEST_SOURCES ${TEST_SOURCES} test_sparc.c)
|
|
|
|
|
endif ()
|
|
|
|
|
|
2019-02-01 15:03:47 +00:00
|
|
|
if (NOT CAPSTONE_X86_ONLY AND CAPSTONE_SYSZ_SUPPORT)
|
2014-05-28 07:15:00 +00:00
|
|
|
add_definitions(-DCAPSTONE_HAS_SYSZ)
|
2015-04-15 10:15:26 +00:00
|
|
|
set(SOURCES_SYSZ
|
|
|
|
|
arch/SystemZ/SystemZDisassembler.c
|
|
|
|
|
arch/SystemZ/SystemZInstPrinter.c
|
|
|
|
|
arch/SystemZ/SystemZMapping.c
|
|
|
|
|
arch/SystemZ/SystemZModule.c
|
|
|
|
|
arch/SystemZ/SystemZMCTargetDesc.c
|
2014-05-28 07:15:00 +00:00
|
|
|
)
|
2015-04-15 18:31:32 +00:00
|
|
|
set(HEADERS_SYSZ
|
|
|
|
|
arch/SystemZ/SystemZDisassembler.h
|
|
|
|
|
arch/SystemZ/SystemZGenAsmWriter.inc
|
|
|
|
|
arch/SystemZ/SystemZGenDisassemblerTables.inc
|
2018-12-16 13:48:51 +00:00
|
|
|
arch/SystemZ/SystemZGenInsnNameMaps.inc
|
2015-04-15 18:31:32 +00:00
|
|
|
arch/SystemZ/SystemZGenInstrInfo.inc
|
|
|
|
|
arch/SystemZ/SystemZGenRegisterInfo.inc
|
|
|
|
|
arch/SystemZ/SystemZGenSubtargetInfo.inc
|
|
|
|
|
arch/SystemZ/SystemZInstPrinter.h
|
|
|
|
|
arch/SystemZ/SystemZMapping.h
|
2015-04-22 17:35:47 +00:00
|
|
|
arch/SystemZ/SystemZMappingInsn.inc
|
|
|
|
|
arch/SystemZ/SystemZMCTargetDesc.h
|
2015-04-15 18:31:32 +00:00
|
|
|
)
|
2014-05-28 07:15:00 +00:00
|
|
|
set(TEST_SOURCES ${TEST_SOURCES} test_systemz.c)
|
|
|
|
|
endif ()
|
|
|
|
|
|
2019-02-01 15:03:47 +00:00
|
|
|
if (NOT CAPSTONE_X86_ONLY AND CAPSTONE_XCORE_SUPPORT)
|
2014-05-28 07:15:00 +00:00
|
|
|
add_definitions(-DCAPSTONE_HAS_XCORE)
|
2015-04-15 10:15:26 +00:00
|
|
|
set(SOURCES_XCORE
|
|
|
|
|
arch/XCore/XCoreDisassembler.c
|
|
|
|
|
arch/XCore/XCoreInstPrinter.c
|
|
|
|
|
arch/XCore/XCoreMapping.c
|
|
|
|
|
arch/XCore/XCoreModule.c
|
2014-05-28 07:15:00 +00:00
|
|
|
)
|
2015-04-15 18:31:32 +00:00
|
|
|
set(HEADERS_XCORE
|
|
|
|
|
arch/XCore/XCoreDisassembler.h
|
|
|
|
|
arch/XCore/XCoreGenAsmWriter.inc
|
|
|
|
|
arch/XCore/XCoreGenDisassemblerTables.inc
|
|
|
|
|
arch/XCore/XCoreGenInstrInfo.inc
|
|
|
|
|
arch/XCore/XCoreGenRegisterInfo.inc
|
|
|
|
|
arch/XCore/XCoreInstPrinter.h
|
|
|
|
|
arch/XCore/XCoreMapping.h
|
2015-04-22 17:35:47 +00:00
|
|
|
arch/XCore/XCoreMappingInsn.inc
|
2015-04-15 18:31:32 +00:00
|
|
|
)
|
2014-05-28 07:15:00 +00:00
|
|
|
set(TEST_SOURCES ${TEST_SOURCES} test_xcore.c)
|
|
|
|
|
endif ()
|
|
|
|
|
|
2019-02-01 15:03:47 +00:00
|
|
|
if (NOT CAPSTONE_X86_ONLY AND CAPSTONE_M68K_SUPPORT)
|
2015-08-03 16:45:08 +00:00
|
|
|
add_definitions(-DCAPSTONE_HAS_M68K)
|
|
|
|
|
set(SOURCES_M68K
|
|
|
|
|
arch/M68K/M68KDisassembler.c
|
2015-10-04 12:22:58 +00:00
|
|
|
arch/M68K/M68KInstPrinter.c
|
2015-08-03 16:45:08 +00:00
|
|
|
arch/M68K/M68KModule.c
|
|
|
|
|
)
|
|
|
|
|
set(HEADERS_M68K
|
|
|
|
|
arch/M68K/M68KDisassembler.h
|
|
|
|
|
)
|
|
|
|
|
set(TEST_SOURCES ${TEST_SOURCES} test_m68k.c)
|
|
|
|
|
endif ()
|
|
|
|
|
|
2019-02-01 15:03:47 +00:00
|
|
|
if (NOT CAPSTONE_X86_ONLY AND CAPSTONE_TMS320C64X_SUPPORT)
|
2016-05-03 12:52:11 +00:00
|
|
|
add_definitions(-DCAPSTONE_HAS_TMS320C64X)
|
|
|
|
|
set(SOURCES_TMS320C64X
|
|
|
|
|
arch/TMS320C64x/TMS320C64xDisassembler.c
|
|
|
|
|
arch/TMS320C64x/TMS320C64xInstPrinter.c
|
|
|
|
|
arch/TMS320C64x/TMS320C64xMapping.c
|
|
|
|
|
arch/TMS320C64x/TMS320C64xModule.c
|
|
|
|
|
)
|
|
|
|
|
set(HEADERS_TMS320C64X
|
|
|
|
|
arch/TMS320C64x/TMS320C64xDisassembler.h
|
|
|
|
|
arch/TMS320C64x/TMS320C64xGenAsmWriter.inc
|
|
|
|
|
arch/TMS320C64x/TMS320C64xGenDisassemblerTables.inc
|
|
|
|
|
arch/TMS320C64x/TMS320C64xGenInstrInfo.inc
|
|
|
|
|
arch/TMS320C64x/TMS320C64xGenRegisterInfo.inc
|
|
|
|
|
arch/TMS320C64x/TMS320C64xInstPrinter.h
|
|
|
|
|
arch/TMS320C64x/TMS320C64xMapping.h
|
|
|
|
|
)
|
|
|
|
|
set(TEST_SOURCES ${TEST_SOURCES} test_tms320c64x.c)
|
|
|
|
|
endif ()
|
|
|
|
|
|
2019-02-01 15:03:47 +00:00
|
|
|
if (NOT CAPSTONE_X86_ONLY AND CAPSTONE_M680X_SUPPORT)
|
M680X: Target ready for pull request (#1034)
* Added new M680X target. Supports M6800/1/2/3/9, HD6301
* M680X: Reformat for coding guide lines. Set alphabetical order in HACK.TXT
* M680X: Prepare for python binding. Move cs_m680x, m680x_insn to m680x_info. Chec
> k cpu type, no default.
* M680X: Add python bindings. Added python tests.
* M680X: Added cpu types to usage message.
* cstool: Avoid segfault for invalid <arch+mode>.
* Make test_m680x.c/test_m680x.py output comparable (diff params: -bu). Keep xprint.py untouched.
* M680X: Update CMake/make for m680x support. Update .gitignore.
* M680X: Reduce compiler warnings.
* M680X: Reduce compiler warnings.
* M680X: Reduce compiler warnings.
* M680X: Make test_m680x.c/test_m680x.py output comparable (diff params: -bu).
* M680X: Add ocaml bindings and tests.
* M680X: Add java bindings and tests.
* M680X: Added tests for all indexed addressing modes. C/Python/Ocaml
* M680X: Naming, use page1 for PAGE1 instructions (without prefix).
* M680X: Naming, use page1 for PAGE1 instructions (without prefix).
* M680X: Used M680X_FIRST_OP_IN_MNEM in tests C/python/java/ocaml.
* M680X: Added access property to cs_m680x_op.
* M680X: Added operand size.
* M680X: Remove compiler warnings.
* M680X: Added READ/WRITE access property per operator.
* M680X: Make reg_inherent_hdlr independent of CPU type.
* M680X: Add HD6309 support + bug fixes
* M680X: Remove errors and warning.
* M680X: Add Bcc/LBcc to group BRAREL (relative branch).
* M680X: Add group JUMP to BVS/BVC/LBVS/LBVC. Remove BRAREL from BRN/LBRN.
* M680X: Remove LBRN from group BRAREL.
* M680X: Refactored cpu_type initialization for better readability.
* M680X: Add two operands for insn having two reg. in mnemonic. e.g. ABX.
* M680X: Remove typo in cstool.c
* M680X: Some format improvements in changed_regs.
* M680X: Remove insn id string list from tests (C/python/java/ocaml).
* M680X: SEXW, set access of reg. D to WRITE.
* M680X: Sort changed_regs in increasing m680x_insn order.
* M680X: Add M68HC11 support + Reduced from two to one INDEXED operand.
* M680X: cstool, also write '(in mnemonic)' for second reg. operand.
* M680X: Add BRN/LBRN to group JUMP and BRAREL.
* M680X: For Bcc/LBcc/BRSET/BRCLR set reg. CC to read access.
* M680X: Correctly print negative immediate values with option CS_OPT_UNSIGNED.
* M680X: Rename some instruction handlers.
* M680X: Add M68HC05 support.
* M680X: Dont print prefix '<' for direct addr. mode.
* M680X: Add M68HC08 support + resorted tables + bug fixes.
* M680X: Add Freescale HCS08 support.
* M680X: Changed group names, avoid spaces.
* M680X: Refactoring, rename addessing mode handlers.
* M680X: indexed addr. mode, changed pre/post inc-/decrement representation.
* M680X: Rename some M6809/HD6309 specific functions.
* M680X: Add CPU12 (68HC12/HCS12) support.
* M680X: Correctly display illegal instruction as FCB .
* M680X: bugfix: BRA/BRN/BSR/LBRA/LBRN/LBSR does not read CC reg.
* M680X: bugfix: Correctly check for sufficient code size for M6809 indexed addressing.
* M680X: Better support for changing insn id within handler for addessing mode.
* M680X: Remove warnings.
* M680X: In set_changed_regs_read_write_counts use own access_mode.
* M680X: Split cpu specific tables into separate *.inc files.
* M680X: Remove warnings.
* M680X: Removed address_mode. Addressing mode is available in operand.type
* M680X: Bugfix: BSET/BCLR/BRSET/BRCLR correct read/modify CC reg.
* M680X: Remove register TMP1. It is first visible in CPU12X.
* M680X: Performance improvement + bug fixes.
* M680X: Performance improvement, make cpu_tables const static.
* M680X: Simplify operand decoding by using two handlers.
* M680X: Replace M680X_OP_INDEX by M680X_OP_CONSTANT + bugfix in java/python/ocaml bindings.
* M680X: Format with astyle.
* M680X: Update documentation.
* M680X: Corrected author for m680x specific files.
* M680X: Make max. number of architectures single source.
2017-10-21 13:44:36 +00:00
|
|
|
add_definitions(-DCAPSTONE_HAS_M680X)
|
|
|
|
|
set(SOURCES_M680X
|
|
|
|
|
arch/M680X/M680XDisassembler.c
|
|
|
|
|
arch/M680X/M680XInstPrinter.c
|
|
|
|
|
arch/M680X/M680XModule.c
|
|
|
|
|
)
|
|
|
|
|
set(HEADERS_M680X
|
|
|
|
|
arch/M680X/M680XInstPrinter.h
|
|
|
|
|
arch/M680X/M680XDisassembler.h
|
|
|
|
|
arch/M680X/M680XDisassemblerInternals.h
|
|
|
|
|
)
|
|
|
|
|
set(TEST_SOURCES ${TEST_SOURCES} test_m680x.c)
|
|
|
|
|
endif ()
|
|
|
|
|
|
2019-02-01 15:03:47 +00:00
|
|
|
if (NOT CAPSTONE_X86_ONLY AND CAPSTONE_EVM_SUPPORT)
|
2018-03-31 09:29:22 +00:00
|
|
|
add_definitions(-DCAPSTONE_HAS_EVM)
|
|
|
|
|
set(SOURCES_EVM
|
|
|
|
|
arch/EVM/EVMDisassembler.c
|
|
|
|
|
arch/EVM/EVMInstPrinter.c
|
|
|
|
|
arch/EVM/EVMMapping.c
|
|
|
|
|
arch/EVM/EVMModule.c
|
|
|
|
|
)
|
|
|
|
|
set(HEADERS_EVM
|
|
|
|
|
arch/EVM/EVMDisassembler.h
|
|
|
|
|
arch/EVM/EVMInstPrinter.h
|
|
|
|
|
arch/EVM/EVMMapping.h
|
|
|
|
|
arch/EVM/EVMMappingInsn.inc
|
|
|
|
|
)
|
|
|
|
|
set(TEST_SOURCES ${TEST_SOURCES} test_evm.c)
|
|
|
|
|
endif ()
|
|
|
|
|
|
2019-02-01 15:03:47 +00:00
|
|
|
if (NOT CAPSTONE_X86_ONLY AND CAPSTONE_WASM_SUPPORT)
|
|
|
|
|
add_definitions(-DCAPSTONE_HAS_WASM)
|
|
|
|
|
set(SOURCES_WASM
|
|
|
|
|
arch/WASM/WASMDisassembler.c
|
|
|
|
|
arch/WASM/WASMInstPrinter.c
|
|
|
|
|
arch/WASM/WASMMapping.c
|
|
|
|
|
arch/WASM/WASMModule.c
|
|
|
|
|
)
|
|
|
|
|
set(HEADERS_WASM
|
|
|
|
|
arch/WASM/WASMDisassembler.h
|
|
|
|
|
arch/WASM/WASMInstPrinter.h
|
|
|
|
|
arch/WASM/WASMMapping.h
|
|
|
|
|
)
|
|
|
|
|
set(TEST_SOURCES ${TEST_SOURCES} test_wasm.c)
|
|
|
|
|
endif ()
|
|
|
|
|
|
|
|
|
|
if (NOT CAPSTONE_X86_ONLY AND CAPSTONE_MOS65XX_SUPPORT)
|
2018-12-02 20:39:41 +00:00
|
|
|
add_definitions(-DCAPSTONE_HAS_MOS65XX)
|
|
|
|
|
set(SOURCES_MOS65XX
|
|
|
|
|
arch/MOS65XX/MOS65XXModule.c
|
|
|
|
|
arch/MOS65XX/MOS65XXDisassembler.c)
|
|
|
|
|
set(HEADERS_SOURCES_MOS65XX
|
|
|
|
|
arch/MOS65XX/MOS65XXDisassembler.h
|
|
|
|
|
)
|
|
|
|
|
set(TEST_SOURCES ${TEST_SOURCES} test_mos65xx.c)
|
|
|
|
|
endif ()
|
|
|
|
|
|
2015-04-09 17:28:19 +00:00
|
|
|
if (CAPSTONE_OSXKERNEL_SUPPORT)
|
|
|
|
|
add_definitions(-DCAPSTONE_HAS_OSXKERNEL)
|
|
|
|
|
endif ()
|
|
|
|
|
|
2015-04-15 10:15:26 +00:00
|
|
|
set(ALL_SOURCES
|
2015-04-15 18:31:32 +00:00
|
|
|
${SOURCES_ENGINE}
|
2015-04-15 10:15:26 +00:00
|
|
|
${SOURCES_ARM}
|
|
|
|
|
${SOURCES_ARM64}
|
|
|
|
|
${SOURCES_MIPS}
|
|
|
|
|
${SOURCES_PPC}
|
|
|
|
|
${SOURCES_X86}
|
|
|
|
|
${SOURCES_SPARC}
|
|
|
|
|
${SOURCES_SYSZ}
|
|
|
|
|
${SOURCES_XCORE}
|
2015-08-03 16:45:08 +00:00
|
|
|
${SOURCES_M68K}
|
2016-05-03 12:52:11 +00:00
|
|
|
${SOURCES_TMS320C64X}
|
M680X: Target ready for pull request (#1034)
* Added new M680X target. Supports M6800/1/2/3/9, HD6301
* M680X: Reformat for coding guide lines. Set alphabetical order in HACK.TXT
* M680X: Prepare for python binding. Move cs_m680x, m680x_insn to m680x_info. Chec
> k cpu type, no default.
* M680X: Add python bindings. Added python tests.
* M680X: Added cpu types to usage message.
* cstool: Avoid segfault for invalid <arch+mode>.
* Make test_m680x.c/test_m680x.py output comparable (diff params: -bu). Keep xprint.py untouched.
* M680X: Update CMake/make for m680x support. Update .gitignore.
* M680X: Reduce compiler warnings.
* M680X: Reduce compiler warnings.
* M680X: Reduce compiler warnings.
* M680X: Make test_m680x.c/test_m680x.py output comparable (diff params: -bu).
* M680X: Add ocaml bindings and tests.
* M680X: Add java bindings and tests.
* M680X: Added tests for all indexed addressing modes. C/Python/Ocaml
* M680X: Naming, use page1 for PAGE1 instructions (without prefix).
* M680X: Naming, use page1 for PAGE1 instructions (without prefix).
* M680X: Used M680X_FIRST_OP_IN_MNEM in tests C/python/java/ocaml.
* M680X: Added access property to cs_m680x_op.
* M680X: Added operand size.
* M680X: Remove compiler warnings.
* M680X: Added READ/WRITE access property per operator.
* M680X: Make reg_inherent_hdlr independent of CPU type.
* M680X: Add HD6309 support + bug fixes
* M680X: Remove errors and warning.
* M680X: Add Bcc/LBcc to group BRAREL (relative branch).
* M680X: Add group JUMP to BVS/BVC/LBVS/LBVC. Remove BRAREL from BRN/LBRN.
* M680X: Remove LBRN from group BRAREL.
* M680X: Refactored cpu_type initialization for better readability.
* M680X: Add two operands for insn having two reg. in mnemonic. e.g. ABX.
* M680X: Remove typo in cstool.c
* M680X: Some format improvements in changed_regs.
* M680X: Remove insn id string list from tests (C/python/java/ocaml).
* M680X: SEXW, set access of reg. D to WRITE.
* M680X: Sort changed_regs in increasing m680x_insn order.
* M680X: Add M68HC11 support + Reduced from two to one INDEXED operand.
* M680X: cstool, also write '(in mnemonic)' for second reg. operand.
* M680X: Add BRN/LBRN to group JUMP and BRAREL.
* M680X: For Bcc/LBcc/BRSET/BRCLR set reg. CC to read access.
* M680X: Correctly print negative immediate values with option CS_OPT_UNSIGNED.
* M680X: Rename some instruction handlers.
* M680X: Add M68HC05 support.
* M680X: Dont print prefix '<' for direct addr. mode.
* M680X: Add M68HC08 support + resorted tables + bug fixes.
* M680X: Add Freescale HCS08 support.
* M680X: Changed group names, avoid spaces.
* M680X: Refactoring, rename addessing mode handlers.
* M680X: indexed addr. mode, changed pre/post inc-/decrement representation.
* M680X: Rename some M6809/HD6309 specific functions.
* M680X: Add CPU12 (68HC12/HCS12) support.
* M680X: Correctly display illegal instruction as FCB .
* M680X: bugfix: BRA/BRN/BSR/LBRA/LBRN/LBSR does not read CC reg.
* M680X: bugfix: Correctly check for sufficient code size for M6809 indexed addressing.
* M680X: Better support for changing insn id within handler for addessing mode.
* M680X: Remove warnings.
* M680X: In set_changed_regs_read_write_counts use own access_mode.
* M680X: Split cpu specific tables into separate *.inc files.
* M680X: Remove warnings.
* M680X: Removed address_mode. Addressing mode is available in operand.type
* M680X: Bugfix: BSET/BCLR/BRSET/BRCLR correct read/modify CC reg.
* M680X: Remove register TMP1. It is first visible in CPU12X.
* M680X: Performance improvement + bug fixes.
* M680X: Performance improvement, make cpu_tables const static.
* M680X: Simplify operand decoding by using two handlers.
* M680X: Replace M680X_OP_INDEX by M680X_OP_CONSTANT + bugfix in java/python/ocaml bindings.
* M680X: Format with astyle.
* M680X: Update documentation.
* M680X: Corrected author for m680x specific files.
* M680X: Make max. number of architectures single source.
2017-10-21 13:44:36 +00:00
|
|
|
${SOURCES_M680X}
|
2018-03-31 09:29:22 +00:00
|
|
|
${SOURCES_EVM}
|
2019-02-01 15:03:47 +00:00
|
|
|
${SOURCES_WASM}
|
2018-12-02 20:39:41 +00:00
|
|
|
${SOURCES_MOS65XX}
|
2015-04-15 10:15:26 +00:00
|
|
|
)
|
|
|
|
|
|
2015-04-15 18:31:32 +00:00
|
|
|
set(ALL_HEADERS
|
2015-04-23 18:39:48 +00:00
|
|
|
${HEADERS_COMMON}
|
2015-04-15 18:31:32 +00:00
|
|
|
${HEADERS_ENGINE}
|
|
|
|
|
${HEADERS_ARM}
|
|
|
|
|
${HEADERS_ARM64}
|
|
|
|
|
${HEADERS_MIPS}
|
|
|
|
|
${HEADERS_PPC}
|
|
|
|
|
${HEADERS_X86}
|
|
|
|
|
${HEADERS_SPARC}
|
|
|
|
|
${HEADERS_SYSZ}
|
|
|
|
|
${HEADERS_XCORE}
|
2015-10-04 06:56:35 +00:00
|
|
|
${HEADERS_M68K}
|
2016-05-03 12:52:11 +00:00
|
|
|
${HEADERS_TMS320C64X}
|
M680X: Target ready for pull request (#1034)
* Added new M680X target. Supports M6800/1/2/3/9, HD6301
* M680X: Reformat for coding guide lines. Set alphabetical order in HACK.TXT
* M680X: Prepare for python binding. Move cs_m680x, m680x_insn to m680x_info. Chec
> k cpu type, no default.
* M680X: Add python bindings. Added python tests.
* M680X: Added cpu types to usage message.
* cstool: Avoid segfault for invalid <arch+mode>.
* Make test_m680x.c/test_m680x.py output comparable (diff params: -bu). Keep xprint.py untouched.
* M680X: Update CMake/make for m680x support. Update .gitignore.
* M680X: Reduce compiler warnings.
* M680X: Reduce compiler warnings.
* M680X: Reduce compiler warnings.
* M680X: Make test_m680x.c/test_m680x.py output comparable (diff params: -bu).
* M680X: Add ocaml bindings and tests.
* M680X: Add java bindings and tests.
* M680X: Added tests for all indexed addressing modes. C/Python/Ocaml
* M680X: Naming, use page1 for PAGE1 instructions (without prefix).
* M680X: Naming, use page1 for PAGE1 instructions (without prefix).
* M680X: Used M680X_FIRST_OP_IN_MNEM in tests C/python/java/ocaml.
* M680X: Added access property to cs_m680x_op.
* M680X: Added operand size.
* M680X: Remove compiler warnings.
* M680X: Added READ/WRITE access property per operator.
* M680X: Make reg_inherent_hdlr independent of CPU type.
* M680X: Add HD6309 support + bug fixes
* M680X: Remove errors and warning.
* M680X: Add Bcc/LBcc to group BRAREL (relative branch).
* M680X: Add group JUMP to BVS/BVC/LBVS/LBVC. Remove BRAREL from BRN/LBRN.
* M680X: Remove LBRN from group BRAREL.
* M680X: Refactored cpu_type initialization for better readability.
* M680X: Add two operands for insn having two reg. in mnemonic. e.g. ABX.
* M680X: Remove typo in cstool.c
* M680X: Some format improvements in changed_regs.
* M680X: Remove insn id string list from tests (C/python/java/ocaml).
* M680X: SEXW, set access of reg. D to WRITE.
* M680X: Sort changed_regs in increasing m680x_insn order.
* M680X: Add M68HC11 support + Reduced from two to one INDEXED operand.
* M680X: cstool, also write '(in mnemonic)' for second reg. operand.
* M680X: Add BRN/LBRN to group JUMP and BRAREL.
* M680X: For Bcc/LBcc/BRSET/BRCLR set reg. CC to read access.
* M680X: Correctly print negative immediate values with option CS_OPT_UNSIGNED.
* M680X: Rename some instruction handlers.
* M680X: Add M68HC05 support.
* M680X: Dont print prefix '<' for direct addr. mode.
* M680X: Add M68HC08 support + resorted tables + bug fixes.
* M680X: Add Freescale HCS08 support.
* M680X: Changed group names, avoid spaces.
* M680X: Refactoring, rename addessing mode handlers.
* M680X: indexed addr. mode, changed pre/post inc-/decrement representation.
* M680X: Rename some M6809/HD6309 specific functions.
* M680X: Add CPU12 (68HC12/HCS12) support.
* M680X: Correctly display illegal instruction as FCB .
* M680X: bugfix: BRA/BRN/BSR/LBRA/LBRN/LBSR does not read CC reg.
* M680X: bugfix: Correctly check for sufficient code size for M6809 indexed addressing.
* M680X: Better support for changing insn id within handler for addessing mode.
* M680X: Remove warnings.
* M680X: In set_changed_regs_read_write_counts use own access_mode.
* M680X: Split cpu specific tables into separate *.inc files.
* M680X: Remove warnings.
* M680X: Removed address_mode. Addressing mode is available in operand.type
* M680X: Bugfix: BSET/BCLR/BRSET/BRCLR correct read/modify CC reg.
* M680X: Remove register TMP1. It is first visible in CPU12X.
* M680X: Performance improvement + bug fixes.
* M680X: Performance improvement, make cpu_tables const static.
* M680X: Simplify operand decoding by using two handlers.
* M680X: Replace M680X_OP_INDEX by M680X_OP_CONSTANT + bugfix in java/python/ocaml bindings.
* M680X: Format with astyle.
* M680X: Update documentation.
* M680X: Corrected author for m680x specific files.
* M680X: Make max. number of architectures single source.
2017-10-21 13:44:36 +00:00
|
|
|
${HEADERS_M680X}
|
2018-03-31 09:29:22 +00:00
|
|
|
${HEADERS_EVM}
|
2019-02-01 15:03:47 +00:00
|
|
|
${HEADERS_WASM}
|
2018-12-02 20:39:41 +00:00
|
|
|
${HEADERS_MOS65XX}
|
2015-04-15 18:31:32 +00:00
|
|
|
)
|
|
|
|
|
|
2014-05-18 09:03:15 +00:00
|
|
|
include_directories("${PROJECT_SOURCE_DIR}/include")
|
|
|
|
|
|
2014-06-03 21:04:23 +00:00
|
|
|
## properties
|
|
|
|
|
# version info
|
|
|
|
|
set_property(GLOBAL PROPERTY VERSION ${VERSION_MAJOR}.${VERSION_MINOR}.${VERSION_PATCH})
|
|
|
|
|
|
|
|
|
|
## targets
|
2014-09-19 16:39:22 +00:00
|
|
|
if (CAPSTONE_BUILD_STATIC)
|
2015-04-15 18:31:32 +00:00
|
|
|
add_library(capstone-static STATIC ${ALL_SOURCES} ${ALL_HEADERS})
|
2014-06-03 21:04:23 +00:00
|
|
|
set_property(TARGET capstone-static PROPERTY OUTPUT_NAME capstone)
|
|
|
|
|
set(default-target capstone-static)
|
2014-05-28 07:58:35 +00:00
|
|
|
endif ()
|
|
|
|
|
|
2015-02-03 10:25:12 +00:00
|
|
|
# Force static runtime libraries
|
|
|
|
|
if (CAPSTONE_BUILD_STATIC_RUNTIME)
|
|
|
|
|
FOREACH(flag
|
2015-02-03 10:25:12 +00:00
|
|
|
CMAKE_C_FLAGS_RELEASE CMAKE_C_FLAGS_RELWITHDEBINFO
|
|
|
|
|
CMAKE_C_FLAGS_DEBUG CMAKE_C_FLAGS_DEBUG_INIT
|
|
|
|
|
CMAKE_CXX_FLAGS_RELEASE CMAKE_CXX_FLAGS_RELWITHDEBINFO
|
|
|
|
|
CMAKE_CXX_FLAGS_DEBUG CMAKE_CXX_FLAGS_DEBUG_INIT)
|
2016-11-16 00:17:02 +00:00
|
|
|
if (MSVC)
|
|
|
|
|
STRING(REPLACE "/MD" "/MT" "${flag}" "${${flag}}")
|
|
|
|
|
SET("${flag}" "${${flag}} /EHsc")
|
|
|
|
|
endif (MSVC)
|
2015-02-03 10:25:12 +00:00
|
|
|
ENDFOREACH()
|
|
|
|
|
endif ()
|
|
|
|
|
|
2014-09-19 16:39:22 +00:00
|
|
|
if (CAPSTONE_BUILD_SHARED)
|
2015-04-15 18:31:32 +00:00
|
|
|
add_library(capstone-shared SHARED ${ALL_SOURCES} ${ALL_HEADERS})
|
2014-06-03 21:04:23 +00:00
|
|
|
set_property(TARGET capstone-shared PROPERTY OUTPUT_NAME capstone)
|
|
|
|
|
set_property(TARGET capstone-shared PROPERTY COMPILE_FLAGS -DCAPSTONE_SHARED)
|
|
|
|
|
|
2015-04-14 15:00:57 +00:00
|
|
|
if (MSVC)
|
2015-04-14 13:39:07 +00:00
|
|
|
set_target_properties(capstone-shared PROPERTIES IMPORT_SUFFIX _dll.lib)
|
2017-05-02 01:24:45 +00:00
|
|
|
else()
|
|
|
|
|
set_target_properties(capstone-shared PROPERTIES
|
|
|
|
|
VERSION ${VERSION_MAJOR}.${VERSION_MINOR}.${VERSION_PATCH}
|
|
|
|
|
SOVERSION ${VERSION_MAJOR})
|
2015-04-14 15:00:57 +00:00
|
|
|
endif ()
|
2015-04-14 13:39:07 +00:00
|
|
|
|
2014-06-03 21:04:23 +00:00
|
|
|
if(NOT DEFINED default-target) # honor `capstone-static` for tests first.
|
2015-04-15 10:15:26 +00:00
|
|
|
set(default-target capstone-shared)
|
|
|
|
|
add_definitions(-DCAPSTONE_SHARED)
|
2014-06-03 21:04:23 +00:00
|
|
|
endif ()
|
|
|
|
|
endif ()
|
2014-05-18 09:03:15 +00:00
|
|
|
|
2014-09-19 16:39:22 +00:00
|
|
|
if (CAPSTONE_BUILD_TESTS)
|
2014-05-18 09:03:15 +00:00
|
|
|
foreach (TSRC ${TEST_SOURCES})
|
2014-10-22 07:21:43 +00:00
|
|
|
STRING(REGEX REPLACE ".c$" "" TBIN ${TSRC})
|
|
|
|
|
add_executable(${TBIN} "tests/${TSRC}")
|
|
|
|
|
target_link_libraries(${TBIN} ${default-target})
|
2015-05-30 19:03:49 +00:00
|
|
|
add_test(NAME "capstone_${TBIN}" COMMAND ${TBIN})
|
2014-05-18 09:03:15 +00:00
|
|
|
endforeach ()
|
2014-10-22 07:21:43 +00:00
|
|
|
if (CAPSTONE_ARM_SUPPORT)
|
|
|
|
|
set(ARM_REGRESS_TEST test_arm_regression.c)
|
|
|
|
|
STRING(REGEX REPLACE ".c$" "" ARM_REGRESS_BIN ${ARM_REGRESS_TEST})
|
|
|
|
|
add_executable(${ARM_REGRESS_BIN} "suite/arm/${ARM_REGRESS_TEST}")
|
|
|
|
|
target_link_libraries(${ARM_REGRESS_BIN} ${default-target})
|
2015-05-30 19:03:49 +00:00
|
|
|
add_test(NAME "capstone_${ARM_REGRESS_BIN}" COMMAND ${ARM_REGRESS_BIN})
|
2014-10-22 07:21:43 +00:00
|
|
|
endif()
|
2018-06-01 12:46:20 +00:00
|
|
|
# fuzz target built with the tests
|
|
|
|
|
add_executable(fuzz_disasm suite/fuzz/onefile.c suite/fuzz/fuzz_disasm.c)
|
|
|
|
|
target_link_libraries(fuzz_disasm ${default-target})
|
2014-05-18 09:03:15 +00:00
|
|
|
endif ()
|
|
|
|
|
|
2015-04-15 18:31:32 +00:00
|
|
|
source_group("Source\\Engine" FILES ${SOURCES_ENGINE})
|
|
|
|
|
source_group("Source\\ARM" FILES ${SOURCES_ARM})
|
|
|
|
|
source_group("Source\\ARM64" FILES ${SOURCES_ARM64})
|
|
|
|
|
source_group("Source\\Mips" FILES ${SOURCES_MIPS})
|
|
|
|
|
source_group("Source\\PowerPC" FILES ${SOURCES_PPC})
|
2015-04-16 17:15:14 +00:00
|
|
|
source_group("Source\\Sparc" FILES ${SOURCES_SPARC})
|
|
|
|
|
source_group("Source\\SystemZ" FILES ${SOURCES_SYSZ})
|
|
|
|
|
source_group("Source\\X86" FILES ${SOURCES_X86})
|
2015-04-15 18:31:32 +00:00
|
|
|
source_group("Source\\XCore" FILES ${SOURCES_XCORE})
|
2015-10-04 06:56:35 +00:00
|
|
|
source_group("Source\\M68K" FILES ${SOURCES_M68K})
|
2016-05-03 12:52:11 +00:00
|
|
|
source_group("Source\\TMS320C64x" FILES ${SOURCES_TMS320C64X})
|
M680X: Target ready for pull request (#1034)
* Added new M680X target. Supports M6800/1/2/3/9, HD6301
* M680X: Reformat for coding guide lines. Set alphabetical order in HACK.TXT
* M680X: Prepare for python binding. Move cs_m680x, m680x_insn to m680x_info. Chec
> k cpu type, no default.
* M680X: Add python bindings. Added python tests.
* M680X: Added cpu types to usage message.
* cstool: Avoid segfault for invalid <arch+mode>.
* Make test_m680x.c/test_m680x.py output comparable (diff params: -bu). Keep xprint.py untouched.
* M680X: Update CMake/make for m680x support. Update .gitignore.
* M680X: Reduce compiler warnings.
* M680X: Reduce compiler warnings.
* M680X: Reduce compiler warnings.
* M680X: Make test_m680x.c/test_m680x.py output comparable (diff params: -bu).
* M680X: Add ocaml bindings and tests.
* M680X: Add java bindings and tests.
* M680X: Added tests for all indexed addressing modes. C/Python/Ocaml
* M680X: Naming, use page1 for PAGE1 instructions (without prefix).
* M680X: Naming, use page1 for PAGE1 instructions (without prefix).
* M680X: Used M680X_FIRST_OP_IN_MNEM in tests C/python/java/ocaml.
* M680X: Added access property to cs_m680x_op.
* M680X: Added operand size.
* M680X: Remove compiler warnings.
* M680X: Added READ/WRITE access property per operator.
* M680X: Make reg_inherent_hdlr independent of CPU type.
* M680X: Add HD6309 support + bug fixes
* M680X: Remove errors and warning.
* M680X: Add Bcc/LBcc to group BRAREL (relative branch).
* M680X: Add group JUMP to BVS/BVC/LBVS/LBVC. Remove BRAREL from BRN/LBRN.
* M680X: Remove LBRN from group BRAREL.
* M680X: Refactored cpu_type initialization for better readability.
* M680X: Add two operands for insn having two reg. in mnemonic. e.g. ABX.
* M680X: Remove typo in cstool.c
* M680X: Some format improvements in changed_regs.
* M680X: Remove insn id string list from tests (C/python/java/ocaml).
* M680X: SEXW, set access of reg. D to WRITE.
* M680X: Sort changed_regs in increasing m680x_insn order.
* M680X: Add M68HC11 support + Reduced from two to one INDEXED operand.
* M680X: cstool, also write '(in mnemonic)' for second reg. operand.
* M680X: Add BRN/LBRN to group JUMP and BRAREL.
* M680X: For Bcc/LBcc/BRSET/BRCLR set reg. CC to read access.
* M680X: Correctly print negative immediate values with option CS_OPT_UNSIGNED.
* M680X: Rename some instruction handlers.
* M680X: Add M68HC05 support.
* M680X: Dont print prefix '<' for direct addr. mode.
* M680X: Add M68HC08 support + resorted tables + bug fixes.
* M680X: Add Freescale HCS08 support.
* M680X: Changed group names, avoid spaces.
* M680X: Refactoring, rename addessing mode handlers.
* M680X: indexed addr. mode, changed pre/post inc-/decrement representation.
* M680X: Rename some M6809/HD6309 specific functions.
* M680X: Add CPU12 (68HC12/HCS12) support.
* M680X: Correctly display illegal instruction as FCB .
* M680X: bugfix: BRA/BRN/BSR/LBRA/LBRN/LBSR does not read CC reg.
* M680X: bugfix: Correctly check for sufficient code size for M6809 indexed addressing.
* M680X: Better support for changing insn id within handler for addessing mode.
* M680X: Remove warnings.
* M680X: In set_changed_regs_read_write_counts use own access_mode.
* M680X: Split cpu specific tables into separate *.inc files.
* M680X: Remove warnings.
* M680X: Removed address_mode. Addressing mode is available in operand.type
* M680X: Bugfix: BSET/BCLR/BRSET/BRCLR correct read/modify CC reg.
* M680X: Remove register TMP1. It is first visible in CPU12X.
* M680X: Performance improvement + bug fixes.
* M680X: Performance improvement, make cpu_tables const static.
* M680X: Simplify operand decoding by using two handlers.
* M680X: Replace M680X_OP_INDEX by M680X_OP_CONSTANT + bugfix in java/python/ocaml bindings.
* M680X: Format with astyle.
* M680X: Update documentation.
* M680X: Corrected author for m680x specific files.
* M680X: Make max. number of architectures single source.
2017-10-21 13:44:36 +00:00
|
|
|
source_group("Source\\M680X" FILES ${SOURCES_M680X})
|
2018-03-31 09:29:22 +00:00
|
|
|
source_group("Source\\EVM" FILES ${SOURCES_EVM})
|
2019-02-01 15:03:47 +00:00
|
|
|
source_group("Source\\WASM" FILES ${SOURCES_WASM})
|
2018-12-02 20:39:41 +00:00
|
|
|
source_group("Source\\MOS65XX" FILES ${SOURCES_MOS65XX})
|
2015-04-15 18:31:32 +00:00
|
|
|
|
2015-04-23 18:39:48 +00:00
|
|
|
source_group("Include\\Common" FILES ${HEADERS_COMMON})
|
2015-04-15 18:31:32 +00:00
|
|
|
source_group("Include\\Engine" FILES ${HEADERS_ENGINE})
|
|
|
|
|
source_group("Include\\ARM" FILES ${HEADERS_ARM})
|
|
|
|
|
source_group("Include\\ARM64" FILES ${HEADERS_ARM64})
|
|
|
|
|
source_group("Include\\Mips" FILES ${HEADERS_MIPS})
|
|
|
|
|
source_group("Include\\PowerPC" FILES ${HEADERS_PPC})
|
2015-04-16 17:15:14 +00:00
|
|
|
source_group("Include\\Sparc" FILES ${HEADERS_SPARC})
|
|
|
|
|
source_group("Include\\SystemZ" FILES ${HEADERS_SYSZ})
|
|
|
|
|
source_group("Include\\X86" FILES ${HEADERS_X86})
|
2015-04-15 18:31:32 +00:00
|
|
|
source_group("Include\\XCore" FILES ${HEADERS_XCORE})
|
2015-10-04 06:56:35 +00:00
|
|
|
source_group("Include\\M68K" FILES ${HEADERS_M68K})
|
2016-05-03 12:52:11 +00:00
|
|
|
source_group("Include\\TMS320C64x" FILES ${HEADERS_TMS320C64X})
|
M680X: Target ready for pull request (#1034)
* Added new M680X target. Supports M6800/1/2/3/9, HD6301
* M680X: Reformat for coding guide lines. Set alphabetical order in HACK.TXT
* M680X: Prepare for python binding. Move cs_m680x, m680x_insn to m680x_info. Chec
> k cpu type, no default.
* M680X: Add python bindings. Added python tests.
* M680X: Added cpu types to usage message.
* cstool: Avoid segfault for invalid <arch+mode>.
* Make test_m680x.c/test_m680x.py output comparable (diff params: -bu). Keep xprint.py untouched.
* M680X: Update CMake/make for m680x support. Update .gitignore.
* M680X: Reduce compiler warnings.
* M680X: Reduce compiler warnings.
* M680X: Reduce compiler warnings.
* M680X: Make test_m680x.c/test_m680x.py output comparable (diff params: -bu).
* M680X: Add ocaml bindings and tests.
* M680X: Add java bindings and tests.
* M680X: Added tests for all indexed addressing modes. C/Python/Ocaml
* M680X: Naming, use page1 for PAGE1 instructions (without prefix).
* M680X: Naming, use page1 for PAGE1 instructions (without prefix).
* M680X: Used M680X_FIRST_OP_IN_MNEM in tests C/python/java/ocaml.
* M680X: Added access property to cs_m680x_op.
* M680X: Added operand size.
* M680X: Remove compiler warnings.
* M680X: Added READ/WRITE access property per operator.
* M680X: Make reg_inherent_hdlr independent of CPU type.
* M680X: Add HD6309 support + bug fixes
* M680X: Remove errors and warning.
* M680X: Add Bcc/LBcc to group BRAREL (relative branch).
* M680X: Add group JUMP to BVS/BVC/LBVS/LBVC. Remove BRAREL from BRN/LBRN.
* M680X: Remove LBRN from group BRAREL.
* M680X: Refactored cpu_type initialization for better readability.
* M680X: Add two operands for insn having two reg. in mnemonic. e.g. ABX.
* M680X: Remove typo in cstool.c
* M680X: Some format improvements in changed_regs.
* M680X: Remove insn id string list from tests (C/python/java/ocaml).
* M680X: SEXW, set access of reg. D to WRITE.
* M680X: Sort changed_regs in increasing m680x_insn order.
* M680X: Add M68HC11 support + Reduced from two to one INDEXED operand.
* M680X: cstool, also write '(in mnemonic)' for second reg. operand.
* M680X: Add BRN/LBRN to group JUMP and BRAREL.
* M680X: For Bcc/LBcc/BRSET/BRCLR set reg. CC to read access.
* M680X: Correctly print negative immediate values with option CS_OPT_UNSIGNED.
* M680X: Rename some instruction handlers.
* M680X: Add M68HC05 support.
* M680X: Dont print prefix '<' for direct addr. mode.
* M680X: Add M68HC08 support + resorted tables + bug fixes.
* M680X: Add Freescale HCS08 support.
* M680X: Changed group names, avoid spaces.
* M680X: Refactoring, rename addessing mode handlers.
* M680X: indexed addr. mode, changed pre/post inc-/decrement representation.
* M680X: Rename some M6809/HD6309 specific functions.
* M680X: Add CPU12 (68HC12/HCS12) support.
* M680X: Correctly display illegal instruction as FCB .
* M680X: bugfix: BRA/BRN/BSR/LBRA/LBRN/LBSR does not read CC reg.
* M680X: bugfix: Correctly check for sufficient code size for M6809 indexed addressing.
* M680X: Better support for changing insn id within handler for addessing mode.
* M680X: Remove warnings.
* M680X: In set_changed_regs_read_write_counts use own access_mode.
* M680X: Split cpu specific tables into separate *.inc files.
* M680X: Remove warnings.
* M680X: Removed address_mode. Addressing mode is available in operand.type
* M680X: Bugfix: BSET/BCLR/BRSET/BRCLR correct read/modify CC reg.
* M680X: Remove register TMP1. It is first visible in CPU12X.
* M680X: Performance improvement + bug fixes.
* M680X: Performance improvement, make cpu_tables const static.
* M680X: Simplify operand decoding by using two handlers.
* M680X: Replace M680X_OP_INDEX by M680X_OP_CONSTANT + bugfix in java/python/ocaml bindings.
* M680X: Format with astyle.
* M680X: Update documentation.
* M680X: Corrected author for m680x specific files.
* M680X: Make max. number of architectures single source.
2017-10-21 13:44:36 +00:00
|
|
|
source_group("Include\\M680X" FILES ${HEADERS_MC680X})
|
2018-03-31 09:29:22 +00:00
|
|
|
source_group("Include\\EVM" FILES ${HEADERS_EVM})
|
2019-02-01 15:03:47 +00:00
|
|
|
source_group("Include\\WASM" FILES ${HEADERS_WASM})
|
2018-12-02 20:39:41 +00:00
|
|
|
source_group("Include\\MOS65XX" FILES ${HEADERS_MOS65XX})
|
2015-04-15 18:31:32 +00:00
|
|
|
|
2017-07-18 00:26:39 +00:00
|
|
|
### test library 64bit routine:
|
|
|
|
|
get_property(LIB64 GLOBAL PROPERTY FIND_LIBRARY_USE_LIB64_PATHS)
|
|
|
|
|
|
2017-07-19 14:46:38 +00:00
|
|
|
if (NOT APPLE AND "${LIB64}" STREQUAL "TRUE")
|
2017-07-18 00:26:39 +00:00
|
|
|
set(LIBSUFFIX 64)
|
|
|
|
|
else()
|
|
|
|
|
set(LIBSUFFIX "")
|
|
|
|
|
endif()
|
|
|
|
|
|
|
|
|
|
set(INSTALL_LIB_DIR lib${LIBSUFFIX} CACHE PATH "Installation directory for libraries")
|
|
|
|
|
mark_as_advanced(INSTALL_LIB_DIR)
|
|
|
|
|
|
2014-06-03 21:04:23 +00:00
|
|
|
## installation
|
2015-04-23 18:39:48 +00:00
|
|
|
install(FILES ${HEADERS_COMMON} DESTINATION include/capstone)
|
2018-10-23 22:42:36 +00:00
|
|
|
configure_file(capstone.pc.in ${CMAKE_BINARY_DIR}/capstone.pc @ONLY)
|
2014-05-28 13:55:37 +00:00
|
|
|
|
2014-09-19 16:39:22 +00:00
|
|
|
if (CAPSTONE_BUILD_STATIC)
|
2014-06-03 21:04:23 +00:00
|
|
|
install(TARGETS capstone-static
|
|
|
|
|
RUNTIME DESTINATION bin
|
2017-07-18 00:26:39 +00:00
|
|
|
LIBRARY DESTINATION ${INSTALL_LIB_DIR}
|
|
|
|
|
ARCHIVE DESTINATION ${INSTALL_LIB_DIR})
|
2014-06-03 21:04:23 +00:00
|
|
|
endif ()
|
|
|
|
|
|
2014-09-19 16:39:22 +00:00
|
|
|
if (CAPSTONE_BUILD_SHARED)
|
2014-06-03 21:04:23 +00:00
|
|
|
install(TARGETS capstone-shared
|
|
|
|
|
RUNTIME DESTINATION bin
|
2017-07-18 00:26:39 +00:00
|
|
|
LIBRARY DESTINATION ${INSTALL_LIB_DIR}
|
|
|
|
|
ARCHIVE DESTINATION ${INSTALL_LIB_DIR})
|
2014-06-03 21:04:23 +00:00
|
|
|
endif ()
|
2016-10-11 08:50:51 +00:00
|
|
|
|
2018-04-26 02:15:59 +00:00
|
|
|
if (CAPSTONE_BUILD_SHARED AND CAPSTONE_BUILD_CSTOOL)
|
2016-10-19 15:01:31 +00:00
|
|
|
FILE(GLOB CSTOOL_SRC cstool/*.c)
|
|
|
|
|
add_executable(cstool ${CSTOOL_SRC})
|
2016-10-11 15:21:12 +00:00
|
|
|
target_link_libraries(cstool ${default-target})
|
|
|
|
|
|
|
|
|
|
install(TARGETS cstool DESTINATION bin)
|
2017-04-30 09:48:23 +00:00
|
|
|
install(FILES ${CMAKE_BINARY_DIR}/capstone.pc DESTINATION lib/pkgconfig)
|
2016-10-11 15:21:12 +00:00
|
|
|
endif ()
|