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capstone/CREDITS.TXT

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initial import
2013-11-27 04:11:31 +00:00
This file credits all the contributors of the Capstone engine project.
Key developers
==============
1. Nguyen Anh Quynh <aquynh -at- gmail.com>
- Core engine
- Bindings: Python, Ruby, OCaml, Java, C#
2. Tan Sheng Di <shengdi -at- coseinc.com>
- Bindings: Ruby
3. Ben Nagy <ben -at- coseinc.com>
- Bindings: Ruby, Go
4. Dang Hoang Vu <dang.hvu -at- gmail.com>
- Bindings: Java
update CREDITS.TXT to credit beta-testers
2013-11-27 08:15:38 +00:00
Beta testers (in random order)
==============================
Pancake
Van Hauser
FX of Phenoelit
double credits for our hero The Grugq :-)
2013-11-27 09:00:32 +00:00
The Grugq, The Grugq <-- our hero for submitting the first ever patch!
update CREDITS.TXT to credit beta-testers
2013-11-27 08:15:38 +00:00
Isaac Dawson, Veracode Inc
Patroklos Argyroudis, Census Inc. (http://census-labs.com)
Attila Suszter
Le Dinh Long
Nicolas Ruff
Gunther
Alex Ionescu, Winsider Seminars & Solutions Inc.
Snare
update CREDITS
2013-11-27 14:19:58 +00:00
Daniel Godas-Lopez
update CREDITS
2013-11-27 10:03:59 +00:00
Joshua J. Drake
update CREDITS
2013-11-27 13:24:39 +00:00
Edgar Barbosa
update CREDITS
2013-11-27 14:29:29 +00:00
Ralf-Philipp Weinmann
update CREDITS
2013-12-01 15:47:11 +00:00
Hugo Fortier
update CREDITS
2013-12-03 09:26:57 +00:00
Joxean Koret
update CREDITS
2013-12-04 04:14:28 +00:00
Bruce Dang
CREDITS.TXT
2013-12-05 02:08:03 +00:00
Andrew Dunham
update CREDITS.TXT
2014-05-01 13:44:45 +00:00
Contributors (in no particular order)
=====================================
(Please let us know if you want to have your name here)
Ole André Vadla Ravnås (author of the 100th Pull-Request in our Github repo, thanks!)
update CREDITS.TXT
2014-05-15 14:01:15 +00:00
Axel "0vercl0k" Souchet (@0vercl0k) & Alex Ionescu: port to MSVC.
update CREDITS.TXT
2014-05-28 08:37:01 +00:00
Daniel Pistelli: Cmake support.
update CREDITS.TXT
2014-05-31 04:12:18 +00:00
Peter Hlavaty: integrate Capstone for Windows kernel drivers.
update CREDITS.TXT
2014-06-26 14:49:16 +00:00
Guillaume Jeanne: Ocaml binding.
update CREDITS.TXT
2014-09-16 00:42:20 +00:00
Martin Tofall, Obsidium Software: Optimize X86 performance & size.
update CREDITS.TXT
2015-05-13 09:23:29 +00:00
David Martínez Moreno & Hilko Bengen: Debian package.
update CREDITS
2014-10-06 16:20:42 +00:00
Félix Cloutier: Xcode project.
update CREDITS
2014-10-06 16:33:35 +00:00
Benoit Lecocq: OpenBSD package.
update CREDITS.TXT
2014-10-15 12:54:00 +00:00
Christophe Avoinne (Hlide): Improve memory management for better performance.
update CREDITS.TXT
2015-01-30 02:54:52 +00:00
Michael Cohen & Nguyen Tan Cong: Python module installer.
update CREDITS.TXT
2015-02-24 14:05:48 +00:00
Bui Dinh Cuong: Explicit registers accessed for Arm64.
update CREDITS.TXT
2015-02-24 15:33:04 +00:00
Vincent Bénony: Explicit registers accessed for X86.
update CREDITS.TXT
2015-05-13 08:09:26 +00:00
Adel Gadllah, Francisco Alonso & Stefan Cornelius: RPM package.
update CREDITS.TXT
2015-06-16 09:18:26 +00:00
Felix Gröbert (Google): fuzz testing harness.
update CREDITS.TXT
2015-10-06 13:56:36 +00:00
Daniel Collin & Nicolas Planel: M68K architecture.
update CREDITS.TXT
2016-03-01 03:09:17 +00:00
Pranith Kumar: Explicit registers accessed for Arm64.
port Windows driver support
2016-05-12 04:48:32 +00:00
Xipiter LLC: Capstone logo redesigned.
Satoshi Tanda: Support Windows kernel driver.
Added documentation for building for Windows CE.
2016-04-12 07:26:47 +00:00
Koutheir Attouchi: Support for Windows CE.
TMS320C64x support at tests and const generator.
2016-05-03 13:37:52 +00:00
Fotis Loukos: TMS320C64x architecture.
M680X: Target ready for pull request (#1034) * Added new M680X target. Supports M6800/1/2/3/9, HD6301 * M680X: Reformat for coding guide lines. Set alphabetical order in HACK.TXT * M680X: Prepare for python binding. Move cs_m680x, m680x_insn to m680x_info. Chec > k cpu type, no default. * M680X: Add python bindings. Added python tests. * M680X: Added cpu types to usage message. * cstool: Avoid segfault for invalid <arch+mode>. * Make test_m680x.c/test_m680x.py output comparable (diff params: -bu). Keep xprint.py untouched. * M680X: Update CMake/make for m680x support. Update .gitignore. * M680X: Reduce compiler warnings. * M680X: Reduce compiler warnings. * M680X: Reduce compiler warnings. * M680X: Make test_m680x.c/test_m680x.py output comparable (diff params: -bu). * M680X: Add ocaml bindings and tests. * M680X: Add java bindings and tests. * M680X: Added tests for all indexed addressing modes. C/Python/Ocaml * M680X: Naming, use page1 for PAGE1 instructions (without prefix). * M680X: Naming, use page1 for PAGE1 instructions (without prefix). * M680X: Used M680X_FIRST_OP_IN_MNEM in tests C/python/java/ocaml. * M680X: Added access property to cs_m680x_op. * M680X: Added operand size. * M680X: Remove compiler warnings. * M680X: Added READ/WRITE access property per operator. * M680X: Make reg_inherent_hdlr independent of CPU type. * M680X: Add HD6309 support + bug fixes * M680X: Remove errors and warning. * M680X: Add Bcc/LBcc to group BRAREL (relative branch). * M680X: Add group JUMP to BVS/BVC/LBVS/LBVC. Remove BRAREL from BRN/LBRN. * M680X: Remove LBRN from group BRAREL. * M680X: Refactored cpu_type initialization for better readability. * M680X: Add two operands for insn having two reg. in mnemonic. e.g. ABX. * M680X: Remove typo in cstool.c * M680X: Some format improvements in changed_regs. * M680X: Remove insn id string list from tests (C/python/java/ocaml). * M680X: SEXW, set access of reg. D to WRITE. * M680X: Sort changed_regs in increasing m680x_insn order. * M680X: Add M68HC11 support + Reduced from two to one INDEXED operand. * M680X: cstool, also write '(in mnemonic)' for second reg. operand. * M680X: Add BRN/LBRN to group JUMP and BRAREL. * M680X: For Bcc/LBcc/BRSET/BRCLR set reg. CC to read access. * M680X: Correctly print negative immediate values with option CS_OPT_UNSIGNED. * M680X: Rename some instruction handlers. * M680X: Add M68HC05 support. * M680X: Dont print prefix '<' for direct addr. mode. * M680X: Add M68HC08 support + resorted tables + bug fixes. * M680X: Add Freescale HCS08 support. * M680X: Changed group names, avoid spaces. * M680X: Refactoring, rename addessing mode handlers. * M680X: indexed addr. mode, changed pre/post inc-/decrement representation. * M680X: Rename some M6809/HD6309 specific functions. * M680X: Add CPU12 (68HC12/HCS12) support. * M680X: Correctly display illegal instruction as FCB . * M680X: bugfix: BRA/BRN/BSR/LBRA/LBRN/LBSR does not read CC reg. * M680X: bugfix: Correctly check for sufficient code size for M6809 indexed addressing. * M680X: Better support for changing insn id within handler for addessing mode. * M680X: Remove warnings. * M680X: In set_changed_regs_read_write_counts use own access_mode. * M680X: Split cpu specific tables into separate *.inc files. * M680X: Remove warnings. * M680X: Removed address_mode. Addressing mode is available in operand.type * M680X: Bugfix: BSET/BCLR/BRSET/BRCLR correct read/modify CC reg. * M680X: Remove register TMP1. It is first visible in CPU12X. * M680X: Performance improvement + bug fixes. * M680X: Performance improvement, make cpu_tables const static. * M680X: Simplify operand decoding by using two handlers. * M680X: Replace M680X_OP_INDEX by M680X_OP_CONSTANT + bugfix in java/python/ocaml bindings. * M680X: Format with astyle. * M680X: Update documentation. * M680X: Corrected author for m680x specific files. * M680X: Make max. number of architectures single source.
2017-10-21 13:44:36 +00:00
Wolfgang Schwotzer: M680X architecture.
Adds Philippe Antoine (Catena cyber) to credits (#1153)
2018-06-01 14:41:17 +00:00
Philippe Antoine: Integration with oss-fuzz and various fixes.
Merges encoding to next (#1194) * merge encoding branch into next branch * added python bindings and updated test to support encoding * fix python import * fix py binding fields * fix disp size printing * fixed py binding, again * Update CREDITS.TXT * fixed formatting and a cast * Changed param from int to uint8_t, fixed warnings
2018-07-04 14:47:55 +00:00
Martin (obs1dium): x86 encoding features
Stephen Eckels (stevemk14ebr): x86 encoding features
M680X: Target ready for pull request (#1034) * Added new M680X target. Supports M6800/1/2/3/9, HD6301 * M680X: Reformat for coding guide lines. Set alphabetical order in HACK.TXT * M680X: Prepare for python binding. Move cs_m680x, m680x_insn to m680x_info. Chec > k cpu type, no default. * M680X: Add python bindings. Added python tests. * M680X: Added cpu types to usage message. * cstool: Avoid segfault for invalid <arch+mode>. * Make test_m680x.c/test_m680x.py output comparable (diff params: -bu). Keep xprint.py untouched. * M680X: Update CMake/make for m680x support. Update .gitignore. * M680X: Reduce compiler warnings. * M680X: Reduce compiler warnings. * M680X: Reduce compiler warnings. * M680X: Make test_m680x.c/test_m680x.py output comparable (diff params: -bu). * M680X: Add ocaml bindings and tests. * M680X: Add java bindings and tests. * M680X: Added tests for all indexed addressing modes. C/Python/Ocaml * M680X: Naming, use page1 for PAGE1 instructions (without prefix). * M680X: Naming, use page1 for PAGE1 instructions (without prefix). * M680X: Used M680X_FIRST_OP_IN_MNEM in tests C/python/java/ocaml. * M680X: Added access property to cs_m680x_op. * M680X: Added operand size. * M680X: Remove compiler warnings. * M680X: Added READ/WRITE access property per operator. * M680X: Make reg_inherent_hdlr independent of CPU type. * M680X: Add HD6309 support + bug fixes * M680X: Remove errors and warning. * M680X: Add Bcc/LBcc to group BRAREL (relative branch). * M680X: Add group JUMP to BVS/BVC/LBVS/LBVC. Remove BRAREL from BRN/LBRN. * M680X: Remove LBRN from group BRAREL. * M680X: Refactored cpu_type initialization for better readability. * M680X: Add two operands for insn having two reg. in mnemonic. e.g. ABX. * M680X: Remove typo in cstool.c * M680X: Some format improvements in changed_regs. * M680X: Remove insn id string list from tests (C/python/java/ocaml). * M680X: SEXW, set access of reg. D to WRITE. * M680X: Sort changed_regs in increasing m680x_insn order. * M680X: Add M68HC11 support + Reduced from two to one INDEXED operand. * M680X: cstool, also write '(in mnemonic)' for second reg. operand. * M680X: Add BRN/LBRN to group JUMP and BRAREL. * M680X: For Bcc/LBcc/BRSET/BRCLR set reg. CC to read access. * M680X: Correctly print negative immediate values with option CS_OPT_UNSIGNED. * M680X: Rename some instruction handlers. * M680X: Add M68HC05 support. * M680X: Dont print prefix '<' for direct addr. mode. * M680X: Add M68HC08 support + resorted tables + bug fixes. * M680X: Add Freescale HCS08 support. * M680X: Changed group names, avoid spaces. * M680X: Refactoring, rename addessing mode handlers. * M680X: indexed addr. mode, changed pre/post inc-/decrement representation. * M680X: Rename some M6809/HD6309 specific functions. * M680X: Add CPU12 (68HC12/HCS12) support. * M680X: Correctly display illegal instruction as FCB . * M680X: bugfix: BRA/BRN/BSR/LBRA/LBRN/LBSR does not read CC reg. * M680X: bugfix: Correctly check for sufficient code size for M6809 indexed addressing. * M680X: Better support for changing insn id within handler for addessing mode. * M680X: Remove warnings. * M680X: In set_changed_regs_read_write_counts use own access_mode. * M680X: Split cpu specific tables into separate *.inc files. * M680X: Remove warnings. * M680X: Removed address_mode. Addressing mode is available in operand.type * M680X: Bugfix: BSET/BCLR/BRSET/BRCLR correct read/modify CC reg. * M680X: Remove register TMP1. It is first visible in CPU12X. * M680X: Performance improvement + bug fixes. * M680X: Performance improvement, make cpu_tables const static. * M680X: Simplify operand decoding by using two handlers. * M680X: Replace M680X_OP_INDEX by M680X_OP_CONSTANT + bugfix in java/python/ocaml bindings. * M680X: Format with astyle. * M680X: Update documentation. * M680X: Corrected author for m680x specific files. * M680X: Make max. number of architectures single source.
2017-10-21 13:44:36 +00:00
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