From 037e01f94296afded61c5297ca8791b28492a9b0 Mon Sep 17 00:00:00 2001 From: Nguyen Anh Quynh Date: Mon, 9 Mar 2015 21:36:02 +0800 Subject: [PATCH] core: remove unused Subregister indices for Sparc, PPC, SystemZ & Mips --- arch/Mips/MipsGenRegisterInfo.inc | 17 ----------------- arch/PowerPC/PPCGenRegisterInfo.inc | 12 ------------ arch/Sparc/SparcGenRegisterInfo.inc | 11 ----------- arch/SystemZ/SystemZGenRegisterInfo.inc | 12 ------------ 4 files changed, 52 deletions(-) diff --git a/arch/Mips/MipsGenRegisterInfo.inc b/arch/Mips/MipsGenRegisterInfo.inc index f47d08722..cdce182f7 100644 --- a/arch/Mips/MipsGenRegisterInfo.inc +++ b/arch/Mips/MipsGenRegisterInfo.inc @@ -477,23 +477,6 @@ enum { Mips_ACC128RegClassID = 61, }; -// Subregister indices -enum { - Mips_NoSubRegister, - Mips_sub_32, // 1 - Mips_sub_64, // 2 - Mips_sub_dsp16_19, // 3 - Mips_sub_dsp20, // 4 - Mips_sub_dsp21, // 5 - Mips_sub_dsp22, // 6 - Mips_sub_dsp23, // 7 - Mips_sub_hi, // 8 - Mips_sub_lo, // 9 - Mips_sub_hi_then_sub_32, // 10 - Mips_sub_32_sub_hi_then_sub_32, // 11 - Mips_NUM_TARGET_SUBREGS -}; - #endif // GET_REGINFO_ENUM /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ diff --git a/arch/PowerPC/PPCGenRegisterInfo.inc b/arch/PowerPC/PPCGenRegisterInfo.inc index 7db56e1f2..61223217c 100644 --- a/arch/PowerPC/PPCGenRegisterInfo.inc +++ b/arch/PowerPC/PPCGenRegisterInfo.inc @@ -354,18 +354,6 @@ enum { PPC_QFRCRegClassID = 22, }; -// Subregister indices -enum { - PPC_NoSubRegister, - PPC_sub_32, // 1 - PPC_sub_64, // 2 - PPC_sub_128, // 3 - PPC_sub_eq, // 4 - PPC_sub_gt, // 5 - PPC_sub_lt, // 6 - PPC_sub_un, // 7 - PPC_NUM_TARGET_SUBREGS -}; #endif // GET_REGINFO_ENUM /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ diff --git a/arch/Sparc/SparcGenRegisterInfo.inc b/arch/Sparc/SparcGenRegisterInfo.inc index 11a15f883..c8b2c1c98 100644 --- a/arch/Sparc/SparcGenRegisterInfo.inc +++ b/arch/Sparc/SparcGenRegisterInfo.inc @@ -148,17 +148,6 @@ enum { SP_QFPRegs_with_sub_evenRegClassID = 7 }; -// Subregister indices -enum { - SP_NoSubRegister, - SP_sub_even, // 1 - SP_sub_even64, // 2 - SP_sub_odd, // 3 - SP_sub_odd64, // 4 - SP_sub_odd64_then_sub_even, // 5 - SP_sub_odd64_then_sub_odd, // 6 - SP_NUM_TARGET_SUBREGS -}; #endif // GET_REGINFO_ENUM /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ diff --git a/arch/SystemZ/SystemZGenRegisterInfo.inc b/arch/SystemZ/SystemZGenRegisterInfo.inc index 8ccf707e4..c912ed3e3 100644 --- a/arch/SystemZ/SystemZGenRegisterInfo.inc +++ b/arch/SystemZ/SystemZGenRegisterInfo.inc @@ -131,18 +131,6 @@ enum { SystemZ_ADDR128BitRegClassID = 11 }; -// Subregister indices -enum { - SystemZ_NoSubRegister, - SystemZ_subreg_h32, // 1 - SystemZ_subreg_h64, // 2 - SystemZ_subreg_hh32, // 3 - SystemZ_subreg_hl32, // 4 - SystemZ_subreg_l32, // 5 - SystemZ_subreg_l64, // 6 - SystemZ_NUM_TARGET_SUBREGS -}; - #endif // GET_REGINFO_ENUM /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\