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sparc: use CreateImm0() & CreateReg0() to create MCOperand* to avoid using malloc/free

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This commit is contained in:
Nguyen Anh Quynh 2014-06-16 12:57:02 +08:00
parent 9b91de0ae3
commit 3d3b6cec01
2 changed files with 39 additions and 39 deletions
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24
arch/Sparc/SparcDisassembler.c
View File

@ -93,7 +93,7 @@ static DecodeStatus DecodeIntRegsRegisterClass(MCInst *Inst, unsigned RegNo,
return MCDisassembler_Fail;
Reg = IntRegDecoderTable[RegNo];
MCInst_addOperand(Inst, MCOperand_CreateReg(Reg));
MCOperand_CreateReg0(Inst, Reg);
return MCDisassembler_Success;
}
@ -107,7 +107,7 @@ static DecodeStatus DecodeI64RegsRegisterClass(MCInst *Inst, unsigned RegNo,
return MCDisassembler_Fail;
Reg = IntRegDecoderTable[RegNo];
MCInst_addOperand(Inst, MCOperand_CreateReg(Reg));
MCOperand_CreateReg0(Inst, Reg);
return MCDisassembler_Success;
}
@ -121,7 +121,7 @@ static DecodeStatus DecodeFPRegsRegisterClass(MCInst *Inst, unsigned RegNo,
return MCDisassembler_Fail;
Reg = FPRegDecoderTable[RegNo];
MCInst_addOperand(Inst, MCOperand_CreateReg(Reg));
MCOperand_CreateReg0(Inst, Reg);
return MCDisassembler_Success;
}
@ -135,7 +135,7 @@ static DecodeStatus DecodeDFPRegsRegisterClass(MCInst *Inst, unsigned RegNo,
return MCDisassembler_Fail;
Reg = DFPRegDecoderTable[RegNo];
MCInst_addOperand(Inst, MCOperand_CreateReg(Reg));
MCOperand_CreateReg0(Inst, Reg);
return MCDisassembler_Success;
}
@ -152,7 +152,7 @@ static DecodeStatus DecodeQFPRegsRegisterClass(MCInst *Inst, unsigned RegNo,
if (Reg == ~0U)
return MCDisassembler_Fail;
MCInst_addOperand(Inst, MCOperand_CreateReg(Reg));
MCOperand_CreateReg0(Inst, Reg);
return MCDisassembler_Success;
}
@ -163,7 +163,7 @@ static DecodeStatus DecodeFCCRegsRegisterClass(MCInst *Inst, unsigned RegNo,
if (RegNo > 3)
return MCDisassembler_Fail;
MCInst_addOperand(Inst, MCOperand_CreateReg(FCCRegDecoderTable[RegNo]));
MCOperand_CreateReg0(Inst, FCCRegDecoderTable[RegNo]);
return MCDisassembler_Success;
}
@ -277,7 +277,7 @@ static DecodeStatus DecodeMem(MCInst *MI, unsigned insn, uint64_t Address,
// Decode imm|rs2.
if (isImm)
MCInst_addOperand(MI, MCOperand_CreateImm(simm13));
MCOperand_CreateImm0(MI, simm13);
else {
status = DecodeIntRegsRegisterClass(MI, rs2, Address, Decoder);
if (status != MCDisassembler_Success)
@ -355,7 +355,7 @@ static DecodeStatus DecodeCall(MCInst *MI, unsigned insn,
unsigned tgt = fieldFromInstruction_4(insn, 0, 30);
tgt <<= 2;
MCInst_addOperand(MI, MCOperand_CreateImm(tgt));
MCOperand_CreateImm0(MI, tgt);
return MCDisassembler_Success;
}
@ -365,7 +365,7 @@ static DecodeStatus DecodeSIMM13(MCInst *MI, unsigned insn,
{
unsigned tgt = SignExtend32(fieldFromInstruction_4(insn, 0, 13), 13);
MCInst_addOperand(MI, MCOperand_CreateImm(tgt));
MCOperand_CreateImm0(MI, tgt);
return MCDisassembler_Success;
}
@ -397,7 +397,7 @@ static DecodeStatus DecodeJMPL(MCInst *MI, unsigned insn, uint64_t Address,
// Decode RS1 | SIMM13.
if (isImm)
MCInst_addOperand(MI, MCOperand_CreateImm(simm13));
MCOperand_CreateImm0(MI, simm13);
else {
status = DecodeIntRegsRegisterClass(MI, rs2, Address, Decoder);
if (status != MCDisassembler_Success)
@ -427,7 +427,7 @@ static DecodeStatus DecodeReturn(MCInst *MI, unsigned insn, uint64_t Address,
// Decode RS2 | SIMM13.
if (isImm)
MCInst_addOperand(MI, MCOperand_CreateImm(simm13));
MCOperand_CreateImm0(MI, simm13);
else {
status = DecodeIntRegsRegisterClass(MI, rs2, Address, Decoder);
if (status != MCDisassembler_Success)
@ -464,7 +464,7 @@ static DecodeStatus DecodeSWAP(MCInst *MI, unsigned insn, uint64_t Address,
// Decode RS1 | SIMM13.
if (isImm)
MCInst_addOperand(MI, MCOperand_CreateImm(simm13));
MCOperand_CreateImm0(MI, simm13);
else {
status = DecodeIntRegsRegisterClass(MI, rs2, Address, Decoder);
if (status != MCDisassembler_Success)

54
arch/Sparc/SparcGenDisassemblerTables.inc
View File

@ -1462,19 +1462,19 @@ static DecodeStatus fname(DecodeStatus S, unsigned Idx, InsnType insn, MCInst *M
default: \
case 0: \
tmp = fieldname(insn, 0, 22); \
MCInst_addOperand(MI, MCOperand_CreateImm(tmp)); \
MCOperand_CreateImm0(MI, tmp); \
return S; \
case 1: \
tmp = fieldname(insn, 0, 19); \
MCInst_addOperand(MI, MCOperand_CreateImm(tmp)); \
MCOperand_CreateImm0(MI, tmp); \
tmp = fieldname(insn, 25, 4); \
MCInst_addOperand(MI, MCOperand_CreateImm(tmp)); \
MCOperand_CreateImm0(MI, tmp); \
return S; \
case 2: \
tmp = fieldname(insn, 0, 22); \
MCInst_addOperand(MI, MCOperand_CreateImm(tmp)); \
MCOperand_CreateImm0(MI, tmp); \
tmp = fieldname(insn, 25, 4); \
MCInst_addOperand(MI, MCOperand_CreateImm(tmp)); \
MCOperand_CreateImm0(MI, tmp); \
return S; \
case 3: \
tmp = fieldname(insn, 14, 5); \
@ -1482,7 +1482,7 @@ static DecodeStatus fname(DecodeStatus S, unsigned Idx, InsnType insn, MCInst *M
tmp = 0; \
tmp |= (fieldname(insn, 0, 14) << 0); \
tmp |= (fieldname(insn, 20, 2) << 14); \
MCInst_addOperand(MI, MCOperand_CreateImm(tmp)); \
MCOperand_CreateImm0(MI, tmp); \
return S; \
case 4: \
return S; \
@ -1490,13 +1490,13 @@ static DecodeStatus fname(DecodeStatus S, unsigned Idx, InsnType insn, MCInst *M
tmp = fieldname(insn, 25, 5); \
if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 22); \
MCInst_addOperand(MI, MCOperand_CreateImm(tmp)); \
MCOperand_CreateImm0(MI, tmp); \
return S; \
case 6: \
tmp = fieldname(insn, 0, 19); \
MCInst_addOperand(MI, MCOperand_CreateImm(tmp)); \
MCOperand_CreateImm0(MI, tmp); \
tmp = fieldname(insn, 25, 4); \
MCInst_addOperand(MI, MCOperand_CreateImm(tmp)); \
MCOperand_CreateImm0(MI, tmp); \
tmp = fieldname(insn, 20, 2); \
if (DecodeFCCRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
return S; \
@ -1534,7 +1534,7 @@ static DecodeStatus fname(DecodeStatus S, unsigned Idx, InsnType insn, MCInst *M
tmp = fieldname(insn, 14, 5); \
if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 13); \
MCInst_addOperand(MI, MCOperand_CreateImm(tmp)); \
MCOperand_CreateImm0(MI, tmp); \
return S; \
case 12: \
tmp = fieldname(insn, 14, 5); \
@ -1562,7 +1562,7 @@ static DecodeStatus fname(DecodeStatus S, unsigned Idx, InsnType insn, MCInst *M
tmp = fieldname(insn, 14, 5); \
if (DecodeI64RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 6); \
MCInst_addOperand(MI, MCOperand_CreateImm(tmp)); \
MCOperand_CreateImm0(MI, tmp); \
return S; \
case 16: \
tmp = fieldname(insn, 0, 13); \
@ -1576,7 +1576,7 @@ static DecodeStatus fname(DecodeStatus S, unsigned Idx, InsnType insn, MCInst *M
tmp = fieldname(insn, 25, 5); \
if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
tmp = fieldname(insn, 14, 4); \
MCInst_addOperand(MI, MCOperand_CreateImm(tmp)); \
MCOperand_CreateImm0(MI, tmp); \
return S; \
case 18: \
tmp = fieldname(insn, 25, 5); \
@ -1588,17 +1588,17 @@ static DecodeStatus fname(DecodeStatus S, unsigned Idx, InsnType insn, MCInst *M
tmp = fieldname(insn, 25, 5); \
if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
tmp = fieldname(insn, 14, 4); \
MCInst_addOperand(MI, MCOperand_CreateImm(tmp)); \
MCOperand_CreateImm0(MI, tmp); \
return S; \
case 19: \
tmp = fieldname(insn, 25, 5); \
if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 11); \
MCInst_addOperand(MI, MCOperand_CreateImm(tmp)); \
MCOperand_CreateImm0(MI, tmp); \
tmp = fieldname(insn, 25, 5); \
if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
tmp = fieldname(insn, 14, 4); \
MCInst_addOperand(MI, MCOperand_CreateImm(tmp)); \
MCOperand_CreateImm0(MI, tmp); \
return S; \
case 20: \
tmp = fieldname(insn, 25, 5); \
@ -1606,11 +1606,11 @@ static DecodeStatus fname(DecodeStatus S, unsigned Idx, InsnType insn, MCInst *M
tmp = fieldname(insn, 11, 2); \
if (DecodeFCCRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 11); \
MCInst_addOperand(MI, MCOperand_CreateImm(tmp)); \
MCOperand_CreateImm0(MI, tmp); \
tmp = fieldname(insn, 25, 5); \
if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
tmp = fieldname(insn, 14, 4); \
MCInst_addOperand(MI, MCOperand_CreateImm(tmp)); \
MCOperand_CreateImm0(MI, tmp); \
return S; \
case 21: \
tmp = fieldname(insn, 25, 5); \
@ -1618,7 +1618,7 @@ static DecodeStatus fname(DecodeStatus S, unsigned Idx, InsnType insn, MCInst *M
tmp = fieldname(insn, 14, 5); \
if (DecodeI64RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 10); \
MCInst_addOperand(MI, MCOperand_CreateImm(tmp)); \
MCOperand_CreateImm0(MI, tmp); \
return S; \
case 22: \
tmp = fieldname(insn, 25, 5); \
@ -1722,7 +1722,7 @@ static DecodeStatus fname(DecodeStatus S, unsigned Idx, InsnType insn, MCInst *M
tmp = fieldname(insn, 25, 5); \
if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
tmp = fieldname(insn, 14, 4); \
MCInst_addOperand(MI, MCOperand_CreateImm(tmp)); \
MCOperand_CreateImm0(MI, tmp); \
return S; \
case 37: \
tmp = fieldname(insn, 25, 5); \
@ -1734,7 +1734,7 @@ static DecodeStatus fname(DecodeStatus S, unsigned Idx, InsnType insn, MCInst *M
tmp = fieldname(insn, 25, 5); \
if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
tmp = fieldname(insn, 14, 4); \
MCInst_addOperand(MI, MCOperand_CreateImm(tmp)); \
MCOperand_CreateImm0(MI, tmp); \
return S; \
case 38: \
tmp = fieldname(insn, 25, 5); \
@ -1744,7 +1744,7 @@ static DecodeStatus fname(DecodeStatus S, unsigned Idx, InsnType insn, MCInst *M
tmp = fieldname(insn, 25, 5); \
if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
tmp = fieldname(insn, 14, 4); \
MCInst_addOperand(MI, MCOperand_CreateImm(tmp)); \
MCOperand_CreateImm0(MI, tmp); \
return S; \
case 39: \
tmp = fieldname(insn, 25, 5); \
@ -1756,7 +1756,7 @@ static DecodeStatus fname(DecodeStatus S, unsigned Idx, InsnType insn, MCInst *M
tmp = fieldname(insn, 25, 5); \
if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
tmp = fieldname(insn, 14, 4); \
MCInst_addOperand(MI, MCOperand_CreateImm(tmp)); \
MCOperand_CreateImm0(MI, tmp); \
return S; \
case 40: \
tmp = fieldname(insn, 25, 5); \
@ -1766,7 +1766,7 @@ static DecodeStatus fname(DecodeStatus S, unsigned Idx, InsnType insn, MCInst *M
tmp = fieldname(insn, 25, 5); \
if (DecodeQFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
tmp = fieldname(insn, 14, 4); \
MCInst_addOperand(MI, MCOperand_CreateImm(tmp)); \
MCOperand_CreateImm0(MI, tmp); \
return S; \
case 41: \
tmp = fieldname(insn, 25, 5); \
@ -1778,7 +1778,7 @@ static DecodeStatus fname(DecodeStatus S, unsigned Idx, InsnType insn, MCInst *M
tmp = fieldname(insn, 25, 5); \
if (DecodeQFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
tmp = fieldname(insn, 14, 4); \
MCInst_addOperand(MI, MCOperand_CreateImm(tmp)); \
MCOperand_CreateImm0(MI, tmp); \
return S; \
case 42: \
tmp = fieldname(insn, 25, 5); \
@ -1878,15 +1878,15 @@ static DecodeStatus fname(DecodeStatus S, unsigned Idx, InsnType insn, MCInst *M
tmp = fieldname(insn, 0, 5); \
if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
tmp = fieldname(insn, 25, 4); \
MCInst_addOperand(MI, MCOperand_CreateImm(tmp)); \
MCOperand_CreateImm0(MI, tmp); \
return S; \
case 58: \
tmp = fieldname(insn, 14, 5); \
if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 8); \
MCInst_addOperand(MI, MCOperand_CreateImm(tmp)); \
MCOperand_CreateImm0(MI, tmp); \
tmp = fieldname(insn, 25, 4); \
MCInst_addOperand(MI, MCOperand_CreateImm(tmp)); \
MCOperand_CreateImm0(MI, tmp); \
return S; \
case 59: \
if (DecodeLoadInt(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \