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Documentation updates (#2476)

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* Remove Windows msvc project files and move build instructions to single BUILDING.md file.

* Move HACK.txt to Contributing and update it.

* Add refactoring guide.

* Add known bugs

* Remove compatibility headers.

* Fix smaller issues.

* Remove 'possible revert' column. People always can do manual changes.

* Move instruction alias description to the top

* Add table to general breaking changes.

* Update general release guide with the newest information.

* Highlight NanoMips and be more precise in writing.

* Add note about archs without alias.

* Add sentence about what is planned.

* Small corrections for Windows build instructions and debug macros.

* Fix rebase issues.

* Bring back make.sh for the CI
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@ -7,9 +7,8 @@ on:
- "ChangeLog" - "ChangeLog"
- "CREDITS.TXT" - "CREDITS.TXT"
- "COMPILE_MAKE.TXT" - "COMPILE_MAKE.TXT"
- "COMPILE_MSVC.TXT" - "BUILDING.md"
- "COMPILE_CMAKE.TXT" - "CONTRIBUTING.md"
- "HACK.TXT"
- "LICENSE.TXT" - "LICENSE.TXT"
- "LICENSE_LLVM.TXT" - "LICENSE_LLVM.TXT"
- "README.md" - "README.md"

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# Building Capstone
This guide describes how to build Capstone with `CMake`.
## Build commands
**Unix**
```bash
cmake -B build -DCMAKE_BUILD_TYPE=Release # For debug build change "Release" to "Debug"
cmake --build build
cmake --install build --prefix "<install-prefix>"
```
**Windows**
```bash
cmake.exe -B build
cmake.exe --build build --config Release # For debug build change "Release" to "Debug"
cmake.exe --install build
```
## Tailor Capstone to your needs.
Enable and disable options in the "configure" step (first `cmake` command from above).
Options are added with `-D<OPTION>=ON/OFF` or `-D<OPTION>=1/0`
### Exclude architecture modules
You can build Capstone with only the architectures you need.
By default all are enabled.
- `CAPSTONE_ARCHITECTURE_DEFAULT`: Whether all architectures are enabled by default.
- `CAPSTONE_ARM_SUPPORT`: Support ARM.
- `CAPSTONE_AARCH64_SUPPORT`: Support AARCH64.
- `CAPSTONE_ALPHA_SUPPORT`: Support Alpha.
- `CAPSTONE_HPPA_SUPPORT`: Support HPPA.
- `CAPSTONE_LOONGARCH_SUPPORT`: Support LoongArch.
- `CAPSTONE_M680X_SUPPORT`: Support M680X.
- `CAPSTONE_M68K_SUPPORT`: Support M68K.
- `CAPSTONE_MIPS_SUPPORT`: Support Mips.
- `CAPSTONE_MOS65XX_SUPPORT`: Support MOS65XX.
- `CAPSTONE_PPC_SUPPORT`: Support PPC.
- `CAPSTONE_SPARC_SUPPORT`: Support Sparc.
- `CAPSTONE_SYSTEMZ_SUPPORT`: Support SystemZ.
- `CAPSTONE_XCORE_SUPPORT`: Support XCore.
- `CAPSTONE_TRICORE_SUPPORT`: Support TriCore.
- `CAPSTONE_X86_SUPPORT`: Support X86.
- `CAPSTONE_TMS320C64X_SUPPORT`: Support TMS320C64X.
- `CAPSTONE_M680X_SUPPORT`: Support M680X.
- `CAPSTONE_EVM_SUPPORT`: Support EVM.
- `CAPSTONE_WASM_SUPPORT`: Support Web Assembly.
- `CAPSTONE_BPF_SUPPORT`: Support BPF.
- `CAPSTONE_RISCV_SUPPORT`: Support RISCV.
### Module registration
If you're building a static library that you intend to link into multiple consumers,
and they have differing architecture requirements, you may want `-DCAPSTONE_USE_ARCH_REGISTRATION=1`.
In your consumer code you can call `cs_arch_register_*()` to register the specific module for initialization.
In this way you only pay footprint size for the architectures you're actually using in each consumer,
without having to compile Capstone multiple times.
### Additional options
Capstone allows some more customization via the following options:
- `BUILD_SHARED_LIBS`: Build shared libraries.
- `CAPSTONE_BUILD_CSTOOL`: Enable/disable build of `cstool`. Default is enabled if build runs from the repository root.
- `CAPSTONE_USE_SYS_DYN_MEM`: change this to OFF to use your own dynamic memory management.
- `CAPSTONE_BUILD_MACOS_THIN`: MacOS only. Disables universal2 build. So you only get the binary for you processor architecture.
- `CAPSTONE_BUILD_DIET`: change this to ON to make the binaries more compact.
- `CAPSTONE_X86_REDUCE`: change this to ON to make X86 binary smaller.
- `CAPSTONE_X86_ATT_DISABLE`: change this to ON to disable AT&T syntax on x86.
By default, Capstone use system dynamic memory management, and both DIET and X86_REDUCE
modes are disabled. To use your own memory allocations, turn ON both DIET &
X86_REDUCE, run "cmake" with: `-DCAPSTONE_USE_SYS_DYN_MEM=0`, `-DCAPSTONE_BUILD_DIET=1`, `-DCAPSTONE_X86_REDUCE=1`
### Developer specific options
- `CAPSTONE_DEBUG`: Change this to ON to enable extra debug assertions. Automatically enabled with `Debug` build.
- `CAPSTONE_BUILD_CSTEST`: Build `cstest` in `suite/cstest/`. **Note:** `cstest` requires `libyaml` on your system. It attempts to build it from source otherwise.
- `CMAKE_EXPORT_COMPILE_COMMANDS`: To export `compile_commands.json` for `clangd` and other language servers.
- `ENABLE_ASAN`: Compiles Capstone with the address sanitizer.
- `ENABLE_COVERAGE`: Generate coverage files.
- `CAPSTONE_BUILD_LEGACY_TESTS`: Build some legacy integration tests.

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# https://cmake.org/cmake/help/latest/policy/CMP0042.html # https://cmake.org/cmake/help/latest/policy/CMP0042.html
cmake_policy(SET CMP0042 NEW) cmake_policy(SET CMP0042 NEW)
# https://cmake.org/cmake/help/latest/policy/CMP0091.html
# Enable support for MSVC_RUNTIME_LIBRARY
cmake_policy(SET CMP0091 NEW)
project(capstone project(capstone
VERSION 5.0 VERSION 5.0
) )

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This documentation explains how to compile Capstone with CMake, focus on
using Microsoft Visual C as the compiler.
To compile Capstone on Windows using Visual Studio, see COMPILE_MSVC.TXT.
*-*-*-*-*-*
This documentation requires CMake & Windows SDK or MS Visual Studio installed on
your machine.
Get CMake for free from http://www.cmake.org.
(0) Tailor Capstone to your need.
Out of architectures supported by Capstone, if you just need several selected archs,
run "cmake" with the unwanted archs disabled (set to 0) as followings.
- CAPSTONE_ARM_SUPPORT: support ARM. Run cmake with -DCAPSTONE_ARM_SUPPORT=0 to remove ARM.
- CAPSTONE_AARCH64_SUPPORT: support AARCH64. Run cmake with -DCAPSTONE_AARCH64_SUPPORT=0 to remove AARCH64.
- CAPSTONE_ALPHA_SUPPORT: support Alpha. Run cmake with -DCAPSTONE_ALPHA_SUPPORT=0 to remove Alpha.
- CAPSTONE_HPPA_SUPPORT: support HPPA. Run cmake with -DCAPSTONE_HPPA_SUPPORT=0 to remove HPPA.
- CAPSTONE_LOONGARCH_SUPPORT: support LoongArch. Run cmake with -DCAPSTONE_LOONGARCH_SUPPORT=0 to remove LoongArch.
- CAPSTONE_M680X_SUPPORT: support M680X. Run cmake with -DCAPSTONE_M680X_SUPPORT=0 to remove M680X.
- CAPSTONE_M68K_SUPPORT: support M68K. Run cmake with -DCAPSTONE_M68K_SUPPORT=0 to remove M68K.
- CAPSTONE_MIPS_SUPPORT: support Mips. Run cmake with -DCAPSTONE_MIPS_SUPPORT=0 to remove Mips.
- CAPSTONE_MOS65XX_SUPPORT: support MOS65XX. Run cmake with -DCAPSTONE_MOS65XX_SUPPORT=0 to remove MOS65XX.
- CAPSTONE_PPC_SUPPORT: support PPC. Run cmake with -DCAPSTONE_PPC_SUPPORT=0 to remove PPC.
- CAPSTONE_SPARC_SUPPORT: support Sparc. Run cmake with -DCAPSTONE_SPARC_SUPPORT=0 to remove Sparc.
- CAPSTONE_SYSTEMZ_SUPPORT: support SystemZ. Run cmake with -DCAPSTONE_SYSTEMZ_SUPPORT=0 to remove SystemZ.
- CAPSTONE_XCORE_SUPPORT: support XCore. Run cmake with -DCAPSTONE_XCORE_SUPPORT=0 to remove XCore.
- CAPSTONE_TRICORE_SUPPORT: support TriCore. Run cmake with -DCAPSTONE_TRICORE_SUPPORT=0 to remove TriCore.
- CAPSTONE_X86_SUPPORT: support X86. Run cmake with -DCAPSTONE_X86_SUPPORT=0 to remove X86.
- CAPSTONE_TMS320C64X_SUPPORT: support TMS320C64X. Run cmake with -DCAPSTONE_TMS320C64X_SUPPORT=0 to remove TMS320C64X.
- CAPSTONE_M680X_SUPPORT: support M680X. Run cmake with -DCAPSTONE_M680X_SUPPORT=0 to remove M680X.
- CAPSTONE_EVM_SUPPORT: support EVM. Run cmake with -DCAPSTONE_EVM_SUPPORT=0 to remove EVM.
- CAPSTONE_WASM_SUPPORT: support Web Assembly. Run cmake with -DCAPSTONE_WASM_SUPPORT=0 to remove WASM.
- CAPSTONE_BPF_SUPPORT: support BPF. Run cmake with -DCAPSTONE_BPF_SUPPORT=0 to remove BPF.
- CAPSTONE_RISCV_SUPPORT: support RISCV. Run cmake with -DCAPSTONE_RISCV_SUPPORT=0 to remove RISCV.
- CAPSTONE_ARCHITECTURE_DEFAULT: Whether architectures are enabled by default.
Set this of OFF with -DCAPSTONE_ARCHITECTURE_DEFAULT=OFF to disable all architectures by default.
You can then enable them again with one of the CAPSTONE_<ARCH>_SUPPORT options.
By default, all architectures are compiled in. If you're building a static library that you intend to link into
multiple consumers, and they have differing architecture requirements, you may want -DCAPSTONE_USE_ARCH_REGISTRATION=1
and call cs_arch_register_*() for the architectures you need in each particular consumer. In this way you only pay
footprint size for the architectures you're actually using in each consumer, without having to compile Capstone
multiple times.
Besides, Capstone also allows some more customization via following macros.
- CAPSTONE_USE_SYS_DYN_MEM: change this to OFF to use your own dynamic memory management.
- CAPSTONE_BUILD_DIET: change this to ON to make the binaries more compact.
- CAPSTONE_X86_REDUCE: change this to ON to make X86 binary smaller.
- CAPSTONE_X86_ATT_DISABLE: change this to ON to disable AT&T syntax on x86.
- CAPSTONE_DEBUG: change this to ON to enable extra debug assertions.
- CAPSTONE_BUILD_CSTEST: Build `cstest` in `suite/cstest/`. `cstest` requires `libyaml` on your system.
- ENABLE_ASAN: Compiles Capstone with the address sanitizer.
By default, Capstone use system dynamic memory management, and both DIET and X86_REDUCE
modes are disabled. To use your own memory allocations, turn ON both DIET &
X86_REDUCE, run "cmake" with: -DCAPSTONE_USE_SYS_DYN_MEM=0 -DCAPSTONE_BUILD_DIET=1 -DCAPSTONE_X86_REDUCE=1
For each option, refer to docs/README for more details.
(1) CMake allows you to generate different generators to build Capstone. Below is
some examples on how to build Capstone on Windows with CMake.
(*) You can let CMake select a generator for you. Do:
mkdir build
cd build
cmake ..
This last command is also where you can pass additional CMake configuration flags
using `-D<key>=<value>`.
For a debug build add `-DCMAKE_BUILD_TYPE=Debug`.
To export `compile_commands.json` add `-DCMAKE_EXPORT_COMPILE_COMMANDS=ON`.
Then to build use:
cmake --build . --config [Release/Debug]
(*) To build Capstone using Nmake of Windows SDK, do:
mkdir build
cd build
..\nmake.bat
After this, find the samples test*.exe, capstone.lib & capstone.dll
in the same directory.
(*) To build Capstone using Visual Studio, choose the generator accordingly to the
version of Visual Studio on your machine. For example, with Visual Studio 2013, do:
mkdir build
cd build
cmake -G "Visual Studio 12" ..
After this, find capstone.sln in the same directory. Open it with Visual Studio
and build the solution including libraries & all test as usual.
(2) You can make sure the prior steps successfully worked by launching one of the
testing binary (test*.exe).
(3) You can also enable just one specific architecture by passing the architecture name
to either the cmake.sh or nmake.bat scripts. e.g.:
../cmake.sh x86
Will just target the x86 architecture. The list of available architectures is: ARM,
AARCH64, M68K, MIPS, PowerPC, Sparc, SystemZ, XCore, x86, TMS320C64x, M680x, EVM, MOS65XX,
WASM, BPF, RISCV, Alpha, HPPA, LoongArch.
(4) You can also create an installation image with cmake, by using the 'install' target.
Use:
cmake --build . --config Release --target install
This will normally install an image in a default location (`C:\Program Files` on Windows),
so it's good to explicitly set this location when configuring CMake. Use: `-DCMAKE_INSTALL_PREFIX=image`
for instance, to put the installation in the 'image' subdirectory of the build directory.

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This documentation explains how to compile, install & run Capstone on MacOSX, This documentation explains how to compile, install & run Capstone on MacOSX,
Linux, *BSD & Solaris. We also show steps to cross-compile for Microsoft Windows. Linux, *BSD & Solaris. We also show steps to cross-compile for Microsoft Windows.
To natively compile for Windows using Microsoft Visual Studio, see COMPILE_MSVC.TXT. To natively compile for Windows using Microsoft Visual Studio, see BUILDING.md.
To compile using CMake, see COMPILE_CMAKE.TXT. To compile using CMake, see BUILDING.md.
To compile using XCode on MacOSX, see xcode/README.md. To compile using XCode on MacOSX, see xcode/README.md.

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This documentation explains how to compile Capstone on Windows using
Microsoft Visual Studio version 2010 or newer.
To compile Capstone on *nix, see COMPILE_CMAKE.TXT
To compile Capstone with CMake, see COMPILE_CMAKE.TXT
*-*-*-*-*-*
Capstone requires no prerequisite packages with default configurations, so it is
easy to compile & install. Open the Visual Studio solution "msvc/capstone.sln"
and follow the instructions below.
NOTE: This requires Visual Studio 2017 or newer versions.
If you wish to embed Capstone in a kernel driver Windows Driver Kit 8.1 Update 1
or newer versions are required.
(0) Tailor Capstone to your need.
Out of 9 architectures supported by Capstone (Arm, Arm64, M68K, Mips, PPC,
Sparc, SystemZ, X86 & XCore), if you just need several selected archs, choose
the ones you want to compile in by opening Visual Studio solution "msvc\capstone.sln",
then directly editing the projects "capstone_static" & "capstone_dll" for static
and dynamic libraries, respectively. This must be done before going to the next
steps.
In VisualStudio interface, modify the preprocessor definitions via
"Project Properties" -> "Configuration Properties" -> "C/C++" -> "Preprocessor"
to customize Capstone library, as followings.
- CAPSTONE_HAS_ARM: support ARM. Delete this to remove ARM support.
- CAPSTONE_HAS_AARCH64: support AARCH64. Delete this to remove AARCH64 support.
- CAPSTONE_HAS_ALPHA: support Alpha. Delete this to remove Alpha support.
- CAPSTONE_HAS_HPPA: support HPPA. Delete this to remove HPPA support.
- CAPSTONE_HAS_M68K: support M68K. Delete this to remove M68K support.
- CAPSTONE_HAS_MIPS: support Mips. Delete this to remove Mips support.
- CAPSTONE_HAS_POWERPC: support PPC. Delete this to remove PPC support.
- CAPSTONE_HAS_SPARC: support Sparc. Delete this to remove Sparc support.
- CAPSTONE_HAS_SYSZ: support SystemZ. Delete this to remove SystemZ support.
- CAPSTONE_HAS_X86: support X86. Delete this to remove X86 support.
- CAPSTONE_HAS_XCORE: support XCore. Delete this to remove XCore support.
- CAPSTONE_HAS_TRICORE: support TriCore. Delete this to remove TriCore support.
By default, all 11 architectures are compiled in.
Besides, Capstone also allows some more customization via following macros.
- CAPSTONE_USE_SYS_DYN_MEM: delete this to use your own dynamic memory management.
- CAPSTONE_DIET_NO: rename this to "CAPSTONE_DIET" to make the binaries more compact.
- CAPSTONE_X86_REDUCE_NO: rename this to "CAPSTONE_X86_REDUCE" to make X86 binary smaller.
- CAPSTONE_X86_ATT_DISABLE_NO: rename this to "CAPSTONE_X86_ATT_DISABLE" to disable
AT&T syntax on x86.
By default, Capstone use system dynamic memory management, and both DIET and X86_REDUCE
modes are disable.
For each option, refer to docs/README for more details.
(1) Compile from source on Windows with Visual Studio
- Choose the configuration and the platform you want: Release/Debug & Win32/Win64.
- Build only the libraries, or the libraries along with all the tests.
- "capstone_static_winkernel" is for compiling Capstone for a driver and
"test_winkernel" is a test for a driver, and those are excluded from build by
default. To compile them, open the Configuration Manager through the [Build]
menu and check "Build" check boxes for those project.
(2) You can make sure the prior steps successfully worked by launching one of the
testing binary (test*.exe).
The testing binary for a driver "test_winkernel.sys" is made up of all tests for
supported architectures configured with the step (0) along side its own tests.
Below explains a procedure to run the test driver and check test results.
On the x64 platform, the test signing mode has to be enabled to install the test
driver. To do it, open the command prompt with the administrator privileges and
type the following command, and then restart the system to activate the change:
>bcdedit /set testsigning on
Test results from the test driver is sent to kernel debug buffer. In order to
see those results, download DebugView and run it with the administrator
privileges, then check [Capture Kernel] through the [Capture] menu.
DebugView: https://technet.microsoft.com/en-us/sysinternals/debugview.aspx
To install and uninstall the driver, use the 'sc' command. For installing and
executing test_winkernel.sys, execute the following commands with the
administrator privileges:
>sc create test_winkernel type= kernel binPath= <full path to test_winkernel.sys>
[SC] CreateService SUCCESS
>sc start test_winkernel
[SC] StartService FAILED 995:
The I/O operation has been aborted because of either a thread exit or an application request.
To uninstall the driver, execute the following commands with the administrator
privileges:
>sc delete test_winkernel
>bcdedit /deletevalue testsigning
(3) Installing and building capstone via vcpkg
You can download and install capstone using the vcpkg(https://github.com/Microsoft/vcpkg) dependency manager:
git clone https://github.com/Microsoft/vcpkg.git
cd vcpkg
./bootstrap-vcpkg.sh
./vcpkg integrate install
vcpkg install capstone
The capstone port in vcpkg is kept up to date by Microsoft team members and community contributors. If the version is out of date, please create an issue or pull request on the vcpkg repository(https://github.com/Microsoft/vcpkg).

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Code structure
--------------
Capstone source is organized as followings.
```
. <- core engine + README.md + BUILDING.md etc
├── arch <- code handling disasm engine for each arch
│   ├── AArch64 <- AArch64 engine
│   ├── Alpha <- Alpha engine
│   ├── ARM <- ARM engine
│   ├── BPF <- Berkeley Packet Filter engine
│   ├── EVM <- Ethereum engine
│   ├── HPPA <- HPPA engine
│   ├── M680X <- M680X engine
│   ├── M68K <- M68K engine
│   ├── Mips <- Mips engine
│   ├── MOS65XX <- MOS65XX engine
│   ├── PowerPC <- PowerPC engine
│   ├── RISCV <- RISCV engine
│   ├── SH <- SH engine
│   ├── Sparc <- Sparc engine
│   ├── SystemZ <- SystemZ engine
│   ├── TMS320C64x <- TMS320C64x engine
│   ├── TriCore <- TriCore engine
│   └── WASM <- WASM engine
├── bindings <- all bindings are under this dir
│   ├── java <- Java bindings
│   ├── ocaml <- Ocaml bindings
│   └── python <- Python bindings
│   └── cstest <- Testing tool for the Python bindings.
├── suite <- Several tools used for development
│   ├── cstest <- Testing tool to consume and check the test `yaml` files in `tests`
│   ├── fuzz <- Fuzzer
│   └── auto-sync <- The updater for Capstone modules
├── contrib <- Code contributed by community to help Capstone integration
├── cstool <- Cstool
├── docs <- Documentation
├── include <- API headers in C language (*.h)
├── packages <- Packages for Linux/OSX/BSD.
├── windows <- Windows support (for Windows kernel driver compile)
├── tests <- Unit and itegration tests
└── xcode <- Xcode support (for MacOSX compile)
```
Building
--------
Follow the instructions in [BUILDING.md](BUILDING.md) for how to compile and run test code.
Testing
-------
General testing docs are at [tests/README.md](tests/README.md).
You can test single instructions easily with the `cstool`.
For example:
```bash
$ cstool x32 "90 91"
```
Using `cstool` is also the prefered way for debugging a single instruction.
**Bindings**
Bindings currently have not equivalent to a `cstool`.
The Python bindings have `cstool` implemented.
Other bindings are out-of-date for a while because of missing maintainers.
They only have legacy integration tests.
Please check the issues or open a new one if you intent to work on them or need them.
Coding style
------------
- We provide a `.clang-format` for C code.
- Python files should be formatted with `black`.
Support
-------
**Please always open an issue or leave a comment in one, before starting work on an architecture! We can give support and save you a lot of time.**
Updating an Architecture
------------------------
The update tool for Capstone is called `Auto-Sync` and can be found in `suite/auto-sync`.
Not all architectures are supported yet.
Run `suite/auto-sync/Updater/ASUpdater.py -h` to get a list of currently supported architectures.
The documentation how to update with `Auto-Sync` or refactor an architecture module
can be found in [suite/auto-sync/README.md](suite/auto-sync/README.md).
If a module does not support `Auto-Sync` yet, it is highly recommended to refactor it
instead of attempting to update it manually.
Refactoring will take less time and updates it during the procedure.
The one exception is `x86`. In LLVM we use several emitter backends to generate C code.
One of those LLVM backends (the `DecoderEmitter`) has two versions.
One for `x86` and another for all the other architectures.
Until now it was not worth it to refactoring this unique `x86` backend. So `x86` is not
supported currently.
Adding an Architecture
----------------------
If your architecture is supported in LLVM or one of its forks, you can use `Auto-Sync` to
add the new module.
Checkout [suite/auto-sync/README.md](suite/auto-sync/README.md).
Otherwise, you need to implement the disassembler on your own and make it work with the Capstone API.

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Code structure
--------------
Capstone source is organized as followings.
. <- core engine + README + COMPILE_CMAKE.TXT etc
├── arch <- code handling disasm engine for each arch
│   ├── AArch64 <- AArch64 engine
│   ├── Alpha <- Alpha engine
│   ├── ARM <- ARM engine
│   ├── BPF <- Berkeley Packet Filter engine
│   ├── EVM <- Ethereum engine
│   ├── HPPA <- HPPA engine
│   ├── M680X <- M680X engine
│   ├── M68K <- M68K engine
│   ├── Mips <- Mips engine
│   ├── MOS65XX <- MOS65XX engine
│   ├── PowerPC <- PowerPC engine
│   ├── RISCV <- RISCV engine
│   ├── SH <- SH engine
│   ├── Sparc <- Sparc engine
│   ├── SystemZ <- SystemZ engine
│   ├── TMS320C64x <- TMS320C64x engine
│   ├── TriCore <- TriCore engine
│   └── WASM <- WASM engine
├── bindings <- all bindings are under this dir
│   ├── java <- Java bindings + test code
│   ├── ocaml <- Ocaml bindings + test code
│   └── python <- Python bindings + test code
├── contrib <- Code contributed by community to help Capstone integration
├── cstool <- Cstool
├── docs <- Documentation
├── include <- API headers in C language (*.h)
├── msvc <- Microsoft Visual Studio support (for Windows compile)
├── packages <- Packages for Linux/OSX/BSD.
├── windows <- Windows support (for Windows kernel driver compile)
├── suite <- Development test tools - for Capstone developers only
├── tests <- Test code (in C language)
└── xcode <- Xcode support (for MacOSX compile)
Follow the instructions in COMPILE_CMAKE.TXT for how to compile and run test code.
Note: if you find some strange bugs, it is recommended to firstly clean
the code and try to recompile/reinstall again. This can be done with:
$ ./make.sh
$ sudo ./make.sh install
Then test Capstone with cstool, for example:
$ cstool x32 "90 91"
At the same time, for Java/Ocaml/Python bindings, be sure to always use
the bindings coming with the core to avoid potential incompatibility issue
with older versions.
See bindings/<language>/README for detail instructions on how to compile &
install the bindings.
Coding style
------------
- C code follows Linux kernel coding style, using tabs for indentation.
- Python code uses 4 spaces for indentation.
Updating an Architecture
------------------------
The update tool for Capstone is called `auto-sync` and can be found in `suite/auto-sync`.
Not all architectures are supported yet.
Run `suite/auto-sync/Updater/ASUpdater.py -h` to get a list of currently supported architectures.
The documentation how to update with `auto-sync` or refactor an architecture module
can be found in [docs/AutoSync.md](docs/AutoSync.md).
If a module does not support `auto-sync` yet, it is highly recommended to refactor it
instead of attempting to update it manually.
Refactoring will take less time and updates it during the procedure.
The one exception is `x86`. In LLVM we use several emitter backends to generate C code.
One of those LLVM backends (the `DecoderEmitter`) has two versions.
One for `x86` and another for all the other architectures.
Until now it was not worth it to refactoring this unique `x86` backend. So `x86` is not
supported currently.
Adding an architecture
----------------------
If your architecture is supported in LLVM or one of its forks, you can use `auto-sync` to
add the new module.
<!-- TODO: Move this info to the auto-sync docs -->
Obviously, you first need to write all the logic and put it in a new directory arch/newarch
Then, you have to modify other files.
(You can look for one architecture such as EVM in these files to get what you need to do)
Integrate:
- cs.c
- cstool/cstool.c
- cstool/cstool_newarch.c: print the architecture specific details
- include/capstone/capstone.h
- include/capstone/newarch.h: create this file to export all specifics about the new architecture
Compile:
- CMakeLists.txt
- Makefile
- config.mk
Tests:
- tests/Makefile
- tests/test_basic.c
- tests/test_iter.c
- tests/test_newarch.c
- suite/fuzz/platform.c: add the architecture and its modes to the list of fuzzed platforms
- suite/capstone_get_setup.c
- suite/MC/newarch/mode.mc: samples
- suite/test_corpus.py: correspondence between architecture and mode as text and architecture number for fuzzing
- suite/cstest/
Bindings:
- bindings/Makefile
- bindings/const_generator.py: add the header file and the architecture
- bindings/python/Makefile
- bindings/python/capstone/__init__.py
- bindings/python/capstone/newarch.py: define the python structures
- bindings/python/capstone/newarch_const.py: generate this file
- bindings/python/test_newarch.py: create a basic decoding test
- bindings/python/test_all.py
Docs:
- README.md
- HACK.txt
- CREDITS.txt: add your name

14
README.md
View File

@ -49,27 +49,27 @@ Further information is available at https://www.capstone-engine.org
Compile Compile
------- -------
See [COMPILE_CMAKE.TXT](COMPILE_CMAKE.TXT) file for how to compile and install Capstone. See [BUILDING.md](BUILDING.md) file for how to compile and install Capstone.
Documentation Documentation
------------- -------------
See docs/README for how to customize & program your own tools with Capstone. - Useful links and tutorials: [docs/README](docs/README)
- Software architecture overview: [docs/ARCHITECTURE.md](docs/ARCHITECTURE.md)
- Testing documentation: [tests/README.md](tests/README.md)
- Updater (Auto-Sync) documentation: [suite/auto-sync/README.md](suite/auto-sync/README.md)
Contributing
Hack
---- ----
See HACK.TXT file for the structure of the source code. See [CONTRIBUTING.md](CONTRIBUTING.md) for an intro.
Fuzz Fuzz
---- ----
See suite/fuzz/README.md for more information. See suite/fuzz/README.md for more information.
License License
------- -------

2
contrib/cs_driver/README
View File

@ -1,5 +1,3 @@
This directory contains a sample project for using Capstone from a Windows This directory contains a sample project for using Capstone from a Windows
driver. Open cs_driver.sln with Visual Studio 2013 or newer and see cs_driver.c driver. Open cs_driver.sln with Visual Studio 2013 or newer and see cs_driver.c
for details. for details.
For prerequisites to compile Capstone for drivers, see COMPILE_MSVC.TXT.

584
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View File

@ -1,41 +1,99 @@
# V6 Release # V6 Release
With the `v6` release we added a new update mechanism called `auto-sync`. With the `v6` release we added a new update mechanism called `Auto-Sync`.
This is a huge step for Capstone, because it allows for easy module updates, easier addition of new architectures, easy features addition and guarantees less faulty disassembly. This is a huge step for Capstone, because it allows for easy module updates, easier addition of new architectures, easy features addition and guarantees less faulty disassembly.
For `v6` we _updated_ the following architectures: `ARM`, `AArch64` and `PPC`. This release adds a huge amount of new architectures, extensions, bug fixes and quality of life improvements.
These updates are significant! While in `v5` the most up-to-date module was based on `LLVM 7`, ## Contributors
the refactored modules will be based on `LLVM 17`!
As you can see, `auto-sync` solves the long existing problem that Capstone architecture modules were very hard to update. Almost all the work was sponsored by [RizinOrg](https://rizin.re/). This release would have simply not happened without them.
For [`auto-sync`-enabled modules](https://github.com/capstone-engine/capstone/issues/2015) this is no longer the case.
To achieve it we refactored some LLVM backends, so they emit directly the code we use in Capstone. The developers with the biggest contributions were (alphabetically):
Additionally, we implemented many scripts, which automate a great number of manual steps during the update. - `TriCore` - @billow (Sponsored)
- `LoongArch` - @jiegec and @FurryAcetylCoA
- `Alpha`, `HPPA` - @R33v0LT (Sponsored)
- `AArch64`, `ARM`, `Auto-Sync`, `PPC`, `SystemZ`, modernized testing - @Rot127 (Sponsored)
- `Mips`, `NanoMips` - @wargio
Because most of the update steps are automated now the architecture modules must fit this update mechanism. There are also multiple smaller additions
Which means they move closer to the original LLVM code.
On the flip site it brings many breaking changes.
You can find a list below with a description, justification and a possible way to revert this change locally (if there is any reasonable way). - Reviewing all PRs = @kabeor
- Architecture module registration - @oleavr
- Building of thin binaries for Apple - @rickmark
- Python packaging and testing - @twizmwazin, @peace-maker
- `RISCV` operand access info - @wxrdnx
With all the trouble this might bring for you, please keep in mind that this will only occur once for each architecture (when it gets refactored for `auto-sync`). And of course there were many more improvements done by other contributors, which add to the release just as the ones above.
In the long term this will guarantee more stability, more correctness, more features and on top of this makes Capstone directly comparable to `llvm-obdjdump`. For a full list of all the developers, please see the release page.
We already added a handful of new features of which you can find a list below.
If you want to check the current state of this endeavor checkout https://github.com/capstone-engine/capstone/issues/2015.
Moreover, if you decide to update an existing architecture module (apart from already updated ones), it would be very much welcome!
If you want to join the effort, please drop us a note in the issue comments, so we can assist.
Almost all the new features in this release were sponsored and implemented by the [Rizin](https://rizin.re/) team.
The `auto-sync` updater, the additional updates of ARM, AArch64 and PPC, as well as the newly added Tricore and Alpha support, wouldn't have had happened without them.
With all that said, we hope you enjoy the new release! With all that said, we hope you enjoy the new release!
## Overview
For `v6` we _updated_ the following architectures: `ARM`, `AArch64`, `Mips` (adding `NanoMips`!), `SystemZ`, `PPC`.
And added support for several more: `TriCore` (already in `v5`), `Alpha`, `HPPA`, `LoongArch`.
These updates are significant! While in `v5` the most up-to-date module was based on `LLVM 7`,
the refactored modules are based on `LLVM 16` (`ARM`, `PPC`) and `LLVM 18` (the others)!
As you can see, `Auto-Sync` solves the long existing problem that Capstone being hard to update.
For [`Auto-Sync`-enabled modules](https://github.com/capstone-engine/capstone/issues/2015) this is no longer the case.
The update process is no pretty much standardized and, while not yet 100% reproducible, creates consistently better maintainable and precise results.
To achieve it, we refactored some LLVM backends, so they emit directly the code we use in Capstone.
Additionally, we implemented many scripts, which automate a great number of manual steps during the update.
Because most of the update steps are automated now, the architecture modules must fit this update mechanism.
Which means they move closer to the original LLVM code.
On the flip site it brings many breaking changes.
You can find a list below with descriptions and justification.
With all the trouble this might bring for you, please keep in mind that this will only occur once for each architecture (when it gets refactored for `Auto-Sync`).
In the long term this will guarantee more stability, more correctness, more features and on top of this makes Capstone directly comparable to `llvm-obdjdump`.
If you want to check the current state of this endeavor read the [main Auto-Sync issue](https://github.com/capstone-engine/capstone/issues/2015).
Moreover, if you decide to update an existing architecture module (apart from already updated ones), it would be very much welcome!
If you want to join the effort, please drop us a note in the issue comments, so we can assist.
## Why an Alpha?
Because the changes are so vast and we still need more feedback from the community.
We had many early adopters who helped enormously to find bugs and report issues up until now.
But there are still features missing, modules not refactored, the test coverage below 100% in the relevant paths and `Auto-Sync` not completely done yet.
With all the new features we want to have more feedback from users and eyes on the code before calling it "complete".
Although, it is an Alpha, it doesn't mean it is not well tested!
The testing compared to any other release has increased a lot. Both in quantity, coverage and code quality checks.
The Alpha release now allows projects to pin-point their build to a specific commit and use the new features, while allowing us to add missing features
still on the list for `v6` Gold.
Some of them are: update and add more architectures (including x86), rework DIET build, improve Auto-Sync with reproducible file generation and quality of life features and more.
So when the final `v6` release happens, the `Auto-Sync` transformation of Capstone is completely done.
For `v7` we can then focus on other big features, like [SAIL](https://github.com/rems-project/sail) based disassembler modules or a new API to support VLIW architectures like Hexagon or E2K.
## New features ## New features
These features are only supported by `auto-sync`-enabled architectures.
**More code quality checks**
- `clang-tidy` is now run on all files changed by a PR.
- ASAN: All tests are now run with the address sanitizer enabled. This includes checking for leaks.
**Instruction formats for PPC, SystemZ, LoongArch**
The instruction encoding formats are added for PPC. They are accessible via `cs_ppc->format`
(and the equivalently for SystemZ, LoongArch).
They do follow loosely the ISA formats of instructions but not quite. Unfortunately,
LLVM doesn't group the instruction formats perfectly aligned with the ISA.
Nonetheless, we hope this additional information is useful to you.
**LoongArch** **LoongArch**
- Architecture support was added (based on LLVM-18). - Architecture support was added (based on LLVM-18).
@ -47,7 +105,6 @@ With all that said, we hope you enjoy the new release!
**Alpha** **Alpha**
- Architecture support was added (based on LLVM-3) - Architecture support was added (based on LLVM-3)
- System operands are provided with way more detail in separated operand.
**AArch64** **AArch64**
@ -60,7 +117,7 @@ With all that said, we hope you enjoy the new release!
- Updated to LLVM-16 - Updated to LLVM-16
- The instruction encoding formats are added for PPC. They are accessible via `cs_ppc->format`. - The instruction encoding formats are added for PPC. They are accessible via `cs_ppc->format`.
They do follow loosely the ISA formats of instructions but not quite. Unfortunately, They do follow loosely the ISA formats of instructions but not quite. Unfortunately,
LLV doesn't group the instruction formats perfectly aligned with the ISA. LLVM doesn't group the instruction formats perfectly aligned with the ISA.
Nonetheless, we hope this additional information is useful to you. Nonetheless, we hope this additional information is useful to you.
- Branching information in `cs_ppc->bc` is way more detailed now. - Branching information in `cs_ppc->bc` is way more detailed now.
- The Paired Single extension was added. - The Paired Single extension was added.
@ -70,257 +127,65 @@ Nonetheless, we hope this additional information is useful to you.
- Updated to LLVM-18 - Updated to LLVM-18
- Operands have now read/write access information - Operands have now read/write access information
- Memory operands have now the address mode specified - Memory operands have now the address mode specified
- Immediate oprands have a new `imm_width` field. storing the bit width if known. - Immediate operands have a new `imm_width` field. Storing the bit width if known.
- CPU features can be enabled or disabled by SystemZ architecture (arch8-arch14). - CPU features can be enabled or disabled, grouped by architecture (arch8-arch14).
**Mips** **Mips**
- Updated to LLVM-18 - Updated to LLVM-18
- Support added for: `microMips32r3`, `microMips32r6`, `Mips16`, `Mips I ISA`, `Mips II ISA`, `Mips32 r2 ISA`, `Mips32 r3 ISA`, `Mips32 r5 ISA`, `Mips32 r6 ISA`, `Mips III ISA`, `Mips IV ISA`, `Mips V ISA`, `Mips64 r2 ISA`, `Mips64 r3 ISA`, `Mips64 r5 ISA`, `Mips64 r6 ISA`, `Octeon (cnMIPS)`, `Octeon+ (cnMIPS+)`, `NanoMips` - Support added for: `NanoMips`, `microMips32r3`, `microMips32r6`, `Mips16`, `Mips I ISA`, `Mips II ISA`, `Mips32 r2 ISA`, `Mips32 r3 ISA`, `Mips32 r5 ISA`, `Mips32 r6 ISA`, `Mips III ISA`, `Mips IV ISA`, `Mips V ISA`, `Mips64 r2 ISA`, `Mips64 r3 ISA`, `Mips64 r5 ISA`, `Mips64 r6 ISA`, `Octeon (cnMIPS)`, `Octeon+ (cnMIPS+)`
- Support for different register naming style (`CS_OPT_SYNTAX_NO_DOLLAR`, `CS_OPT_SYNTAX_NOREGNAME`) - Support for different register naming style (`CS_OPT_SYNTAX_NO_DOLLAR`, `CS_OPT_SYNTAX_NOREGNAME`)
- In `capstone.h` new MIPS ISA has been added which can be used by themselves.
```
CS_MODE_MIPS16 = CS_MODE_16, ///< Generic mips16
CS_MODE_MIPS32 = CS_MODE_32, ///< Generic mips32
CS_MODE_MIPS64 = CS_MODE_64, ///< Generic mips64
CS_MODE_MICRO = 1 << 4, ///< microMips
CS_MODE_MIPS1 = 1 << 5, ///< Mips I ISA Support
CS_MODE_MIPS2 = 1 << 6, ///< Mips II ISA Support
CS_MODE_MIPS32R2 = 1 << 7, ///< Mips32r2 ISA Support
CS_MODE_MIPS32R3 = 1 << 8, ///< Mips32r3 ISA Support
CS_MODE_MIPS32R5 = 1 << 9, ///< Mips32r5 ISA Support
CS_MODE_MIPS32R6 = 1 << 10, ///< Mips32r6 ISA Support
CS_MODE_MIPS3 = 1 << 11, ///< MIPS III ISA Support
CS_MODE_MIPS4 = 1 << 12, ///< MIPS IV ISA Support
CS_MODE_MIPS5 = 1 << 13, ///< MIPS V ISA Support
CS_MODE_MIPS64R2 = 1 << 14, ///< Mips64r2 ISA Support
CS_MODE_MIPS64R3 = 1 << 15, ///< Mips64r3 ISA Support
CS_MODE_MIPS64R5 = 1 << 16, ///< Mips64r5 ISA Support
CS_MODE_MIPS64R6 = 1 << 17, ///< Mips64r6 ISA Support
CS_MODE_OCTEON = 1 << 18, ///< Octeon cnMIPS Support
CS_MODE_OCTEONP = 1 << 19, ///< Octeon+ cnMIPS Support
CS_MODE_NANOMIPS = 1 << 20, ///< Generic nanomips
CS_MODE_NMS1 = ((1 << 21) | CS_MODE_NANOMIPS), ///< nanoMips NMS1
CS_MODE_I7200 = ((1 << 22) | CS_MODE_NANOMIPS), ///< nanoMips I7200
CS_MODE_MICRO32R3 = (CS_MODE_MICRO | CS_MODE_MIPS32R3), ///< microMips32r3
CS_MODE_MICRO32R6 = (CS_MODE_MICRO | CS_MODE_MIPS32R6), ///< microMips32r6
```
It is also possible to disable floating point support by adding `CS_MODE_MIPS_NOFLOAT`.
- **`CS_MODE_MIPS_PTR64` is now required to decode 64-bit pointers**, like jumps and calls (for example: `jal $t0`).
**RISCV** **RISCV**
- Operands have now read/write access information - Operands have now read/write access information
**UX**
- Instruction alias (see below).
- `cstool`: Architecture specific options can now be enabled with `cstool <arch>+<option>`.
**Developer improvements**
- Testing was re-written from scratch. Now allowing fine-grained testing of all details and is more convenient to use by contributors.
- Architecture modules from a static library, can be initialized on demand to decrease footprint (see: `cmake` option `CAPSTONE_USE_ARCH_REGISTRATION`).
- New `cmake` option to choose between fat and thin binary for Apple.
**Code quality** **Code quality**
- ASAN: All tests are now run with the address sanitizer enabled. This includes checking for leaks. - ASAN: All tests are now run with the address sanitizer enabled. This includes checking for leaks.
- Coverity code scanning workflow added. - Coverity code scanning workflow added and all reported bugs fixed.
- Testing was re-written from scratch. Now allowing fine-grained testing of all details and is more convenient to use by contributors. - `clang-tidy` workflow added. All reported defects were fixed.
## Breaking changes
**All `auto-sync` architectures**
| Keyword | Change | Justification | Possible revert |
|---------|--------|---------------|-----------------|
| Instr. alias | Capstone now clearly separates real instructions and their aliases. Previously many aliases were treated as real instructions. See [Instruction Alias](#instruction-alias) for details. | This became a simple necessity because CS operates with a copy of the LLVMs decoder without any changes. | This change is not revertible. |
**ARM**
| Keyword | Change | Justification | Possible revert |
|---------|--------|---------------|-----------------|
| Post-index | Post-index memory access has the disponent now set in the `MEMORY` operand! No longer as separated `reg`/`imm` operand. | The CS memory operand had a field which was there for disponents. Not having it set, for post-index operands was inconsistent. | Edit `ARM_set_detail_op_mem()` and add an immediate operand instead of setting the disponent. |
| Sign `mem.disp` | `mem.disp` is now always positive and the `subtracted` flag indicates if it should be subtracted. | It was inconsistent before. | Change behavior in `ARM_set_detail_op_mem()` |
| `ARM_CC` | `ARM_CC` → `ARMCC` and value change | They match the same LLVM enum. Better for LLVM compatibility and code generation. | Change it manually. |
| `ARMCC_*` | `ARMCC_EQ == 0` but `ARMCC_INVALID != 0` | They match the LLVM enum. Better for LLVM compatibility and code generation. | Change by hand. |
| System registers | System registers are no longer saved in `cs_arm->reg`, but are separated and have more detail. | System operands follow their own encoding logic. Hence, they should be separated in the details as well. | None |
| System operands | System operands have now the encoding of LLVM (SYSm value mostly) | See note about system registers. | None |
| Instruction enum | Multiple instructions which were only alias were removed from the instruction enum. | Alias are always disassembled as their real instructions and an additional field identifies which alias it is. | None |
| Instruction groups| Instruction groups, which actually were CPU features, were renamed to reflect that. | Names now match the ones in LLVM. Better for code generation. | Replace IDs with macros. |
| CPU features | CPU features get checked more strictly (`MCLASS`, `V8` etc.) | With many new supported extensions, some instruction bytes decode to a different instruction, depending on the enabled features. Hence, it becomes necessary. | None. |
| `writeback` | `writeback` member was moved to detail. | More architectures need a `writeback` flag. This is a simplification. | None. |
| Register alias | Register alias (`r15 = pc` etc.) are not printed if LLVM doesn't do it. Old Capstone register alias can be enabled by `CS_OPT_SYNTAX_CS_REG_ALIAS`. | Mimic LLVM as close as possible. | Enable `CS_OPT_SYNTAX_CS_REG_ALIAS` option. |
| Immediate | Immediate values (`arm_op.imm`) type changed to `int64_t` | Prevent loss of precision in some cases. | None. |
**PPC**
| Keyword | Change | Justification | Possible revert |
|---------|--------|---------------|-----------------|
| `PPC_BC` | The branch conditions were completely rewritten and save now all detail known about the bits. | More branch condition details were something missing. | None. |
| Predicates | Predicate enums were renamed due to the changes to the branch conditions. | See `PPC_BC` | None. |
| Instruction alias | Many instruction alias (e.g. `BF`) were removed from the instruction enum (see new alias feature below). | Alias information is provided separately in their own fields. | None. |
| `crx` | `ppc_ops_crx` was removed. | It was never used in the first place. | None. |
| `(RA\|0)` | The `(RA\|0)` cases (see ISA for details) for which `0` is used, the `PPC_REG_ZERO` register is used. The register name of it is `0`. | Mimics LLVM behavior. | None. |
**AArch64**
| Keyword | Change | Justification | Possible revert |
|---------|--------|---------------|-----------------|
| Post-index | Post-index memory access has the disponent now set int the `MEMORY` operand! No longer as separated `reg`/`imm` operand. | See post-index explanation for ARM. | See ARM. |
| `SME` operands | `SME` operands contain more detail now and member names are closer to the docs. | New feature. | None. |
| System operands | System Operands are separated into different types now. | System operands follow a special encoding. Some byte sequences match two different operands. Hence, a more detailed concept was necessary. | None. |
| `writeback` | `writeback` member was moved to detail. | See ARM explanation. | See ARM. |
| `arm64_vas` | `arm64_vas` renamed to `AArch64Layout_VectorLayout` | LLVM compatibility. | None. |
| Register alias | Register alias (`x29 = fp` etc.) are not printed if LLVM doesn't do it. Old Capstone register alias can be enabled by `CS_OPT_SYNTAX_CS_REG_ALIAS`. | Mimic LLVM as close as possible. | Enable option. |
| `AArch64CC_*` | `AArch64CC_EQ == 0` but `AArch64CC_INVALID != 0` | They match the LLVM enum. Better for LLVM compatibility and code generation. | Change by hand. |
**Mips**
| Keyword | Change | Justification | Possible revert |
|---------|--------|---------------|-----------------|
| `CS_OPT_SYNTAX_NO_DOLLAR` | Adds options which removes the `$` (dollar sign) from the register name. | New Feature | Enable option. |
| `CS_OPT_SYNTAX_NOREGNAME` | Implements the options to output raw register numbers (only the standard GPR are numeric). | Was not implemented | Enable option. |
| `cs_mips_op.uimm` | Access for the unsigned immediate value of the IMM operand. | Was missing | None. |
| `cs_mips_op.is_unsigned` | Defines if the IMM operand is signed (when false) or unsigned (when true). | Was missing | None. |
| `cs_mips_op.is_reglist` | Defines if the REG operand is part of a list of registers. | Was missing | None. |
| `cs_mips_op.access` | Defines how is this operand accessed, i.e. READ, WRITE or READ & WRITE. | Was missing | None. |
**SystemZ**
| Keyword | Change | Justification | Possible revert |
|---------|--------|---------------|-----------------|
| `SYSTEMZ_CC_*` | `SYSTEMZ_CC_O = 0` and `SYSTEMZ_CC_INVALID != 0` | They match the same LLVM values. Better for LLVM compatibility and code generation. | Change by hand. |
**Note about AArch64 and SystemZ**
`ARM64` was everywhere renamed to `AArch64`. And `SYSZ` to `SYSTEMZ`. This is a necessity to ensure that the update scripts stay reasonably simple.
Capstone was very inconsistent with the naming before (sometimes `AArch64` sometimes `ARM64`. Sometimes `SYSZ` sometimes `SYSTEMZ`).
Because Capstone uses a huge amount of LLVM code, we renamed everything to `AArch64` and `SystemZ`. This reduces complexity enormously because it follows the naming of LLVM.
Because this would completely break maintaining Capstone `v6` and `pre-v6` in a project, we added compatibility headers:
1. Make `arm64.h` a compatibility header which merely maps every member to the one in the `aarch64.h` header.
2. The `systemz.h` header includes the `SYSZ` to `SYSZTEMZ` mapping if `CAPSTONE_SYSTEMZ_COMPAT_HEADER` is defined.
We will continue to maintain both headers.
_Compatibility header_
If you want to use the compatibility header and stick with the `ARM64`/`SYSZ` naming, you can define `CAPSTONE_AARCH64_COMPAT_HEADER` and `CAPSTONE_SYSTEMZ_COMPAT_HEADER` before including `capstone.h`.
```c
#define CAPSTONE_SYSTEMZ_COMPAT_HEADER
#define CAPSTONE_AARCH64_COMPAT_HEADER
#include <capstone/capstone.h>
// Your code...
```
_Meta programming macros_
The following `sed` commands in a sh script should ease the replacement of `ARM64` with the macros a lot.
These macros are also part of the latest `v4` and `v5` release.
```sh
#!/bin/sh
echo "Replace enum names"
sed -i -E "s/CS_ARCH_ARM64/CS_AARCH64pre(CS_ARCH_)/g" $1
sed -i -E "s/ARM64_INS_(\\w+)/CS_AARCH64(_INS_\\1)/g" $1
sed -i -E "s/ARM64_REG_(\\w+)/CS_AARCH64(_REG_\\1)/g" $1
sed -i -E "s/ARM64_OP_(\\w+)/CS_AARCH64(_OP_\\1)/g" $1
sed -i -E "s/ARM64_EXT_(\\w+)/CS_AARCH64(_EXT_\\1)/g" $1
sed -i -E "s/ARM64_SFT_(\\w+)/CS_AARCH64(_SFT_\\1)/g" $1
sed -i -E "s/ARM64_VAS_(\\w+)/CS_AARCH64_VL_(\\1)/g" $1
sed -i -E "s/ARM64_CC_(\\w+)/CS_AARCH64CC(_\\1)/g" $1
echo "Replace type identifiers"
sed -i -E "s/cs_arm64_op /CS_aarch64_op() /g" $1
sed -i -E "s/arm64_reg /CS_aarch64_reg() /g" $1
sed -i -E "s/arm64_cc /CS_aarch64_cc() /g" $1
sed -i -E "s/cs_arm64 /CS_cs_aarch64() /g" $1
sed -i -E "s/arm64_extender /CS_aarch64_extender() /g" $1
sed -i -E "s/arm64_shifter /CS_aarch64_shifter() /g" $1
sed -i -E "s/arm64_vas /CS_aarch64_vas() /g" $1
echo "Replace detail->arm64"
sed -i -E "s/detail->arm64/detail->CS_aarch64()/g" $1
```
_Example renaming with `sed`_
Simple renaming from `ARM64` to `AArch64`:
```sh
#!/bin/sh
echo "Replace enum names"
sed -i "s|CS_ARCH_ARM64|CS_ARCH_AARCH64|g" $1
sed -i "s|ARM64_INS_|AArch64_INS_|g" $1
sed -i "s|ARM64_REG_|AArch64_REG_|g" $1
sed -i "s|ARM64_OP_|AArch64_OP_|g" $1
sed -i "s|ARM64_EXT_|AArch64_EXT_|g" $1
sed -i "s|ARM64_SFT_|AArch64_SFT_|g" $1
sed -i "s|ARM64_CC_|AArch64CC_|g" $1
echo "Replace type identifiers"
sed -i "s|arm64_reg|aarch64_reg|g" $1
sed -i "s|arm64_cc |AArch64CC_CondCode |g" $1
sed -i "s|cs_arm64|cs_aarch64|g" $1
sed -i "s|arm64_extender |aarch64_extender |g" $1
sed -i "s|arm64_shifter |aarch64_shifter |g" $1
sed -i "s|arm64_vas |AArch64Layout_VectorLayout |g" $1
echo "Replace detail->arm64"
sed -i "s|detail->arm64|detail->aarch64|g" $1
```
Simple renaming from `SYSZ` to `SYSTEMZ`:
```sh
#!/bin/sh
echo "Replace enum names"
sed -i "s|CS_ARCH_SYSZ|CS_ARCH_SYSTEMZ|g" $1
sed -i "s|SYSZ_INS_|SYSTEMZ_INS_|g" $1
sed -i "s|SYSZ_REG_|SYSTEMZ_REG_|g" $1
sed -i "s|SYSZ_OP_|SYSTEMZ_OP_|g" $1
sed -i "s|SYSZ_CC_|SYSTEMZ_CC_|g" $1
echo "Replace type identifiers"
sed -i "s|sysz_reg|systemz_reg|g" $1
sed -i "s|sysz_cc |systemz_cc |g" $1
sed -i "s|cs_sysz|cs_systemz|g" $1
sed -i "s|sysz_op_type|systemz_op_type|g" $1
sed -i "s|sysz_op_type|systemz_op_type|g" $1
sed -i "s|sysz_op_mem|systemz_op_mem|g" $1
sed -i "s|sysz_op|systemz_op|g" $1
echo "Replace detail->sysz"
sed -i "s|detail->sysz|detail->systemz|g" $1
```
Write it into `rename_arm64.sh` and run it on files with `sh rename_arm64.sh <src-file>`
**Note about AArch64**
in `capstone.h` new mips ISA has been added which can be used by themselves.
```
CS_MODE_MIPS16 = CS_MODE_16, ///< Generic mips16
CS_MODE_MIPS32 = CS_MODE_32, ///< Generic mips32
CS_MODE_MIPS64 = CS_MODE_64, ///< Generic mips64
CS_MODE_MICRO = 1 << 4, ///< microMips
CS_MODE_MIPS1 = 1 << 5, ///< Mips I ISA Support
CS_MODE_MIPS2 = 1 << 6, ///< Mips II ISA Support
CS_MODE_MIPS32R2 = 1 << 7, ///< Mips32r2 ISA Support
CS_MODE_MIPS32R3 = 1 << 8, ///< Mips32r3 ISA Support
CS_MODE_MIPS32R5 = 1 << 9, ///< Mips32r5 ISA Support
CS_MODE_MIPS32R6 = 1 << 10, ///< Mips32r6 ISA Support
CS_MODE_MIPS3 = 1 << 11, ///< MIPS III ISA Support
CS_MODE_MIPS4 = 1 << 12, ///< MIPS IV ISA Support
CS_MODE_MIPS5 = 1 << 13, ///< MIPS V ISA Support
CS_MODE_MIPS64R2 = 1 << 14, ///< Mips64r2 ISA Support
CS_MODE_MIPS64R3 = 1 << 15, ///< Mips64r3 ISA Support
CS_MODE_MIPS64R5 = 1 << 16, ///< Mips64r5 ISA Support
CS_MODE_MIPS64R6 = 1 << 17, ///< Mips64r6 ISA Support
CS_MODE_OCTEON = 1 << 18, ///< Octeon cnMIPS Support
CS_MODE_OCTEONP = 1 << 19, ///< Octeon+ cnMIPS Support
CS_MODE_NANOMIPS = 1 << 20, ///< Generic nanomips
CS_MODE_NMS1 = ((1 << 21) | CS_MODE_NANOMIPS), ///< nanoMips NMS1
CS_MODE_I7200 = ((1 << 22) | CS_MODE_NANOMIPS), ///< nanoMips I7200
CS_MODE_MICRO32R3 = (CS_MODE_MICRO | CS_MODE_MIPS32R3), ///< microMips32r3
CS_MODE_MICRO32R6 = (CS_MODE_MICRO | CS_MODE_MIPS32R6), ///< microMips32r6
```
It is also possible to disable floating point support by adding `CS_MODE_MIPS_NOFLOAT`.
**`CS_MODE_MIPS_PTR64` is now required to decode 64-bit pointers**, like jumps and calls (for example: `jal $t0`).
## New features
These features are only supported by `auto-sync`-enabled architectures.
**More code quality checks**
- `clang-tidy` is now run on all files changed by a PR.
- ASAN: All tests are now run with the address sanitizer enabled. This includes checking for leaks.
**Instruction formats for PPC**
The instruction encoding formats are added for PPC. They are accessible via `cs_ppc->format`.
They do follow loosely the ISA formats of instructions but not quite. Unfortunately,
LLV doesn't group the instruction formats perfectly aligned with the ISA.
Nonetheless, we hope this additional information is useful to you.
### Instruction Alias ### Instruction Alias
@ -379,10 +244,10 @@ If `-r` is set, you got the real operands. Even if the decoded instruction is an
``` ```
**Note about alias as part of real instruction enum.** **Notes about alias as part of real instruction enum.**
LLVM defines some alias instructions as real instructions. LLVM defines some alias instructions as real instructions.
This is why you will still find alias instructions being listed in the instruction `enum`. This is why you will still find alias instructions being listed in the "real" instruction enumeration.
This happens due to some LLVM specific edge cases. This happens due to some LLVM specific edge cases.
Nonetheless, an alias should never be **decoded** as real instruction. Nonetheless, an alias should never be **decoded** as real instruction.
@ -390,6 +255,176 @@ Nonetheless, an alias should never be **decoded** as real instruction.
If you find an alias which is decoded as a real instruction, please let us know. If you find an alias which is decoded as a real instruction, please let us know.
Such an instruction is ill-defined in LLVM and should be fixed upstream. Such an instruction is ill-defined in LLVM and should be fixed upstream.
**No or partial support for alias**
- SystemZ: Not enabled by default in LLVM. Will be added in Beta.
- LoongArch: Implemented but not handled yet. Will be added in Beta.
- TriCore: No support in LLVM.
- Alpha: No support in LLVM.
- HPPA: Not a LLVM architecture. Alias are not supported.
## Breaking changes
**General**
| Keyword | Change | Justification |
|---------|--------|---------------|
| Make build | Building Capstone with `make` is deprecated now and is no longer supported. Build files will be removed in the next release. | It adds too much maintenance and `make` is not convenient to manage such a modular, complex project for multiple platforms. |
| Bindings | The Java and Ocaml bindings were abandoned for a while now. So in the Alpha release they are not yet up-to-date. | Not enough maintainers. |
| Python | Python 2 and <3.8 are dropped in the `v5` and `next` branch. | Python 2 and <3.8 are EOL. |
**All `Auto-Sync` architectures**
| Keyword | Change | Justification |
|---------|--------|---------------|
| Instr. alias | Capstone now clearly separates real instructions and their aliases. Previously many aliases were treated as real instructions. See above for details. | This became a simple necessity because CS operates with a copy of the LLVMs decoder without changes to the decoder logic. |
**ARM**
| Keyword | Change | Justification |
|---------|--------|---------------|
| `ARMCC_*` | `ARMCC_EQ == 0` but `ARMCC_INVALID != 0` | They match the LLVM enum. Better for LLVM compatibility and code generation. |
| `ARM_CC` | `ARM_CC` → `ARMCC` and value change | They match the same LLVM enum. Better for LLVM compatibility and code generation. |
| Post-index | Post-index memory access has the disponent now set in the `MEMORY` operand! No longer as separated `reg`/`imm` operand. | The CS memory operand had a field which was there for disponents. Not having it set, for post-index operands was inconsistent. |
| Sign `mem.disp` | `mem.disp` is now always positive and the `subtracted` flag indicates if it should be subtracted. | It was inconsistent before. |
| System registers | System registers are no longer saved in `cs_arm->reg`, but are separated and have more detail. | System operands follow their own encoding logic. Hence, they should be separated in the details as well. |
| System operands | System operands have now the encoding of LLVM (SYSm value mostly) | See note about system registers. |
| Instruction enum | Multiple instructions which were only alias were removed from the instruction enum. | Alias are always disassembled as their real instructions and an additional field identifies which alias it is. |
| Instruction groups| Instruction groups, which actually were CPU features, were renamed to reflect that. | Names now match the ones in LLVM. Better for code generation. |
| CPU features | CPU features get checked more strictly (`MCLASS`, `V8` etc.) | With many new supported extensions, some instruction bytes decode to a different instruction, depending on the enabled features. Hence, it becomes necessary. |
| `writeback` | `writeback` member was moved to detail. | More architectures need a `writeback` flag. This is a simplification. |
| Register alias | Register alias (`r15 = pc` etc.) are not printed if LLVM doesn't do it. Old Capstone register alias can be enabled by `CS_OPT_SYNTAX_CS_REG_ALIAS`. | Mimic LLVM as close as possible. |
| Immediate | Immediate values (`arm_op.imm`) type changed to `int64_t` | Prevent loss of precision in some cases. |
**AArch64 (formerly ARM64)**
| Keyword | Change | Justification |
|---------|--------|---------------|
| ARM64 -> AArch64 | ARM64 was everywhere renamed to AArch64 to match the LLVM naming. | See below. |
| Post-index | Post-index memory access has the disponent now set int the `MEMORY` operand! No longer as separated `reg`/`imm` operand. | See post-index explanation for ARM. |
| `SME` operands | `SME` operands contain more detail now and member names are closer to the ISA terminology. | New SVE2, SME extensions required more detail. |
| System operands | System Operands are separated into different types now. | System operands follow a special encoding. Some byte sequences match two different operands. Hence, a more detailed concept was necessary. |
| `writeback` | `writeback` member was moved to detail. | See ARM explanation. |
| `arm64_vas` | `arm64_vas` renamed to `AArch64Layout_VectorLayout` | LLVM compatibility. |
| Register alias | Register alias (`x29 = fp` etc.) are not printed if LLVM doesn't do it. Old Capstone register alias can be enabled by `CS_OPT_SYNTAX_CS_REG_ALIAS`. | Mimic LLVM as close as possible. |
| `AArch64CC_*` | `AArch64CC_EQ == 0` but `AArch64CC_INVALID != 0` | They match the LLVM enum. Better for LLVM compatibility and code generation. |
**PPC**
| Keyword | Change | Justification |
|---------|--------|---------------|
| `PPC_BC` | The branch conditions were completely rewritten and save now all detail known about the bits. | More branch condition details were something missing. |
| Predicates | Predicate enums were renamed due to the changes to the branch conditions. | See `PPC_BC` |
| Instruction alias | Many instruction alias (e.g. `BF`) were removed from the instruction enum (see new alias feature below). | Alias information is provided separately in their own fields. |
| `crx` | `ppc_ops_crx` was removed. | It was never used in the first place. |
| `(RA\|0)` | The `(RA\|0)` cases (see ISA for details) for which `0` is used, the `PPC_REG_ZERO` register is used. The register name of it is `0`. | Mimics LLVM behavior. |
**Mips**
| Keyword | Change | Justification | Possible revert |
|---------|--------|---------------|-----------------|
| `CS_OPT_SYNTAX_NO_DOLLAR` | Adds options which removes the `$` (dollar sign) from the register name. | New Feature | Enable option. |
| `CS_OPT_SYNTAX_NOREGNAME` | Implements the options to output raw register numbers (only the standard GPR are numeric). | Was not implemented | Enable option. |
| `cs_mips_op.uimm` | Access for the unsigned immediate value of the IMM operand. | Was missing | None. |
| `cs_mips_op.is_unsigned` | Defines if the IMM operand is signed (when false) or unsigned (when true). | Was missing | None. |
| `cs_mips_op.is_reglist` | Defines if the REG operand is part of a list of registers. | Was missing | None. |
| `cs_mips_op.access` | Defines how is this operand accessed, i.e. READ, WRITE or READ & WRITE. | Was missing | None. |
**SystemZ**
| Keyword | Change | Justification |
|---------|--------|---------------|
| SYSZ -> SystemZ | `SYSZ` was everywhere renamed to `SystemZ` to match the LLVM naming. | See below |
| `SYSTEMZ_CC_*` | `SYSTEMZ_CC_O = 0` and `SYSTEMZ_CC_INVALID != 0` | They match the same LLVM values. Better for LLVM compatibility and code generation. |
### Notes about AArch64 and SystemZ renaming
`ARM64` was everywhere renamed to `AArch64`. And `SYSZ` to `SYSTEMZ`. This is a necessity to ensure that the update scripts stay reasonably simple.
Capstone was very inconsistent with the naming before (sometimes `AArch64` sometimes `ARM64`. Sometimes `SYSZ` sometimes `SYSTEMZ`).
Because Capstone uses a huge amount of LLVM code, we renamed everything to `AArch64` and `SystemZ`. This reduces complexity enormously because it follows the naming of LLVM.
Because this would completely break maintaining Capstone `v6` and `pre-v6` in a project, we added compatibility headers:
1. `arm64.h` is a compatibility header now, which merely maps every member to the one in the `aarch64.h` header. Defining `CAPSTONE_AARCH64_COMPAT_HEADER` before including `capstone.h` will include the headers in the right order.
2. The `systemz.h` header includes the `systemz_compatibility.h` header if `CAPSTONE_SYSTEMZ_COMPAT_HEADER` is defined.
We will continue to maintain both headers.
_Compatibility header_
If you want to use the compatibility header and stick with the `ARM64`/`SYSZ` naming, you can define `CAPSTONE_AARCH64_COMPAT_HEADER` and `CAPSTONE_SYSTEMZ_COMPAT_HEADER` before including `capstone.h`.
```c
#define CAPSTONE_SYSTEMZ_COMPAT_HEADER
#define CAPSTONE_AARCH64_COMPAT_HEADER
#include <capstone/capstone.h>
// Your code...
```
_Example renaming with `sed`_
Alternatively you can perform the renaming with `sed`.
Simple renaming from `ARM64` to `AArch64`:
```sh
#!/bin/sh
echo "Replace enum names"
sed -i "s|CS_ARCH_ARM64|CS_ARCH_AARCH64|g" $1
sed -i "s|ARM64_INS_|AArch64_INS_|g" $1
sed -i "s|ARM64_REG_|AArch64_REG_|g" $1
sed -i "s|ARM64_OP_|AArch64_OP_|g" $1
sed -i "s|ARM64_EXT_|AArch64_EXT_|g" $1
sed -i "s|ARM64_SFT_|AArch64_SFT_|g" $1
sed -i "s|ARM64_CC_|AArch64CC_|g" $1
echo "Replace type identifiers"
sed -i "s|arm64_reg|aarch64_reg|g" $1
sed -i "s|arm64_cc |AArch64CC_CondCode |g" $1
sed -i "s|cs_arm64|cs_aarch64|g" $1
sed -i "s|arm64_extender |aarch64_extender |g" $1
sed -i "s|arm64_shifter |aarch64_shifter |g" $1
sed -i "s|arm64_vas |AArch64Layout_VectorLayout |g" $1
echo "Replace detail->arm64"
sed -i "s|detail->arm64|detail->aarch64|g" $1
```
Simple renaming from `SYSZ` to `SYSTEMZ`:
```sh
#!/bin/sh
echo "Replace enum names"
sed -i "s|CS_ARCH_SYSZ|CS_ARCH_SYSTEMZ|g" $1
sed -i "s|SYSZ_INS_|SYSTEMZ_INS_|g" $1
sed -i "s|SYSZ_REG_|SYSTEMZ_REG_|g" $1
sed -i "s|SYSZ_OP_|SYSTEMZ_OP_|g" $1
sed -i "s|SYSZ_CC_|SYSTEMZ_CC_|g" $1
echo "Replace type identifiers"
sed -i "s|sysz_reg|systemz_reg|g" $1
sed -i "s|sysz_cc |systemz_cc |g" $1
sed -i "s|cs_sysz|cs_systemz|g" $1
sed -i "s|sysz_op_type|systemz_op_type|g" $1
sed -i "s|sysz_op_type|systemz_op_type|g" $1
sed -i "s|sysz_op_mem|systemz_op_mem|g" $1
sed -i "s|sysz_op|systemz_op|g" $1
echo "Replace detail->sysz"
sed -i "s|detail->sysz|detail->systemz|g" $1
```
Write it into `rename.sh` and run it on files with `sh rename.sh <src-file>`
### Refactoring of cstool ### Refactoring of cstool
`cstool` has been refactored to simplify its usage; before you needed to add extra options in the C code to enable features and recompile, but now you can easily decode instructions with different syntaxes or options, by appending after the arch one of the followings values: `cstool` has been refactored to simplify its usage; before you needed to add extra options in the C code to enable features and recompile, but now you can easily decode instructions with different syntaxes or options, by appending after the arch one of the followings values:
@ -433,3 +468,22 @@ $ cstool -s arm 0c100097000000008fa2000034213456
8 8f a2 00 00 andeq r10, r0, pc, lsl #5 8 8f a2 00 00 andeq r10, r0, pc, lsl #5
10 34 21 34 56 shasxpl r2, r4, r4 10 34 21 34 56 shasxpl r2, r4, r4
``` ```
### Known bugs in the Alpha
**Arch64**
- Access information for `fcvtn` instructions with two vector registers are wrong.
- Some operands have incorrect access attributes set.
If the same register is used twice in the instruction,
once for reading and once for writing, those registers are required by the ISA to be the same,
the details for this register will always be `access = CS_AC_READ_WRITE`.
There is no distinction for `READ` and `WRITE`.
- Single memory operand _components_ (base register, offset) have no unique access information. Access information from memory operands should always refer to the memory. Not the register or immediate components.
Meaning, if a memory operand has the `CS_AC_READ` attribute set, it means the memory is read. Not all of it's components.
Please note though, `writeback` registers are correctly added to the `regs_write` list if `cs_reg_access` is called.
These issues will be addressed in the next releases. For a more detailed descriptions see: https://github.com/capstone-engine/capstone/issues/2472#issuecomment-2335226281 (starting at "eor and the others").

61
include/capstone/capstone.h
View File

@ -61,67 +61,6 @@ extern "C" {
#define CS_VERSION_MINOR CS_API_MINOR #define CS_VERSION_MINOR CS_API_MINOR
#define CS_VERSION_EXTRA 0 #define CS_VERSION_EXTRA 0
#ifndef CAPSTONE_AARCH64_COMPAT_HEADER
/// Macro for meta programming.
/// Meant for projects using Capstone and need to support multiple
/// versions of it.
/// These macros replace several instances of the old "ARM64" with
/// the new "AArch64" name depending on the CS version.
#if CS_NEXT_VERSION < 6
#define CS_AARCH64(x) ARM64##x
#else
#define CS_AARCH64(x) AARCH64##x
#endif
#if CS_NEXT_VERSION < 6
#define CS_AARCH64pre(x) x##ARM64
#else
#define CS_AARCH64pre(x) x##AARCH64
#endif
#if CS_NEXT_VERSION < 6
#define CS_AARCH64CC(x) ARM64_CC##x
#else
#define CS_AARCH64CC(x) AArch64CC##x
#endif
#if CS_NEXT_VERSION < 6
#define CS_AARCH64_VL_(x) ARM64_VAS_##x
#else
#define CS_AARCH64_VL_(x) AARCH64LAYOUT_VL_##x
#endif
#if CS_NEXT_VERSION < 6
#define CS_aarch64_ arm64
#else
#define CS_aarch64_ aarch64
#endif
#if CS_NEXT_VERSION < 6
#define CS_aarch64(x) arm64##x
#else
#define CS_aarch64(x) aarch64##x
#endif
#if CS_NEXT_VERSION < 6
#define CS_aarch64_op() cs_arm64_op
#define CS_aarch64_reg() arm64_reg
#define CS_aarch64_cc() arm64_cc
#define CS_cs_aarch64() cs_arm64
#define CS_aarch64_extender() arm64_extender
#define CS_aarch64_shifter() arm64_shifter
#define CS_aarch64_vas() arm64_vas
#else
#define CS_aarch64_op() cs_aarch64_op
#define CS_aarch64_reg() aarch64_reg
#define CS_aarch64_cc() AArch64CC_CondCode
#define CS_cs_aarch64() cs_aarch64
#define CS_aarch64_extender() aarch64_extender
#define CS_aarch64_shifter() aarch64_shifter
#define CS_aarch64_vas() AArch64Layout_VectorLayout
#endif
#endif // CAPSTONE_AARCH64_COMPAT_HEADER
/// Macro to create combined version which can be compared to /// Macro to create combined version which can be compared to
/// result of cs_version() API. /// result of cs_version() API.
#define CS_MAKE_VERSION(major, minor) ((major << 8) + minor) #define CS_MAKE_VERSION(major, minor) ((major << 8) + minor)

22
msvc/README
View File

@ -1,22 +0,0 @@
This directory includes all the necessary files to compile Capstone on Windows
using Microsoft Visual Studio (VS).
NOTE:
(1) Visual Studio 2017 or newer versions is required. Open "capstone.sln" to
build the libraries & test code with Visual Studio. The resulted binaries
are put under either msvc/Debug, msvc/Release, msvc/x64/Debug, or
msvc/x64/Release, depending on how you choose to compile them.
(2) The solution (capstone.sln) & all project files (*.vcxproj) are made in
Visual Studio 2010, so if you open them using newer version, an extra step
is needed to convert them to current version. Just accept this when
asked at the initial dialog, and proceed to build the solution normally
afterwards.
(3) The capstone_static_winkernel and test_winkernel projects are for Windows
kernel drivers and excluded from build by default. In order to build them,
you need to install Windows Driver Kit 8.1 Update 1 or newer versions,
then check "Build" check boxes for those projects on
the Configuration Manager through the [Build] menu.

337
msvc/capstone.sln
View File

@ -1,337 +0,0 @@

Microsoft Visual Studio Solution File, Format Version 11.00
# Visual Studio 2010
Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "capstone_static", "capstone_static\capstone_static.vcxproj", "{5B01D900-2359-44CA-9914-6B0C6AFB7BE7}"
EndProject
Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "test_basic", "test_basic\test_basic.vcxproj", "{B291E0D9-4B39-4AF8-971D-A015B78D54A1}"
ProjectSection(ProjectDependencies) = postProject
{5B01D900-2359-44CA-9914-6B0C6AFB7BE7} = {5B01D900-2359-44CA-9914-6B0C6AFB7BE7}
EndProjectSection
EndProject
Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "test_x86", "test_x86\test_x86.vcxproj", "{9C69243E-C7DC-42A4-AB86-0696E51697C8}"
ProjectSection(ProjectDependencies) = postProject
{5B01D900-2359-44CA-9914-6B0C6AFB7BE7} = {5B01D900-2359-44CA-9914-6B0C6AFB7BE7}
EndProjectSection
EndProject
Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "test_arm", "test_arm\test_arm.vcxproj", "{349B99E4-2E79-44FE-96F9-02D9B4EC0584}"
ProjectSection(ProjectDependencies) = postProject
{5B01D900-2359-44CA-9914-6B0C6AFB7BE7} = {5B01D900-2359-44CA-9914-6B0C6AFB7BE7}
EndProjectSection
EndProject
Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "test_aarch64", "test_aarch64\test_aarch64.vcxproj", "{CBE31473-7D0E-41F5-AFCB-8C8422ED8908}"
ProjectSection(ProjectDependencies) = postProject
{5B01D900-2359-44CA-9914-6B0C6AFB7BE7} = {5B01D900-2359-44CA-9914-6B0C6AFB7BE7}
EndProjectSection
EndProject
Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "test_bpf", "test_bpf\test_bpf.vcxproj", "{0D6D7A52-AECB-4ABC-80F5-FC037485BEF9}"
ProjectSection(ProjectDependencies) = postProject
{5B01D900-2359-44CA-9914-6B0C6AFB7BE7} = {5B01D900-2359-44CA-9914-6B0C6AFB7BE7}
EndProjectSection
EndProject
Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "test_evm", "test_evm\test_evm.vcxproj", "{5C74F923-B43A-4867-96FF-06470B6AADC7}"
ProjectSection(ProjectDependencies) = postProject
{5B01D900-2359-44CA-9914-6B0C6AFB7BE7} = {5B01D900-2359-44CA-9914-6B0C6AFB7BE7}
EndProjectSection
EndProject
Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "test_m680x", "test_m680x\test_m680x.vcxproj", "{0DF9BCD6-A572-4503-9D88-5933143D7824}"
ProjectSection(ProjectDependencies) = postProject
{5B01D900-2359-44CA-9914-6B0C6AFB7BE7} = {5B01D900-2359-44CA-9914-6B0C6AFB7BE7}
EndProjectSection
EndProject
Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "test_m68k", "test_m68k\test_m68k.vcxproj", "{5B880AB5-E54F-11E3-8C65-B8E8563B7B00}"
ProjectSection(ProjectDependencies) = postProject
{5B01D900-2359-44CA-9914-6B0C6AFB7BE7} = {5B01D900-2359-44CA-9914-6B0C6AFB7BE7}
EndProjectSection
EndProject
Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "test_mips", "test_mips\test_mips.vcxproj", "{28B2D82F-3E95-4ECE-8118-0E891BD453E0}"
ProjectSection(ProjectDependencies) = postProject
{5B01D900-2359-44CA-9914-6B0C6AFB7BE7} = {5B01D900-2359-44CA-9914-6B0C6AFB7BE7}
EndProjectSection
EndProject
Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "test_mos65xx", "test_mos65xx\test_mos65xx.vcxproj", "{E99E4A22-3149-4B80-94F9-BEE0EE45CF6F}"
ProjectSection(ProjectDependencies) = postProject
{5B01D900-2359-44CA-9914-6B0C6AFB7BE7} = {5B01D900-2359-44CA-9914-6B0C6AFB7BE7}
EndProjectSection
EndProject
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@ -5,9 +5,9 @@ SPDX-License-Identifier: BSD-3
# Architecture updater - Auto-Sync # Architecture updater - Auto-Sync
`auto-sync` is the architecture update tool for Capstone. `Auto-Sync` is the architecture update tool for Capstone.
Because the architecture modules of Capstone use mostly code from LLVM, Because the architecture modules of Capstone use mostly code from LLVM,
we need to update this part with every LLVM release. `auto-sync` helps we need to update this part with every LLVM release. `Auto-Sync` helps
with this synchronization between LLVM and Capstone's modules by with this synchronization between LLVM and Capstone's modules by
automating most of it. automating most of it.
@ -57,14 +57,14 @@ Just ensure it is in your `PATH` as `llvm-mc` and `FileCheck` (not as `llvm-mc-1
## Architecture ## Architecture
Please read [ARCHITECTURE.md](https://github.com/capstone-engine/capstone/blob/next/docs/ARCHITECTURE.md) to understand how Auto-Sync works. Please read [ARCHITECTURE.md](https://github.com/capstone-engine/capstone/blob/next/docs/ARCHITECTURE.md) to understand how `Auto-Sync` works.
This step is essential! Please don't skip it. This step is essential! Please don't skip it.
## Update an architecture ## Update an architecture
Updating an architecture module to the newest LLVM release, is only possible if it uses Auto-Sync. Updating an architecture module to the newest LLVM release, is only possible if it uses `Auto-Sync`.
Not all arch-modules support Auto-Sync yet. Not all arch-modules support `Auto-Sync` yet.
Check if your architecture is supported. Check if your architecture is supported.
@ -94,6 +94,22 @@ you will get build errors if you try to compile Capstone.
The last step to finish the update is to fix those build errors by hand. The last step to finish the update is to fix those build errors by hand.
## Refactor an architecture
Not all architecture modules support `Auto-Sync` yet.
Here is an overview of the steps to add support for it.
<hr>
To refactor one of them to use `Auto-Sync` please follow the [RefactorGuide.md](RefactorGuide.md)
## Adding a new architecture
Adding a new architecture follows the same steps as above. With the exception that you need
to implement all the Capstone files from scratch.
Check out an `Auto-Sync` supporting architectures for guidance and open an issue if you need help.
## Additional details ## Additional details
### Overview updated files ### Overview updated files
@ -162,60 +178,4 @@ Documentation about the `.inc` file generation is in the [llvm-capstone](https:/
python3 -m usort format src/autosync python3 -m usort format src/autosync
python3 -m black src/autosync python3 -m black src/autosync
``` ```
## Refactor an architecture for Auto-Sync framework
Not all architecture modules support Auto-Sync yet.
Here is an overview of the steps to add support for it.
<hr>
To refactor one of them to use `auto-sync`, you need to add it to the configuration.
1. Add the architecture to the supported architectures list in `ASUpdater.py`.
2. Configure the `CppTranslator` for your architecture (`suite/auto-sync/CppTranslator/arch_config.json`)
Now, manually run the update commands within `ASUpdater.py` but *skip* the `Differ` step:
```
./Updater/ASUpdater.py -a <ARCH> -s IncGen Translate
```
The task after this is to:
- Replace leftover C++ syntax with its C equivalent.
- Implement the `add_cs_detail()` handler in `<ARCH>Mapping` for each operand type.
- Edit the main header file of the architecture (`include/capstone/<ARCH>.h`) to include the generated enums (see below)
- Add any missing logic to the translated files.
- Make it build and write tests.
- Run the Differ again and always select the old nodes.
**Notes:**
- Some generated enums must be included in the `include/capstone/<ARCH>.h` header.
At the position where the enum should be inserted, add a comment like this (don't remove the `<>` brackets):
```
// generate content <FILENAME.inc> begin
// generate content <FILENAME.inc> end
```
The update script will insert the content of the `.inc` file at this place.
- If you find yourself fixing the same syntax error multiple times,
please consider adding a `Patch` to the `CppTranslator` for this case.
- Please check out the implementation of ARM's `add_cs_detail()` before implementing your own.
- Running the `Differ` after everything is done, preserves your version of syntax corrections, and the next user can auto-apply them.
- Sometimes the LLVM code uses a single function from a larger source file.
It is not worth it to translate the whole file just for this function.
Bundle those lonely functions in `<ARCH>DisassemblerExtension.c`.
## Adding a new architecture
Adding a new architecture follows the same steps as above. With the exception that you need
to implement all the Capstone files from scratch.
Check out an `auto-sync` supporting architectures for guidance and open an issue if you need help.

84
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@ -0,0 +1,84 @@
# Refactor guide
This is a step by step overview how to refactor an architecture.
It can also be used to add a new architecture module. As long as it is supported by LLVM or a fork of it.
Please always contact us in the [Auto-Sync tracking issue](https://github.com/capstone-engine/capstone/issues/2015)
before working on a module.
We can provide support and save you a lot of time.
Don't hesitate to ask any questions in our [Telegram Community channel](https://t.me/CapstoneEngine).
Especially if you feel stuck or struggle to understand where an issue is coming from.
The update process is, although already simplified, relatively complex.
## Refactoring
Note:
- If we talk about C++ files in the steps below, we always refer to the files in the LLVM repo.
- `PrinterCapstone` is the class defined in `llvm-capstone/llvm/utils/TabelGen/PrinterCapstone.cpp`
- Always attempt to make the translated C file behave as closely as possible to the original C++ file! This greatly helps debugging and assures that Capstone behaves almost exactly the same as original LLVM.
- ### Prepare
- Read `CONTRIBUTING.md`
- Read `docs/ARCHITECTURE.md`
- Read `suite/auto-sync/README.md`
- Read `suite/auto-sync/ARCHITECTURE.md`
- Read `suite/auto-sync/intro.md`
- Delete all files in `arch/<ARCH>/`, except the `ARCHModule.*` and `ARCHMapping.*`.
- `cd suite/auto-sync/`
- ### Generate `inc` files
- `pip install -e .`
- Clone and build `llvm-tblgen` (see docs)
- Quickly check options of the updater `ASUpdater -h`
- Add Arch name in `Target.py`
- In [llvm-capstone](https://github.com/capstone-engine/llvm-capstone) handle arch in `PrinterCapstone.cpp::decoderEmitterEmitFieldFromInstruction()` (add decoder function)
- Generate: `ASUpdater -s IncGen -a ARCH`
- Errors? Check if the error message tells you what to do. If no hint exists, ask us.
- Check if `inc` files in `build` look good.
- ### Translation and Patching
- Check for template functions in `<ARCH>InstPrinter.cpp` and `<ARCH>Disassember.cpp`
- Copy new config in `arch_conf.json` (LoongArch for a minimal example).
- Don't forget to add `ARCHIntPrinter.cpp` to the list of the `AddCSDetail` tests!
- Add as a minimum the `<ARCH>InstPrinter.cpp`, `<ARCH>InstPrinter.h` and `<ARCH>Disassembler.cpp` to the translation list.
- Tip: The variables use in there are defined in `path_vars.json`
- Add architecture specific includes in `Patches/Includes.py`. Copy the code from another architecture for the beginning.
- Prepare API header (`<arch>.h`) for patching:
- Check the generated `inc` files. Files names like `<ARCH>GenCS<something>Enum.inc` contain enumerations for the header. Those get patched into the main header file of the architecture.
- Remove old values and add `// generated content <...> begin` comments for patching. Checkout `longarch.h` as example.
- Commit all changes so far.
- The next step will write to the `arch/` and `include/capstone/<arch>.h` header!
- Run generation, translation and copy/patch the files: `ASUpdater -a <ARCH> -w --copy-translated -s IncGen Translate PatchArchHeader`
- ### Clean up
- #### Check: All necessary files
- Arch header:
- Invalid characters in enum identifiers? Replace char in `PrinterCapstone::normalizedMnemonic`
- In `arch/<ARCH>`
- Missing identifier/symbols? -> Check if they are somewhere in the generated files. If yes, included them and update `Include.py`. If not, you have to find the LLVM source file where they are defined and add it to the `arch_config.json` to translate it.
- OR it needs the `SystemOperands.inc` file. Also can be generated by adding the arch to the list in `inc_gen.json`.
- Note: When you start the next step, you likely don't want to generate, translate and copy files again. Because your had-made fixes get overwritten. So ensure you no longer use the `-w` flag for the `ASUpdater` and you checked thoroughly that all necessary files got translated!
- Commit to save changes so far.
- #### Remove and fix C++ syntax
- Remove all **obvious irrelevant** C++ code from the translated files (e.g. class initializes)
- Double check non-obvious cases, if they are important. Rember: removing something might lead to bugs later!
- If in doubt, ask us.
- If you fix the same syntax over and over again, consider adding a Patch for the `CppTranslator`.
- Common problems:
- Missing namespace prefix `unsigned GR32Regs[]` should be `unsigned ARCH_GR32Regs[]`. See `namespace begin/end` comments in the code.
- TODO: Add more.
- If in doubt, check the original C++ file in the LLVM repo.
- ### Make it build
- Add `ARCHLinkage.h` and the functions in the `InstPrinter.c`, `ArchDisassembler.c`.
- Add essential code in `ARCHMapping.c`. Esential is everything **not** releated to details.
- If unsure how to do Capstone <-> LLVM code things, always check LoongArch. If LoongArch doesn't handle this case, check Mips, SystemZ
- ### Run tests & Fixing bugs
- Update regression MC tests: Map LLVM `mattr` and `mcpu` names to the CS identifiers if necessary. -> Edit the `mcupdater.json` config file.
- Update tests: `ASUpdater -s MCUpdate -a Arch -w`
- Run MC tests: `cstest tests/MC/Arch`
- ### Add details
- Effectively copy behavior from `LoongArchMapping.c` or `SystemZMapping.c` but change values.
- Changes to the API (structs in `arch.h`) are only allowed if it was wrong before. Otherwise only extensions.
- Don't forget to update the Python bindings.
- Run detail tests to check results.
- Run detail tests with coverage. `ArchMapping.c` should be covered near 100%

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@ -2,7 +2,7 @@ This documentation explains how to compile Capstone for:
- Windows CE 7, a.k.a, [Windows Embedded Compact 7](https://www.microsoft.com/windowsembedded/en-us/windows-embedded-compact-7.aspx), on [ARMv7](http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0406c/index.html). - Windows CE 7, a.k.a, [Windows Embedded Compact 7](https://www.microsoft.com/windowsembedded/en-us/windows-embedded-compact-7.aspx), on [ARMv7](http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0406c/index.html).
- Windows CE 8, a.k.a, [Windows Embedded Compact 2013](https://www.microsoft.com/windowsembedded/en-us/windows-embedded-compact-2013.aspx), on [ARMv7](http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0406c/index.html). - Windows CE 8, a.k.a, [Windows Embedded Compact 2013](https://www.microsoft.com/windowsembedded/en-us/windows-embedded-compact-2013.aspx), on [ARMv7](http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0406c/index.html).
To build Capstone for a different platform, please refer to `COMPILE_CMAKE.TXT`. To build Capstone for a different platform, please refer to `BUILDING.md`.
# Prerequisites # Prerequisites