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Generated new Armv9.2 AArch64 .inc files from LLVM 14.0.5

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This commit is contained in:
Finn Wilkinson 2022-09-30 15:51:03 +01:00
parent 3ef5bb6b79
commit 4a5e69f69e
12 changed files with 81440 additions and 55388 deletions
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45778
arch/AArch64/AArch64GenAsmWriter.inc
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44257
arch/AArch64/AArch64GenDisassemblerTables.inc
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22598
arch/AArch64/AArch64GenInstrInfo.inc
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5034
arch/AArch64/AArch64GenRegisterInfo.inc
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1196
arch/AArch64/AArch64GenRegisterName.inc
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55
arch/AArch64/AArch64GenRegisterV.inc
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@ -1,4 +1,6 @@
// size = 660
// size = 673
0,
0,
0,
0,
0,
@ -307,6 +309,37 @@ ARM64_REG_V31,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
ARM64_REG_V0,
ARM64_REG_V1,
ARM64_REG_V2,
@ -638,23 +671,3 @@ ARM64_REG_V31,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,

279
arch/AArch64/AArch64GenSubtargetInfo.inc
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@ -12,71 +12,218 @@
enum {
AArch64_FeatureAES = 0,
AArch64_FeatureAggressiveFMA = 1,
AArch64_FeatureAlternateSExtLoadCVTF32Pattern = 2,
AArch64_FeatureArithmeticBccFusion = 3,
AArch64_FeatureArithmeticCbzFusion = 4,
AArch64_FeatureBalanceFPOps = 5,
AArch64_FeatureCRC = 6,
AArch64_FeatureCrypto = 7,
AArch64_FeatureCustomCheapAsMoveHandling = 8,
AArch64_FeatureDisableLatencySchedHeuristic = 9,
AArch64_FeatureDotProd = 10,
AArch64_FeatureExynosCheapAsMoveHandling = 11,
AArch64_FeatureFPARMv8 = 12,
AArch64_FeatureFullFP16 = 13,
AArch64_FeatureFuseAES = 14,
AArch64_FeatureFuseAddress = 15,
AArch64_FeatureFuseCCSelect = 16,
AArch64_FeatureFuseLiterals = 17,
AArch64_FeatureLSE = 18,
AArch64_FeatureLSLFast = 19,
AArch64_FeatureNEON = 20,
AArch64_FeatureNoNegativeImmediates = 21,
AArch64_FeaturePerfMon = 22,
AArch64_FeaturePostRAScheduler = 23,
AArch64_FeaturePredictableSelectIsExpensive = 24,
AArch64_FeatureRAS = 25,
AArch64_FeatureRCPC = 26,
AArch64_FeatureRDM = 27,
AArch64_FeatureReserveX18 = 28,
AArch64_FeatureReserveX20 = 29,
AArch64_FeatureSHA2 = 30,
AArch64_FeatureSHA3 = 31,
AArch64_FeatureSM4 = 32,
AArch64_FeatureSPE = 33,
AArch64_FeatureSVE = 34,
AArch64_FeatureSlowMisaligned128Store = 35,
AArch64_FeatureSlowPaired128 = 36,
AArch64_FeatureSlowSTRQro = 37,
AArch64_FeatureStrictAlign = 38,
AArch64_FeatureUseAA = 39,
AArch64_FeatureUseRSqrt = 40,
AArch64_FeatureZCRegMove = 41,
AArch64_FeatureZCZeroing = 42,
AArch64_FeatureZCZeroingFPWorkaround = 43,
AArch64_HasV8_1aOps = 44,
AArch64_HasV8_2aOps = 45,
AArch64_HasV8_3aOps = 46,
AArch64_HasV8_4aOps = 47,
AArch64_ProcA35 = 48,
AArch64_ProcA53 = 49,
AArch64_ProcA55 = 50,
AArch64_ProcA57 = 51,
AArch64_ProcA72 = 52,
AArch64_ProcA73 = 53,
AArch64_ProcA75 = 54,
AArch64_ProcCyclone = 55,
AArch64_ProcExynosM1 = 56,
AArch64_ProcExynosM2 = 57,
AArch64_ProcExynosM3 = 58,
AArch64_ProcFalkor = 59,
AArch64_ProcKryo = 60,
AArch64_ProcSaphira = 61,
AArch64_ProcThunderX = 62,
AArch64_ProcThunderX2T99 = 63,
AArch64_ProcThunderXT81 = 64,
AArch64_ProcThunderXT83 = 65,
AArch64_ProcThunderXT88 = 66,
AArch64_FeatureAM = 1,
AArch64_FeatureAMVS = 2,
AArch64_FeatureAggressiveFMA = 3,
AArch64_FeatureAltFPCmp = 4,
AArch64_FeatureAlternateSExtLoadCVTF32Pattern = 5,
AArch64_FeatureAppleA7SysReg = 6,
AArch64_FeatureArithmeticBccFusion = 7,
AArch64_FeatureArithmeticCbzFusion = 8,
AArch64_FeatureBF16 = 9,
AArch64_FeatureBRBE = 10,
AArch64_FeatureBalanceFPOps = 11,
AArch64_FeatureBranchTargetId = 12,
AArch64_FeatureCCIDX = 13,
AArch64_FeatureCCPP = 14,
AArch64_FeatureCONTEXTIDREL2 = 15,
AArch64_FeatureCRC = 16,
AArch64_FeatureCacheDeepPersist = 17,
AArch64_FeatureCallSavedX8 = 18,
AArch64_FeatureCallSavedX9 = 19,
AArch64_FeatureCallSavedX10 = 20,
AArch64_FeatureCallSavedX11 = 21,
AArch64_FeatureCallSavedX12 = 22,
AArch64_FeatureCallSavedX13 = 23,
AArch64_FeatureCallSavedX14 = 24,
AArch64_FeatureCallSavedX15 = 25,
AArch64_FeatureCallSavedX18 = 26,
AArch64_FeatureCmpBccFusion = 27,
AArch64_FeatureComplxNum = 28,
AArch64_FeatureCrypto = 29,
AArch64_FeatureCustomCheapAsMoveHandling = 30,
AArch64_FeatureDIT = 31,
AArch64_FeatureDisableLatencySchedHeuristic = 32,
AArch64_FeatureDotProd = 33,
AArch64_FeatureEL2VMSA = 34,
AArch64_FeatureEL3 = 35,
AArch64_FeatureETE = 36,
AArch64_FeatureEnhancedCounterVirtualization = 37,
AArch64_FeatureExperimentalZeroingPseudos = 38,
AArch64_FeatureExynosCheapAsMoveHandling = 39,
AArch64_FeatureFP16FML = 40,
AArch64_FeatureFPARMv8 = 41,
AArch64_FeatureFRInt3264 = 42,
AArch64_FeatureFineGrainedTraps = 43,
AArch64_FeatureFixCortexA53_835769 = 44,
AArch64_FeatureFlagM = 45,
AArch64_FeatureForce32BitJumpTables = 46,
AArch64_FeatureFullFP16 = 47,
AArch64_FeatureFuseAES = 48,
AArch64_FeatureFuseAddress = 49,
AArch64_FeatureFuseArithmeticLogic = 50,
AArch64_FeatureFuseCCSelect = 51,
AArch64_FeatureFuseCryptoEOR = 52,
AArch64_FeatureFuseLiterals = 53,
AArch64_FeatureHBC = 54,
AArch64_FeatureHCX = 55,
AArch64_FeatureHardenSlsBlr = 56,
AArch64_FeatureHardenSlsNoComdat = 57,
AArch64_FeatureHardenSlsRetBr = 58,
AArch64_FeatureJS = 59,
AArch64_FeatureLOR = 60,
AArch64_FeatureLS64 = 61,
AArch64_FeatureLSE = 62,
AArch64_FeatureLSE2 = 63,
AArch64_FeatureLSLFast = 64,
AArch64_FeatureMOPS = 65,
AArch64_FeatureMPAM = 66,
AArch64_FeatureMTE = 67,
AArch64_FeatureMatMulFP32 = 68,
AArch64_FeatureMatMulFP64 = 69,
AArch64_FeatureMatMulInt8 = 70,
AArch64_FeatureNEON = 71,
AArch64_FeatureNV = 72,
AArch64_FeatureNoBTIAtReturnTwice = 73,
AArch64_FeatureNoNegativeImmediates = 74,
AArch64_FeatureNoZCZeroingFP = 75,
AArch64_FeatureOutlineAtomics = 76,
AArch64_FeaturePAN = 77,
AArch64_FeaturePAN_RWV = 78,
AArch64_FeaturePAuth = 79,
AArch64_FeaturePerfMon = 80,
AArch64_FeaturePostRAScheduler = 81,
AArch64_FeaturePredRes = 82,
AArch64_FeaturePredictableSelectIsExpensive = 83,
AArch64_FeaturePsUAO = 84,
AArch64_FeatureRAS = 85,
AArch64_FeatureRCPC = 86,
AArch64_FeatureRCPC_IMMO = 87,
AArch64_FeatureRDM = 88,
AArch64_FeatureRME = 89,
AArch64_FeatureRandGen = 90,
AArch64_FeatureReserveX1 = 91,
AArch64_FeatureReserveX2 = 92,
AArch64_FeatureReserveX3 = 93,
AArch64_FeatureReserveX4 = 94,
AArch64_FeatureReserveX5 = 95,
AArch64_FeatureReserveX6 = 96,
AArch64_FeatureReserveX7 = 97,
AArch64_FeatureReserveX9 = 98,
AArch64_FeatureReserveX10 = 99,
AArch64_FeatureReserveX11 = 100,
AArch64_FeatureReserveX12 = 101,
AArch64_FeatureReserveX13 = 102,
AArch64_FeatureReserveX14 = 103,
AArch64_FeatureReserveX15 = 104,
AArch64_FeatureReserveX18 = 105,
AArch64_FeatureReserveX20 = 106,
AArch64_FeatureReserveX21 = 107,
AArch64_FeatureReserveX22 = 108,
AArch64_FeatureReserveX23 = 109,
AArch64_FeatureReserveX24 = 110,
AArch64_FeatureReserveX25 = 111,
AArch64_FeatureReserveX26 = 112,
AArch64_FeatureReserveX27 = 113,
AArch64_FeatureReserveX28 = 114,
AArch64_FeatureReserveX30 = 115,
AArch64_FeatureSB = 116,
AArch64_FeatureSEL2 = 117,
AArch64_FeatureSHA2 = 118,
AArch64_FeatureSHA3 = 119,
AArch64_FeatureSM4 = 120,
AArch64_FeatureSME = 121,
AArch64_FeatureSMEF64 = 122,
AArch64_FeatureSMEI64 = 123,
AArch64_FeatureSPE = 124,
AArch64_FeatureSPE_EEF = 125,
AArch64_FeatureSSBS = 126,
AArch64_FeatureSVE = 127,
AArch64_FeatureSVE2 = 128,
AArch64_FeatureSVE2AES = 129,
AArch64_FeatureSVE2BitPerm = 130,
AArch64_FeatureSVE2SHA3 = 131,
AArch64_FeatureSVE2SM4 = 132,
AArch64_FeatureSlowMisaligned128Store = 133,
AArch64_FeatureSlowPaired128 = 134,
AArch64_FeatureSlowSTRQro = 135,
AArch64_FeatureSpecRestrict = 136,
AArch64_FeatureStreamingSVE = 137,
AArch64_FeatureStrictAlign = 138,
AArch64_FeatureTLB_RMI = 139,
AArch64_FeatureTME = 140,
AArch64_FeatureTRACEV8_4 = 141,
AArch64_FeatureTRBE = 142,
AArch64_FeatureTaggedGlobals = 143,
AArch64_FeatureUseEL1ForTP = 144,
AArch64_FeatureUseEL2ForTP = 145,
AArch64_FeatureUseEL3ForTP = 146,
AArch64_FeatureUseRSqrt = 147,
AArch64_FeatureUseScalarIncVL = 148,
AArch64_FeatureVH = 149,
AArch64_FeatureWFxT = 150,
AArch64_FeatureXS = 151,
AArch64_FeatureZCRegMove = 152,
AArch64_FeatureZCZeroing = 153,
AArch64_FeatureZCZeroingFPWorkaround = 154,
AArch64_FeatureZCZeroingGP = 155,
AArch64_HasV8_0aOps = 156,
AArch64_HasV8_0rOps = 157,
AArch64_HasV8_1aOps = 158,
AArch64_HasV8_2aOps = 159,
AArch64_HasV8_3aOps = 160,
AArch64_HasV8_4aOps = 161,
AArch64_HasV8_5aOps = 162,
AArch64_HasV8_6aOps = 163,
AArch64_HasV8_7aOps = 164,
AArch64_HasV8_8aOps = 165,
AArch64_HasV9_0aOps = 166,
AArch64_HasV9_1aOps = 167,
AArch64_HasV9_2aOps = 168,
AArch64_HasV9_3aOps = 169,
AArch64_TuneA35 = 170,
AArch64_TuneA53 = 171,
AArch64_TuneA55 = 172,
AArch64_TuneA57 = 173,
AArch64_TuneA64FX = 174,
AArch64_TuneA65 = 175,
AArch64_TuneA72 = 176,
AArch64_TuneA73 = 177,
AArch64_TuneA75 = 178,
AArch64_TuneA76 = 179,
AArch64_TuneA77 = 180,
AArch64_TuneA78 = 181,
AArch64_TuneA78C = 182,
AArch64_TuneA510 = 183,
AArch64_TuneA710 = 184,
AArch64_TuneAmpere1 = 185,
AArch64_TuneAppleA7 = 186,
AArch64_TuneAppleA10 = 187,
AArch64_TuneAppleA11 = 188,
AArch64_TuneAppleA12 = 189,
AArch64_TuneAppleA13 = 190,
AArch64_TuneAppleA14 = 191,
AArch64_TuneCarmel = 192,
AArch64_TuneExynosM3 = 193,
AArch64_TuneExynosM4 = 194,
AArch64_TuneFalkor = 195,
AArch64_TuneKryo = 196,
AArch64_TuneNeoverse512TVB = 197,
AArch64_TuneNeoverseE1 = 198,
AArch64_TuneNeoverseN1 = 199,
AArch64_TuneNeoverseN2 = 200,
AArch64_TuneNeoverseV1 = 201,
AArch64_TuneR82 = 202,
AArch64_TuneSaphira = 203,
AArch64_TuneTSV110 = 204,
AArch64_TuneThunderX = 205,
AArch64_TuneThunderX2T99 = 206,
AArch64_TuneThunderX3T110 = 207,
AArch64_TuneThunderXT81 = 208,
AArch64_TuneThunderXT83 = 209,
AArch64_TuneThunderXT88 = 210,
AArch64_TuneX1 = 211,
AArch64_TuneX2 = 212,
AArch64_NumSubtargetFeatures = 213
};

4312
arch/AArch64/AArch64GenSystemOperands.inc
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2
arch/AArch64/AArch64GenSystemOperands_enum.inc
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@ -8,6 +8,8 @@ enum PStateValues {
AArch64PState_PAN = 4,
AArch64PState_UAO = 3,
AArch64PState_DIT = 26,
AArch64PState_SSBS = 25,
AArch64PState_TCO = 28,
};
enum ExactFPImmValues {

7562
arch/AArch64/AArch64MappingInsn.inc
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339
arch/AArch64/AArch64MappingInsnName.inc
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@ -4,14 +4,21 @@
"abs", // ARM64_INS_ABS,
"adc", // ARM64_INS_ADC,
"adclb", // ARM64_INS_ADCLB,
"adclt", // ARM64_INS_ADCLT,
"adcs", // ARM64_INS_ADCS,
"add", // ARM64_INS_ADD,
"addg", // ARM64_INS_ADDG,
"addha", // ARM64_INS_ADDHA,
"addhn", // ARM64_INS_ADDHN,
"addhn2", // ARM64_INS_ADDHN2,
"addhnb", // ARM64_INS_ADDHNB,
"addhnt", // ARM64_INS_ADDHNT,
"addp", // ARM64_INS_ADDP,
"addpl", // ARM64_INS_ADDPL,
"adds", // ARM64_INS_ADDS,
"addv", // ARM64_INS_ADDV,
"addva", // ARM64_INS_ADDVA,
"addvl", // ARM64_INS_ADDVL,
"adr", // ARM64_INS_ADR,
"adrp", // ARM64_INS_ADRP,
@ -40,9 +47,24 @@
"autibz", // ARM64_INS_AUTIBZ,
"autiza", // ARM64_INS_AUTIZA,
"autizb", // ARM64_INS_AUTIZB,
"axflag", // ARM64_INS_AXFLAG,
"b", // ARM64_INS_B,
"bc", // ARM64_INS_BC,
"bcax", // ARM64_INS_BCAX,
"bdep", // ARM64_INS_BDEP,
"bext", // ARM64_INS_BEXT,
"bfcvt", // ARM64_INS_BFCVT,
"bfcvtn", // ARM64_INS_BFCVTN,
"bfcvtn2", // ARM64_INS_BFCVTN2,
"bfcvtnt", // ARM64_INS_BFCVTNT,
"bfdot", // ARM64_INS_BFDOT,
"bfm", // ARM64_INS_BFM,
"bfmlalb", // ARM64_INS_BFMLALB,
"bfmlalt", // ARM64_INS_BFMLALT,
"bfmmla", // ARM64_INS_BFMMLA,
"bfmopa", // ARM64_INS_BFMOPA,
"bfmops", // ARM64_INS_BFMOPS,
"bgrp", // ARM64_INS_BGRP,
"bic", // ARM64_INS_BIC,
"bics", // ARM64_INS_BICS,
"bif", // ARM64_INS_BIF,
@ -58,6 +80,7 @@
"braaz", // ARM64_INS_BRAAZ,
"brab", // ARM64_INS_BRAB,
"brabz", // ARM64_INS_BRABZ,
"brb", // ARM64_INS_BRB,
"brk", // ARM64_INS_BRK,
"brka", // ARM64_INS_BRKA,
"brkas", // ARM64_INS_BRKAS,
@ -70,6 +93,10 @@
"brkpb", // ARM64_INS_BRKPB,
"brkpbs", // ARM64_INS_BRKPBS,
"bsl", // ARM64_INS_BSL,
"bsl1n", // ARM64_INS_BSL1N,
"bsl2n", // ARM64_INS_BSL2N,
"bti", // ARM64_INS_BTI,
"cadd", // ARM64_INS_CADD,
"cas", // ARM64_INS_CAS,
"casa", // ARM64_INS_CASA,
"casab", // ARM64_INS_CASAB,
@ -90,6 +117,7 @@
"cbz", // ARM64_INS_CBZ,
"ccmn", // ARM64_INS_CCMN,
"ccmp", // ARM64_INS_CCMP,
"cdot", // ARM64_INS_CDOT,
"cfinv", // ARM64_INS_CFINV,
"cinc", // ARM64_INS_CINC,
"cinv", // ARM64_INS_CINV,
@ -103,6 +131,7 @@
"cmgt", // ARM64_INS_CMGT,
"cmhi", // ARM64_INS_CMHI,
"cmhs", // ARM64_INS_CMHS,
"cmla", // ARM64_INS_CMLA,
"cmle", // ARM64_INS_CMLE,
"cmlo", // ARM64_INS_CMLO,
"cmls", // ARM64_INS_CMLS,
@ -119,6 +148,7 @@
"cmpls", // ARM64_INS_CMPLS,
"cmplt", // ARM64_INS_CMPLT,
"cmpne", // ARM64_INS_CMPNE,
"cmpp", // ARM64_INS_CMPP,
"cmtst", // ARM64_INS_CMTST,
"cneg", // ARM64_INS_CNEG,
"cnot", // ARM64_INS_CNOT,
@ -130,6 +160,102 @@
"cntw", // ARM64_INS_CNTW,
"compact", // ARM64_INS_COMPACT,
"cpy", // ARM64_INS_CPY,
"cpye", // ARM64_INS_CPYE,
"cpyen", // ARM64_INS_CPYEN,
"cpyern", // ARM64_INS_CPYERN,
"cpyert", // ARM64_INS_CPYERT,
"cpyertn", // ARM64_INS_CPYERTN,
"cpyertrn", // ARM64_INS_CPYERTRN,
"cpyertwn", // ARM64_INS_CPYERTWN,
"cpyet", // ARM64_INS_CPYET,
"cpyetn", // ARM64_INS_CPYETN,
"cpyetrn", // ARM64_INS_CPYETRN,
"cpyetwn", // ARM64_INS_CPYETWN,
"cpyewn", // ARM64_INS_CPYEWN,
"cpyewt", // ARM64_INS_CPYEWT,
"cpyewtn", // ARM64_INS_CPYEWTN,
"cpyewtrn", // ARM64_INS_CPYEWTRN,
"cpyewtwn", // ARM64_INS_CPYEWTWN,
"cpyfe", // ARM64_INS_CPYFE,
"cpyfen", // ARM64_INS_CPYFEN,
"cpyfern", // ARM64_INS_CPYFERN,
"cpyfert", // ARM64_INS_CPYFERT,
"cpyfertn", // ARM64_INS_CPYFERTN,
"cpyfertrn", // ARM64_INS_CPYFERTRN,
"cpyfertwn", // ARM64_INS_CPYFERTWN,
"cpyfet", // ARM64_INS_CPYFET,
"cpyfetn", // ARM64_INS_CPYFETN,
"cpyfetrn", // ARM64_INS_CPYFETRN,
"cpyfetwn", // ARM64_INS_CPYFETWN,
"cpyfewn", // ARM64_INS_CPYFEWN,
"cpyfewt", // ARM64_INS_CPYFEWT,
"cpyfewtn", // ARM64_INS_CPYFEWTN,
"cpyfewtrn", // ARM64_INS_CPYFEWTRN,
"cpyfewtwn", // ARM64_INS_CPYFEWTWN,
"cpyfm", // ARM64_INS_CPYFM,
"cpyfmn", // ARM64_INS_CPYFMN,
"cpyfmrn", // ARM64_INS_CPYFMRN,
"cpyfmrt", // ARM64_INS_CPYFMRT,
"cpyfmrtn", // ARM64_INS_CPYFMRTN,
"cpyfmrtrn", // ARM64_INS_CPYFMRTRN,
"cpyfmrtwn", // ARM64_INS_CPYFMRTWN,
"cpyfmt", // ARM64_INS_CPYFMT,
"cpyfmtn", // ARM64_INS_CPYFMTN,
"cpyfmtrn", // ARM64_INS_CPYFMTRN,
"cpyfmtwn", // ARM64_INS_CPYFMTWN,
"cpyfmwn", // ARM64_INS_CPYFMWN,
"cpyfmwt", // ARM64_INS_CPYFMWT,
"cpyfmwtn", // ARM64_INS_CPYFMWTN,
"cpyfmwtrn", // ARM64_INS_CPYFMWTRN,
"cpyfmwtwn", // ARM64_INS_CPYFMWTWN,
"cpyfp", // ARM64_INS_CPYFP,
"cpyfpn", // ARM64_INS_CPYFPN,
"cpyfprn", // ARM64_INS_CPYFPRN,
"cpyfprt", // ARM64_INS_CPYFPRT,
"cpyfprtn", // ARM64_INS_CPYFPRTN,
"cpyfprtrn", // ARM64_INS_CPYFPRTRN,
"cpyfprtwn", // ARM64_INS_CPYFPRTWN,
"cpyfpt", // ARM64_INS_CPYFPT,
"cpyfptn", // ARM64_INS_CPYFPTN,
"cpyfptrn", // ARM64_INS_CPYFPTRN,
"cpyfptwn", // ARM64_INS_CPYFPTWN,
"cpyfpwn", // ARM64_INS_CPYFPWN,
"cpyfpwt", // ARM64_INS_CPYFPWT,
"cpyfpwtn", // ARM64_INS_CPYFPWTN,
"cpyfpwtrn", // ARM64_INS_CPYFPWTRN,
"cpyfpwtwn", // ARM64_INS_CPYFPWTWN,
"cpym", // ARM64_INS_CPYM,
"cpymn", // ARM64_INS_CPYMN,
"cpymrn", // ARM64_INS_CPYMRN,
"cpymrt", // ARM64_INS_CPYMRT,
"cpymrtn", // ARM64_INS_CPYMRTN,
"cpymrtrn", // ARM64_INS_CPYMRTRN,
"cpymrtwn", // ARM64_INS_CPYMRTWN,
"cpymt", // ARM64_INS_CPYMT,
"cpymtn", // ARM64_INS_CPYMTN,
"cpymtrn", // ARM64_INS_CPYMTRN,
"cpymtwn", // ARM64_INS_CPYMTWN,
"cpymwn", // ARM64_INS_CPYMWN,
"cpymwt", // ARM64_INS_CPYMWT,
"cpymwtn", // ARM64_INS_CPYMWTN,
"cpymwtrn", // ARM64_INS_CPYMWTRN,
"cpymwtwn", // ARM64_INS_CPYMWTWN,
"cpyp", // ARM64_INS_CPYP,
"cpypn", // ARM64_INS_CPYPN,
"cpyprn", // ARM64_INS_CPYPRN,
"cpyprt", // ARM64_INS_CPYPRT,
"cpyprtn", // ARM64_INS_CPYPRTN,
"cpyprtrn", // ARM64_INS_CPYPRTRN,
"cpyprtwn", // ARM64_INS_CPYPRTWN,
"cpypt", // ARM64_INS_CPYPT,
"cpyptn", // ARM64_INS_CPYPTN,
"cpyptrn", // ARM64_INS_CPYPTRN,
"cpyptwn", // ARM64_INS_CPYPTWN,
"cpypwn", // ARM64_INS_CPYPWN,
"cpypwt", // ARM64_INS_CPYPWT,
"cpypwtn", // ARM64_INS_CPYPWTN,
"cpypwtrn", // ARM64_INS_CPYPWTRN,
"cpypwtwn", // ARM64_INS_CPYPWTWN,
"crc32b", // ARM64_INS_CRC32B,
"crc32cb", // ARM64_INS_CRC32CB,
"crc32ch", // ARM64_INS_CRC32CH,
@ -155,6 +281,8 @@
"dech", // ARM64_INS_DECH,
"decp", // ARM64_INS_DECP,
"decw", // ARM64_INS_DECW,
"dfb", // ARM64_INS_DFB,
"dgh", // ARM64_INS_DGH,
"dmb", // ARM64_INS_DMB,
"drps", // ARM64_INS_DRPS,
"dsb", // ARM64_INS_DSB,
@ -163,7 +291,9 @@
"eon", // ARM64_INS_EON,
"eor", // ARM64_INS_EOR,
"eor3", // ARM64_INS_EOR3,
"eorbt", // ARM64_INS_EORBT,
"eors", // ARM64_INS_EORS,
"eortb", // ARM64_INS_EORTB,
"eorv", // ARM64_INS_EORV,
"eret", // ARM64_INS_ERET,
"eretaa", // ARM64_INS_ERETAA,
@ -201,16 +331,20 @@
"fcvtau", // ARM64_INS_FCVTAU,
"fcvtl", // ARM64_INS_FCVTL,
"fcvtl2", // ARM64_INS_FCVTL2,
"fcvtlt", // ARM64_INS_FCVTLT,
"fcvtms", // ARM64_INS_FCVTMS,
"fcvtmu", // ARM64_INS_FCVTMU,
"fcvtn", // ARM64_INS_FCVTN,
"fcvtn2", // ARM64_INS_FCVTN2,
"fcvtns", // ARM64_INS_FCVTNS,
"fcvtnt", // ARM64_INS_FCVTNT,
"fcvtnu", // ARM64_INS_FCVTNU,
"fcvtps", // ARM64_INS_FCVTPS,
"fcvtpu", // ARM64_INS_FCVTPU,
"fcvtx", // ARM64_INS_FCVTX,
"fcvtxn", // ARM64_INS_FCVTXN,
"fcvtxn2", // ARM64_INS_FCVTXN2,
"fcvtxnt", // ARM64_INS_FCVTXNT,
"fcvtzs", // ARM64_INS_FCVTZS,
"fcvtzu", // ARM64_INS_FCVTZU,
"fdiv", // ARM64_INS_FDIV,
@ -218,6 +352,7 @@
"fdup", // ARM64_INS_FDUP,
"fexpa", // ARM64_INS_FEXPA,
"fjcvtzs", // ARM64_INS_FJCVTZS,
"flogb", // ARM64_INS_FLOGB,
"fmad", // ARM64_INS_FMAD,
"fmadd", // ARM64_INS_FMADD,
"fmax", // ARM64_INS_FMAX,
@ -233,7 +368,18 @@
"fminp", // ARM64_INS_FMINP,
"fminv", // ARM64_INS_FMINV,
"fmla", // ARM64_INS_FMLA,
"fmlal", // ARM64_INS_FMLAL,
"fmlal2", // ARM64_INS_FMLAL2,
"fmlalb", // ARM64_INS_FMLALB,
"fmlalt", // ARM64_INS_FMLALT,
"fmls", // ARM64_INS_FMLS,
"fmlsl", // ARM64_INS_FMLSL,
"fmlsl2", // ARM64_INS_FMLSL2,
"fmlslb", // ARM64_INS_FMLSLB,
"fmlslt", // ARM64_INS_FMLSLT,
"fmmla", // ARM64_INS_FMMLA,
"fmopa", // ARM64_INS_FMOPA,
"fmops", // ARM64_INS_FMOPS,
"fmov", // ARM64_INS_FMOV,
"fmsb", // ARM64_INS_FMSB,
"fmsub", // ARM64_INS_FMSUB,
@ -250,6 +396,10 @@
"frecpe", // ARM64_INS_FRECPE,
"frecps", // ARM64_INS_FRECPS,
"frecpx", // ARM64_INS_FRECPX,
"frint32x", // ARM64_INS_FRINT32X,
"frint32z", // ARM64_INS_FRINT32Z,
"frint64x", // ARM64_INS_FRINT64X,
"frint64z", // ARM64_INS_FRINT64Z,
"frinta", // ARM64_INS_FRINTA,
"frinti", // ARM64_INS_FRINTI,
"frintm", // ARM64_INS_FRINTM,
@ -266,7 +416,10 @@
"ftmad", // ARM64_INS_FTMAD,
"ftsmul", // ARM64_INS_FTSMUL,
"ftssel", // ARM64_INS_FTSSEL,
"gmi", // ARM64_INS_GMI,
"hint", // ARM64_INS_HINT,
"histcnt", // ARM64_INS_HISTCNT,
"histseg", // ARM64_INS_HISTSEG,
"hlt", // ARM64_INS_HLT,
"hvc", // ARM64_INS_HVC,
"incb", // ARM64_INS_INCB,
@ -277,6 +430,7 @@
"index", // ARM64_INS_INDEX,
"ins", // ARM64_INS_INS,
"insr", // ARM64_INS_INSR,
"irg", // ARM64_INS_IRG,
"isb", // ARM64_INS_ISB,
"lasta", // ARM64_INS_LASTA,
"lastb", // ARM64_INS_LASTB,
@ -284,10 +438,15 @@
"ld1b", // ARM64_INS_LD1B,
"ld1d", // ARM64_INS_LD1D,
"ld1h", // ARM64_INS_LD1H,
"ld1q", // ARM64_INS_LD1Q,
"ld1r", // ARM64_INS_LD1R,
"ld1rb", // ARM64_INS_LD1RB,
"ld1rd", // ARM64_INS_LD1RD,
"ld1rh", // ARM64_INS_LD1RH,
"ld1rob", // ARM64_INS_LD1ROB,
"ld1rod", // ARM64_INS_LD1ROD,
"ld1roh", // ARM64_INS_LD1ROH,
"ld1row", // ARM64_INS_LD1ROW,
"ld1rqb", // ARM64_INS_LD1RQB,
"ld1rqd", // ARM64_INS_LD1RQD,
"ld1rqh", // ARM64_INS_LD1RQH,
@ -318,6 +477,7 @@
"ld4h", // ARM64_INS_LD4H,
"ld4r", // ARM64_INS_LD4R,
"ld4w", // ARM64_INS_LD4W,
"ld64b", // ARM64_INS_LD64B,
"ldadd", // ARM64_INS_LDADD,
"ldadda", // ARM64_INS_LDADDA,
"ldaddab", // ARM64_INS_LDADDAB,
@ -377,6 +537,8 @@
"ldff1sh", // ARM64_INS_LDFF1SH,
"ldff1sw", // ARM64_INS_LDFF1SW,
"ldff1w", // ARM64_INS_LDFF1W,
"ldg", // ARM64_INS_LDG,
"ldgm", // ARM64_INS_LDGM,
"ldlar", // ARM64_INS_LDLAR,
"ldlarb", // ARM64_INS_LDLARB,
"ldlarh", // ARM64_INS_LDLARH,
@ -391,6 +553,9 @@
"ldnt1b", // ARM64_INS_LDNT1B,
"ldnt1d", // ARM64_INS_LDNT1D,
"ldnt1h", // ARM64_INS_LDNT1H,
"ldnt1sb", // ARM64_INS_LDNT1SB,
"ldnt1sh", // ARM64_INS_LDNT1SH,
"ldnt1sw", // ARM64_INS_LDNT1SW,
"ldnt1w", // ARM64_INS_LDNT1W,
"ldp", // ARM64_INS_LDP,
"ldpsw", // ARM64_INS_LDPSW,
@ -486,10 +651,12 @@
"lsrv", // ARM64_INS_LSRV,
"mad", // ARM64_INS_MAD,
"madd", // ARM64_INS_MADD,
"match", // ARM64_INS_MATCH,
"mla", // ARM64_INS_MLA,
"mls", // ARM64_INS_MLS,
"mneg", // ARM64_INS_MNEG,
"mov", // ARM64_INS_MOV,
"mova", // ARM64_INS_MOVA,
"movi", // ARM64_INS_MOVI,
"movk", // ARM64_INS_MOVK,
"movn", // ARM64_INS_MOVN,
@ -505,10 +672,12 @@
"mvni", // ARM64_INS_MVNI,
"nand", // ARM64_INS_NAND,
"nands", // ARM64_INS_NANDS,
"nbsl", // ARM64_INS_NBSL,
"neg", // ARM64_INS_NEG,
"negs", // ARM64_INS_NEGS,
"ngc", // ARM64_INS_NGC,
"ngcs", // ARM64_INS_NGCS,
"nmatch", // ARM64_INS_NMATCH,
"nop", // ARM64_INS_NOP,
"nor", // ARM64_INS_NOR,
"nors", // ARM64_INS_NORS,
@ -539,6 +708,8 @@
"pmul", // ARM64_INS_PMUL,
"pmull", // ARM64_INS_PMULL,
"pmull2", // ARM64_INS_PMULL2,
"pmullb", // ARM64_INS_PMULLB,
"pmullt", // ARM64_INS_PMULLT,
"pnext", // ARM64_INS_PNEXT,
"prfb", // ARM64_INS_PRFB,
"prfd", // ARM64_INS_PRFD,
@ -547,6 +718,8 @@
"prfum", // ARM64_INS_PRFUM,
"prfw", // ARM64_INS_PRFW,
"psb", // ARM64_INS_PSB,
"psel", // ARM64_INS_PSEL,
"pssbb", // ARM64_INS_PSSBB,
"ptest", // ARM64_INS_PTEST,
"ptrue", // ARM64_INS_PTRUE,
"ptrues", // ARM64_INS_PTRUES,
@ -554,6 +727,8 @@
"punpklo", // ARM64_INS_PUNPKLO,
"raddhn", // ARM64_INS_RADDHN,
"raddhn2", // ARM64_INS_RADDHN2,
"raddhnb", // ARM64_INS_RADDHNB,
"raddhnt", // ARM64_INS_RADDHNT,
"rax1", // ARM64_INS_RAX1,
"rbit", // ARM64_INS_RBIT,
"rdffr", // ARM64_INS_RDFFR,
@ -567,6 +742,7 @@
"rev32", // ARM64_INS_REV32,
"rev64", // ARM64_INS_REV64,
"revb", // ARM64_INS_REVB,
"revd", // ARM64_INS_REVD,
"revh", // ARM64_INS_REVH,
"revw", // ARM64_INS_REVW,
"rmif", // ARM64_INS_RMIF,
@ -574,33 +750,74 @@
"rorv", // ARM64_INS_RORV,
"rshrn", // ARM64_INS_RSHRN,
"rshrn2", // ARM64_INS_RSHRN2,
"rshrnb", // ARM64_INS_RSHRNB,
"rshrnt", // ARM64_INS_RSHRNT,
"rsubhn", // ARM64_INS_RSUBHN,
"rsubhn2", // ARM64_INS_RSUBHN2,
"rsubhnb", // ARM64_INS_RSUBHNB,
"rsubhnt", // ARM64_INS_RSUBHNT,
"saba", // ARM64_INS_SABA,
"sabal", // ARM64_INS_SABAL,
"sabal2", // ARM64_INS_SABAL2,
"sabalb", // ARM64_INS_SABALB,
"sabalt", // ARM64_INS_SABALT,
"sabd", // ARM64_INS_SABD,
"sabdl", // ARM64_INS_SABDL,
"sabdl2", // ARM64_INS_SABDL2,
"sabdlb", // ARM64_INS_SABDLB,
"sabdlt", // ARM64_INS_SABDLT,
"sadalp", // ARM64_INS_SADALP,
"saddl", // ARM64_INS_SADDL,
"saddl2", // ARM64_INS_SADDL2,
"saddlb", // ARM64_INS_SADDLB,
"saddlbt", // ARM64_INS_SADDLBT,
"saddlp", // ARM64_INS_SADDLP,
"saddlt", // ARM64_INS_SADDLT,
"saddlv", // ARM64_INS_SADDLV,
"saddv", // ARM64_INS_SADDV,
"saddw", // ARM64_INS_SADDW,
"saddw2", // ARM64_INS_SADDW2,
"saddwb", // ARM64_INS_SADDWB,
"saddwt", // ARM64_INS_SADDWT,
"sb", // ARM64_INS_SB,
"sbc", // ARM64_INS_SBC,
"sbclb", // ARM64_INS_SBCLB,
"sbclt", // ARM64_INS_SBCLT,
"sbcs", // ARM64_INS_SBCS,
"sbfm", // ARM64_INS_SBFM,
"sclamp", // ARM64_INS_SCLAMP,
"scvtf", // ARM64_INS_SCVTF,
"sdiv", // ARM64_INS_SDIV,
"sdivr", // ARM64_INS_SDIVR,
"sdot", // ARM64_INS_SDOT,
"sel", // ARM64_INS_SEL,
"sete", // ARM64_INS_SETE,
"seten", // ARM64_INS_SETEN,
"setet", // ARM64_INS_SETET,
"setetn", // ARM64_INS_SETETN,
"setf16", // ARM64_INS_SETF16,
"setf8", // ARM64_INS_SETF8,
"setffr", // ARM64_INS_SETFFR,
"setge", // ARM64_INS_SETGE,
"setgen", // ARM64_INS_SETGEN,
"setget", // ARM64_INS_SETGET,
"setgetn", // ARM64_INS_SETGETN,
"setgm", // ARM64_INS_SETGM,
"setgmn", // ARM64_INS_SETGMN,
"setgmt", // ARM64_INS_SETGMT,
"setgmtn", // ARM64_INS_SETGMTN,
"setgp", // ARM64_INS_SETGP,
"setgpn", // ARM64_INS_SETGPN,
"setgpt", // ARM64_INS_SETGPT,
"setgptn", // ARM64_INS_SETGPTN,
"setm", // ARM64_INS_SETM,
"setmn", // ARM64_INS_SETMN,
"setmt", // ARM64_INS_SETMT,
"setmtn", // ARM64_INS_SETMTN,
"setp", // ARM64_INS_SETP,
"setpn", // ARM64_INS_SETPN,
"setpt", // ARM64_INS_SETPT,
"setptn", // ARM64_INS_SETPTN,
"sev", // ARM64_INS_SEV,
"sevl", // ARM64_INS_SEVL,
"sha1c", // ARM64_INS_SHA1C,
@ -623,7 +840,10 @@
"shll2", // ARM64_INS_SHLL2,
"shrn", // ARM64_INS_SHRN,
"shrn2", // ARM64_INS_SHRN2,
"shrnb", // ARM64_INS_SHRNB,
"shrnt", // ARM64_INS_SHRNT,
"shsub", // ARM64_INS_SHSUB,
"shsubr", // ARM64_INS_SHSUBR,
"sli", // ARM64_INS_SLI,
"sm3partw1", // ARM64_INS_SM3PARTW1,
"sm3partw2", // ARM64_INS_SM3PARTW2,
@ -644,17 +864,29 @@
"sminv", // ARM64_INS_SMINV,
"smlal", // ARM64_INS_SMLAL,
"smlal2", // ARM64_INS_SMLAL2,
"smlalb", // ARM64_INS_SMLALB,
"smlalt", // ARM64_INS_SMLALT,
"smlsl", // ARM64_INS_SMLSL,
"smlsl2", // ARM64_INS_SMLSL2,
"smlslb", // ARM64_INS_SMLSLB,
"smlslt", // ARM64_INS_SMLSLT,
"smmla", // ARM64_INS_SMMLA,
"smnegl", // ARM64_INS_SMNEGL,
"smopa", // ARM64_INS_SMOPA,
"smops", // ARM64_INS_SMOPS,
"smov", // ARM64_INS_SMOV,
"smstart", // ARM64_INS_SMSTART,
"smstop", // ARM64_INS_SMSTOP,
"smsubl", // ARM64_INS_SMSUBL,
"smulh", // ARM64_INS_SMULH,
"smull", // ARM64_INS_SMULL,
"smull2", // ARM64_INS_SMULL2,
"smullb", // ARM64_INS_SMULLB,
"smullt", // ARM64_INS_SMULLT,
"splice", // ARM64_INS_SPLICE,
"sqabs", // ARM64_INS_SQABS,
"sqadd", // ARM64_INS_SQADD,
"sqcadd", // ARM64_INS_SQCADD,
"sqdecb", // ARM64_INS_SQDECB,
"sqdecd", // ARM64_INS_SQDECD,
"sqdech", // ARM64_INS_SQDECH,
@ -662,58 +894,94 @@
"sqdecw", // ARM64_INS_SQDECW,
"sqdmlal", // ARM64_INS_SQDMLAL,
"sqdmlal2", // ARM64_INS_SQDMLAL2,
"sqdmlalb", // ARM64_INS_SQDMLALB,
"sqdmlalbt", // ARM64_INS_SQDMLALBT,
"sqdmlalt", // ARM64_INS_SQDMLALT,
"sqdmlsl", // ARM64_INS_SQDMLSL,
"sqdmlsl2", // ARM64_INS_SQDMLSL2,
"sqdmlslb", // ARM64_INS_SQDMLSLB,
"sqdmlslbt", // ARM64_INS_SQDMLSLBT,
"sqdmlslt", // ARM64_INS_SQDMLSLT,
"sqdmulh", // ARM64_INS_SQDMULH,
"sqdmull", // ARM64_INS_SQDMULL,
"sqdmull2", // ARM64_INS_SQDMULL2,
"sqdmullb", // ARM64_INS_SQDMULLB,
"sqdmullt", // ARM64_INS_SQDMULLT,
"sqincb", // ARM64_INS_SQINCB,
"sqincd", // ARM64_INS_SQINCD,
"sqinch", // ARM64_INS_SQINCH,
"sqincp", // ARM64_INS_SQINCP,
"sqincw", // ARM64_INS_SQINCW,
"sqneg", // ARM64_INS_SQNEG,
"sqrdcmlah", // ARM64_INS_SQRDCMLAH,
"sqrdmlah", // ARM64_INS_SQRDMLAH,
"sqrdmlsh", // ARM64_INS_SQRDMLSH,
"sqrdmulh", // ARM64_INS_SQRDMULH,
"sqrshl", // ARM64_INS_SQRSHL,
"sqrshlr", // ARM64_INS_SQRSHLR,
"sqrshrn", // ARM64_INS_SQRSHRN,
"sqrshrn2", // ARM64_INS_SQRSHRN2,
"sqrshrnb", // ARM64_INS_SQRSHRNB,
"sqrshrnt", // ARM64_INS_SQRSHRNT,
"sqrshrun", // ARM64_INS_SQRSHRUN,
"sqrshrun2", // ARM64_INS_SQRSHRUN2,
"sqrshrunb", // ARM64_INS_SQRSHRUNB,
"sqrshrunt", // ARM64_INS_SQRSHRUNT,
"sqshl", // ARM64_INS_SQSHL,
"sqshlr", // ARM64_INS_SQSHLR,
"sqshlu", // ARM64_INS_SQSHLU,
"sqshrn", // ARM64_INS_SQSHRN,
"sqshrn2", // ARM64_INS_SQSHRN2,
"sqshrnb", // ARM64_INS_SQSHRNB,
"sqshrnt", // ARM64_INS_SQSHRNT,
"sqshrun", // ARM64_INS_SQSHRUN,
"sqshrun2", // ARM64_INS_SQSHRUN2,
"sqshrunb", // ARM64_INS_SQSHRUNB,
"sqshrunt", // ARM64_INS_SQSHRUNT,
"sqsub", // ARM64_INS_SQSUB,
"sqsubr", // ARM64_INS_SQSUBR,
"sqxtn", // ARM64_INS_SQXTN,
"sqxtn2", // ARM64_INS_SQXTN2,
"sqxtnb", // ARM64_INS_SQXTNB,
"sqxtnt", // ARM64_INS_SQXTNT,
"sqxtun", // ARM64_INS_SQXTUN,
"sqxtun2", // ARM64_INS_SQXTUN2,
"sqxtunb", // ARM64_INS_SQXTUNB,
"sqxtunt", // ARM64_INS_SQXTUNT,
"srhadd", // ARM64_INS_SRHADD,
"sri", // ARM64_INS_SRI,
"srshl", // ARM64_INS_SRSHL,
"srshlr", // ARM64_INS_SRSHLR,
"srshr", // ARM64_INS_SRSHR,
"srsra", // ARM64_INS_SRSRA,
"ssbb", // ARM64_INS_SSBB,
"sshl", // ARM64_INS_SSHL,
"sshll", // ARM64_INS_SSHLL,
"sshll2", // ARM64_INS_SSHLL2,
"sshllb", // ARM64_INS_SSHLLB,
"sshllt", // ARM64_INS_SSHLLT,
"sshr", // ARM64_INS_SSHR,
"ssra", // ARM64_INS_SSRA,
"ssubl", // ARM64_INS_SSUBL,
"ssubl2", // ARM64_INS_SSUBL2,
"ssublb", // ARM64_INS_SSUBLB,
"ssublbt", // ARM64_INS_SSUBLBT,
"ssublt", // ARM64_INS_SSUBLT,
"ssubltb", // ARM64_INS_SSUBLTB,
"ssubw", // ARM64_INS_SSUBW,
"ssubw2", // ARM64_INS_SSUBW2,
"ssubwb", // ARM64_INS_SSUBWB,
"ssubwt", // ARM64_INS_SSUBWT,
"st1", // ARM64_INS_ST1,
"st1b", // ARM64_INS_ST1B,
"st1d", // ARM64_INS_ST1D,
"st1h", // ARM64_INS_ST1H,
"st1q", // ARM64_INS_ST1Q,
"st1w", // ARM64_INS_ST1W,
"st2", // ARM64_INS_ST2,
"st2b", // ARM64_INS_ST2B,
"st2d", // ARM64_INS_ST2D,
"st2g", // ARM64_INS_ST2G,
"st2h", // ARM64_INS_ST2H,
"st2w", // ARM64_INS_ST2W,
"st3", // ARM64_INS_ST3,
@ -726,6 +994,9 @@
"st4d", // ARM64_INS_ST4D,
"st4h", // ARM64_INS_ST4H,
"st4w", // ARM64_INS_ST4W,
"st64b", // ARM64_INS_ST64B,
"st64bv", // ARM64_INS_ST64BV,
"st64bv0", // ARM64_INS_ST64BV0,
"stadd", // ARM64_INS_STADD,
"staddb", // ARM64_INS_STADDB,
"staddh", // ARM64_INS_STADDH,
@ -744,6 +1015,9 @@
"steorl", // ARM64_INS_STEORL,
"steorlb", // ARM64_INS_STEORLB,
"steorlh", // ARM64_INS_STEORLH,
"stg", // ARM64_INS_STG,
"stgm", // ARM64_INS_STGM,
"stgp", // ARM64_INS_STGP,
"stllr", // ARM64_INS_STLLR,
"stllrb", // ARM64_INS_STLLRB,
"stllrh", // ARM64_INS_STLLRH,
@ -806,11 +1080,22 @@
"stxr", // ARM64_INS_STXR,
"stxrb", // ARM64_INS_STXRB,
"stxrh", // ARM64_INS_STXRH,
"stz2g", // ARM64_INS_STZ2G,
"stzg", // ARM64_INS_STZG,
"stzgm", // ARM64_INS_STZGM,
"sub", // ARM64_INS_SUB,
"subg", // ARM64_INS_SUBG,
"subhn", // ARM64_INS_SUBHN,
"subhn2", // ARM64_INS_SUBHN2,
"subhnb", // ARM64_INS_SUBHNB,
"subhnt", // ARM64_INS_SUBHNT,
"subp", // ARM64_INS_SUBP,
"subps", // ARM64_INS_SUBPS,
"subr", // ARM64_INS_SUBR,
"subs", // ARM64_INS_SUBS,
"sudot", // ARM64_INS_SUDOT,
"sumopa", // ARM64_INS_SUMOPA,
"sumops", // ARM64_INS_SUMOPS,
"sunpkhi", // ARM64_INS_SUNPKHI,
"sunpklo", // ARM64_INS_SUNPKLO,
"suqadd", // ARM64_INS_SUQADD,
@ -838,31 +1123,46 @@
"tbnz", // ARM64_INS_TBNZ,
"tbx", // ARM64_INS_TBX,
"tbz", // ARM64_INS_TBZ,
"tcancel", // ARM64_INS_TCANCEL,
"tcommit", // ARM64_INS_TCOMMIT,
"trn1", // ARM64_INS_TRN1,
"trn2", // ARM64_INS_TRN2,
"tsb", // ARM64_INS_TSB,
"tst", // ARM64_INS_TST,
"tstart", // ARM64_INS_TSTART,
"ttest", // ARM64_INS_TTEST,
"uaba", // ARM64_INS_UABA,
"uabal", // ARM64_INS_UABAL,
"uabal2", // ARM64_INS_UABAL2,
"uabalb", // ARM64_INS_UABALB,
"uabalt", // ARM64_INS_UABALT,
"uabd", // ARM64_INS_UABD,
"uabdl", // ARM64_INS_UABDL,
"uabdl2", // ARM64_INS_UABDL2,
"uabdlb", // ARM64_INS_UABDLB,
"uabdlt", // ARM64_INS_UABDLT,
"uadalp", // ARM64_INS_UADALP,
"uaddl", // ARM64_INS_UADDL,
"uaddl2", // ARM64_INS_UADDL2,
"uaddlb", // ARM64_INS_UADDLB,
"uaddlp", // ARM64_INS_UADDLP,
"uaddlt", // ARM64_INS_UADDLT,
"uaddlv", // ARM64_INS_UADDLV,
"uaddv", // ARM64_INS_UADDV,
"uaddw", // ARM64_INS_UADDW,
"uaddw2", // ARM64_INS_UADDW2,
"uaddwb", // ARM64_INS_UADDWB,
"uaddwt", // ARM64_INS_UADDWT,
"ubfm", // ARM64_INS_UBFM,
"uclamp", // ARM64_INS_UCLAMP,
"ucvtf", // ARM64_INS_UCVTF,
"udf", // ARM64_INS_UDF,
"udiv", // ARM64_INS_UDIV,
"udivr", // ARM64_INS_UDIVR,
"udot", // ARM64_INS_UDOT,
"uhadd", // ARM64_INS_UHADD,
"uhsub", // ARM64_INS_UHSUB,
"uhsubr", // ARM64_INS_UHSUBR,
"umaddl", // ARM64_INS_UMADDL,
"umax", // ARM64_INS_UMAX,
"umaxp", // ARM64_INS_UMAXP,
@ -872,14 +1172,23 @@
"uminv", // ARM64_INS_UMINV,
"umlal", // ARM64_INS_UMLAL,
"umlal2", // ARM64_INS_UMLAL2,
"umlalb", // ARM64_INS_UMLALB,
"umlalt", // ARM64_INS_UMLALT,
"umlsl", // ARM64_INS_UMLSL,
"umlsl2", // ARM64_INS_UMLSL2,
"umlslb", // ARM64_INS_UMLSLB,
"umlslt", // ARM64_INS_UMLSLT,
"ummla", // ARM64_INS_UMMLA,
"umnegl", // ARM64_INS_UMNEGL,
"umopa", // ARM64_INS_UMOPA,
"umops", // ARM64_INS_UMOPS,
"umov", // ARM64_INS_UMOV,
"umsubl", // ARM64_INS_UMSUBL,
"umulh", // ARM64_INS_UMULH,
"umull", // ARM64_INS_UMULL,
"umull2", // ARM64_INS_UMULL2,
"umullb", // ARM64_INS_UMULLB,
"umullt", // ARM64_INS_UMULLT,
"uqadd", // ARM64_INS_UQADD,
"uqdecb", // ARM64_INS_UQDECB,
"uqdecd", // ARM64_INS_UQDECD,
@ -892,30 +1201,50 @@
"uqincp", // ARM64_INS_UQINCP,
"uqincw", // ARM64_INS_UQINCW,
"uqrshl", // ARM64_INS_UQRSHL,
"uqrshlr", // ARM64_INS_UQRSHLR,
"uqrshrn", // ARM64_INS_UQRSHRN,
"uqrshrn2", // ARM64_INS_UQRSHRN2,
"uqrshrnb", // ARM64_INS_UQRSHRNB,
"uqrshrnt", // ARM64_INS_UQRSHRNT,
"uqshl", // ARM64_INS_UQSHL,
"uqshlr", // ARM64_INS_UQSHLR,
"uqshrn", // ARM64_INS_UQSHRN,
"uqshrn2", // ARM64_INS_UQSHRN2,
"uqshrnb", // ARM64_INS_UQSHRNB,
"uqshrnt", // ARM64_INS_UQSHRNT,
"uqsub", // ARM64_INS_UQSUB,
"uqsubr", // ARM64_INS_UQSUBR,
"uqxtn", // ARM64_INS_UQXTN,
"uqxtn2", // ARM64_INS_UQXTN2,
"uqxtnb", // ARM64_INS_UQXTNB,
"uqxtnt", // ARM64_INS_UQXTNT,
"urecpe", // ARM64_INS_URECPE,
"urhadd", // ARM64_INS_URHADD,
"urshl", // ARM64_INS_URSHL,
"urshlr", // ARM64_INS_URSHLR,
"urshr", // ARM64_INS_URSHR,
"ursqrte", // ARM64_INS_URSQRTE,
"ursra", // ARM64_INS_URSRA,
"usdot", // ARM64_INS_USDOT,
"ushl", // ARM64_INS_USHL,
"ushll", // ARM64_INS_USHLL,
"ushll2", // ARM64_INS_USHLL2,
"ushllb", // ARM64_INS_USHLLB,
"ushllt", // ARM64_INS_USHLLT,
"ushr", // ARM64_INS_USHR,
"usmmla", // ARM64_INS_USMMLA,
"usmopa", // ARM64_INS_USMOPA,
"usmops", // ARM64_INS_USMOPS,
"usqadd", // ARM64_INS_USQADD,
"usra", // ARM64_INS_USRA,
"usubl", // ARM64_INS_USUBL,
"usubl2", // ARM64_INS_USUBL2,
"usublb", // ARM64_INS_USUBLB,
"usublt", // ARM64_INS_USUBLT,
"usubw", // ARM64_INS_USUBW,
"usubw2", // ARM64_INS_USUBW2,
"usubwb", // ARM64_INS_USUBWB,
"usubwt", // ARM64_INS_USUBWT,
"uunpkhi", // ARM64_INS_UUNPKHI,
"uunpklo", // ARM64_INS_UUNPKLO,
"uxtb", // ARM64_INS_UXTB,
@ -926,12 +1255,21 @@
"uzp1", // ARM64_INS_UZP1,
"uzp2", // ARM64_INS_UZP2,
"wfe", // ARM64_INS_WFE,
"wfet", // ARM64_INS_WFET,
"wfi", // ARM64_INS_WFI,
"wfit", // ARM64_INS_WFIT,
"whilege", // ARM64_INS_WHILEGE,
"whilegt", // ARM64_INS_WHILEGT,
"whilehi", // ARM64_INS_WHILEHI,
"whilehs", // ARM64_INS_WHILEHS,
"whilele", // ARM64_INS_WHILELE,
"whilelo", // ARM64_INS_WHILELO,
"whilels", // ARM64_INS_WHILELS,
"whilelt", // ARM64_INS_WHILELT,
"whilerw", // ARM64_INS_WHILERW,
"whilewr", // ARM64_INS_WHILEWR,
"wrffr", // ARM64_INS_WRFFR,
"xaflag", // ARM64_INS_XAFLAG,
"xar", // ARM64_INS_XAR,
"xpacd", // ARM64_INS_XPACD,
"xpaci", // ARM64_INS_XPACI,
@ -939,5 +1277,6 @@
"xtn", // ARM64_INS_XTN,
"xtn2", // ARM64_INS_XTN2,
"yield", // ARM64_INS_YIELD,
"zero", // ARM64_INS_ZERO,
"zip1", // ARM64_INS_ZIP1,
"zip2", // ARM64_INS_ZIP2,

5416
arch/AArch64/AArch64MappingInsnOp.inc
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