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Add .clang-format
and format
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.clang-format
120
.clang-format
@ -1,6 +1,120 @@
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# SPDX-License-Identifier: GPL-2.0
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#
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# clang-format configuration file. Intended for clang-format >= 11.
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#
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# For more information, see:
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#
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# Documentation/process/clang-format.rst
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# https://clang.llvm.org/docs/ClangFormat.html
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# https://clang.llvm.org/docs/ClangFormatStyleOptions.html
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#
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---
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AccessModifierOffset: -4
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AlignAfterOpenBracket: Align
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AlignConsecutiveAssignments: false
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AlignConsecutiveDeclarations: false
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AlignEscapedNewlines: DontAlign
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AlignOperands: true
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AlignTrailingComments:
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Kind: Always
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OverEmptyLines: 2
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AllowAllParametersOfDeclarationOnNextLine: false
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AllowShortBlocksOnASingleLine: false
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AllowShortCaseLabelsOnASingleLine: false
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AllowShortFunctionsOnASingleLine: None
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AllowShortIfStatementsOnASingleLine: false
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AllowShortLoopsOnASingleLine: false
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AlwaysBreakAfterDefinitionReturnType: None
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AlwaysBreakAfterReturnType: None
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AlwaysBreakBeforeMultilineStrings: false
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AlwaysBreakTemplateDeclarations: false
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BinPackArguments: true
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BinPackParameters: true
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BraceWrapping:
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AfterClass: true
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AfterClass: false
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AfterControlStatement: false
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AfterFunction: true
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AfterEnum: false
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AfterFunction: true
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AfterNamespace: true
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AfterObjCDeclaration: false
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AfterStruct: false
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AfterUnion: false
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AfterExternBlock: false
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BeforeCatch: false
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BeforeElse: false
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IndentBraces: false
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SplitEmptyFunction: true
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SplitEmptyRecord: true
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SplitEmptyNamespace: true
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BreakBeforeBinaryOperators: None
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BreakBeforeBraces: Custom
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UseTab: Always
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BreakBeforeInheritanceComma: false
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BreakBeforeTernaryOperators: false
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BreakConstructorInitializersBeforeComma: false
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BreakConstructorInitializers: BeforeComma
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BreakAfterJavaFieldAnnotations: false
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BreakStringLiterals: false
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ColumnLimit: 80
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CommentPragmas: '^ IWYU pragma:'
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CompactNamespaces: false
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ConstructorInitializerAllOnOneLineOrOnePerLine: false
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ConstructorInitializerIndentWidth: 8
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ContinuationIndentWidth: 8
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Cpp11BracedListStyle: false
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DerivePointerAlignment: false
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DisableFormat: false
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ExperimentalAutoDetectBinPacking: false
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FixNamespaceComments: false
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IncludeBlocks: Preserve
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IncludeCategories:
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- Regex: '.*'
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Priority: 1
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IncludeIsMainRegex: '(Test)?$'
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IndentCaseLabels: false
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IndentGotoLabels: false
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IndentPPDirectives: None
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IndentWidth: 8
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IndentWrappedFunctionNames: false
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JavaScriptQuotes: Leave
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JavaScriptWrapImports: true
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KeepEmptyLinesAtTheStartOfBlocks: false
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MacroBlockBegin: ''
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MacroBlockEnd: ''
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MaxEmptyLinesToKeep: 1
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NamespaceIndentation: None
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ObjCBinPackProtocolList: Auto
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ObjCBlockIndentWidth: 8
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ObjCSpaceAfterProperty: true
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ObjCSpaceBeforeProtocolList: true
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# Taken from git's rules
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PenaltyBreakAssignment: 10
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PenaltyBreakBeforeFirstCallParameter: 30
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PenaltyBreakComment: 10
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PenaltyBreakFirstLessLess: 0
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PenaltyBreakString: 10
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PenaltyExcessCharacter: 100
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PenaltyReturnTypeOnItsOwnLine: 60
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PointerAlignment: Right
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ReflowComments: false
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SortIncludes: false
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SortUsingDeclarations: false
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SpaceAfterCStyleCast: false
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SpaceAfterTemplateKeyword: true
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SpaceBeforeAssignmentOperators: true
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SpaceBeforeCtorInitializerColon: true
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SpaceBeforeInheritanceColon: true
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SpaceBeforeParens: ControlStatementsExceptForEachMacros
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SpaceBeforeRangeBasedForLoopColon: true
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SpaceInEmptyParentheses: false
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SpacesBeforeTrailingComments: 1
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SpacesInAngles: false
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SpacesInContainerLiterals: false
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SpacesInCStyleCastParentheses: false
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SpacesInParentheses: false
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SpacesInSquareBrackets: false
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Standard: Cpp03
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TabWidth: 8
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UseTab: Always
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21
MCInst.c
21
MCInst.c
@ -207,7 +207,8 @@ void MCOperand_CreateImm0(MCInst *mcInst, int64_t Val)
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}
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/// Check if any operand of the MCInstrDesc is predicable
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bool MCInst_isPredicable(const MCInstrDesc *MIDesc) {
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bool MCInst_isPredicable(const MCInstrDesc *MIDesc)
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{
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const MCOperandInfo *OpInfo = MIDesc->OpInfo;
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unsigned NumOps = MIDesc->NumOperands;
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for (unsigned i = 0; i < NumOps; ++i) {
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@ -221,7 +222,8 @@ bool MCInst_isPredicable(const MCInstrDesc *MIDesc) {
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/// Checks if tied operands exist in the instruction and sets
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/// - The writeback flag in detail
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/// - Saves the indices of the tied destination operands.
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void MCInst_handleWriteback(MCInst *MI, const MCInstrDesc *InstDesc) {
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void MCInst_handleWriteback(MCInst *MI, const MCInstrDesc *InstDesc)
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{
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const MCOperandInfo *OpInfo = InstDesc[MCInst_getOpcode(MI)].OpInfo;
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unsigned short NumOps = InstDesc[MCInst_getOpcode(MI)].NumOperands;
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@ -229,13 +231,15 @@ void MCInst_handleWriteback(MCInst *MI, const MCInstrDesc *InstDesc) {
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for (i = 0; i < NumOps; ++i) {
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if (MCOperandInfo_isTiedToOp(&OpInfo[i])) {
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int idx = MCOperandInfo_getOperandConstraint(
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&InstDesc[MCInst_getOpcode(MI)], i, MCOI_TIED_TO);
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&InstDesc[MCInst_getOpcode(MI)], i,
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MCOI_TIED_TO);
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if (idx == -1)
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continue;
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if(i >= MAX_MC_OPS) {
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assert(0 && "Maximum number of MC operands reached.");
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if (i >= MAX_MC_OPS) {
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assert(0 &&
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"Maximum number of MC operands reached.");
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}
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MI->tied_op_idx[i] = idx;
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@ -247,7 +251,8 @@ void MCInst_handleWriteback(MCInst *MI, const MCInstrDesc *InstDesc) {
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/// Check if operand with OpNum is tied by another operand
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/// (operand is tying destination).
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bool MCInst_opIsTied(const MCInst *MI, unsigned OpNum) {
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bool MCInst_opIsTied(const MCInst *MI, unsigned OpNum)
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{
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assert(OpNum < MAX_MC_OPS && "Maximum number of MC operands exceeded.");
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for (int i = 0; i < MAX_MC_OPS; ++i) {
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if (MI->tied_op_idx[i] == OpNum)
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@ -258,8 +263,8 @@ bool MCInst_opIsTied(const MCInst *MI, unsigned OpNum) {
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/// Check if operand with OpNum is tying another operand
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/// (operand is tying src).
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bool MCInst_opIsTying(const MCInst *MI, unsigned OpNum) {
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bool MCInst_opIsTying(const MCInst *MI, unsigned OpNum)
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{
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assert(OpNum < MAX_MC_OPS && "Maximum number of MC operands exceeded.");
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return MI->tied_op_idx[OpNum] != -1;
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}
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19
MCInst.h
19
MCInst.h
@ -31,13 +31,13 @@ typedef struct MCOperand MCOperand;
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/// This is a simple discriminated union.
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struct MCOperand {
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enum {
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kInvalid = 0, ///< Uninitialized.
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kRegister, ///< Register operand.
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kImmediate, ///< Immediate operand.
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kFPImmediate, ///< Floating-point immediate operand.
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kDFPImmediate, ///< Double-Floating-point immediate operand.
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kExpr, ///< Relocatable immediate operand.
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kInst ///< Sub-instruction operand.
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kInvalid = 0, ///< Uninitialized.
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kRegister, ///< Register operand.
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kImmediate, ///< Immediate operand.
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kFPImmediate, ///< Floating-point immediate operand.
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kDFPImmediate, ///< Double-Floating-point immediate operand.
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kExpr, ///< Relocatable immediate operand.
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kInst ///< Sub-instruction operand.
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} MachineOperandType;
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unsigned char Kind;
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@ -119,8 +119,9 @@ struct MCInst {
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// This is copied from cs_x86 struct
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uint8_t x86_prefix[4];
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uint8_t imm_size; // immediate size for X86_OP_IMM operand
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bool writeback; // writeback for ARM
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int8_t tied_op_idx[MAX_MC_OPS]; ///< Tied operand indices. Index = Src op; Value: Dest op
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bool writeback; // writeback for ARM
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int8_t tied_op_idx
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[MAX_MC_OPS]; ///< Tied operand indices. Index = Src op; Value: Dest op
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// operand access index for list of registers sharing the same access right (for ARM)
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uint8_t ac_idx;
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uint8_t popcode_adjust; // Pseudo X86 instruction adjust
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@ -18,7 +18,8 @@ bool MCOperandInfo_isOptionalDef(const MCOperandInfo *m)
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}
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/// Checks if operand is tied to another one.
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bool MCOperandInfo_isTiedToOp(const MCOperandInfo *m) {
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bool MCOperandInfo_isTiedToOp(const MCOperandInfo *m)
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{
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if (m->Constraints & (1 << MCOI_TIED_TO))
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return true;
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return false;
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@ -26,11 +27,13 @@ bool MCOperandInfo_isTiedToOp(const MCOperandInfo *m) {
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/// Returns the value of the specified operand constraint if
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/// it is present. Returns -1 if it is not present.
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int MCOperandInfo_getOperandConstraint(const MCInstrDesc *InstrDesc, unsigned OpNum,
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MCOI_OperandConstraint Constraint) {
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int MCOperandInfo_getOperandConstraint(const MCInstrDesc *InstrDesc,
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unsigned OpNum,
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MCOI_OperandConstraint Constraint)
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{
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const MCOperandInfo OpInfo = InstrDesc->OpInfo[OpNum];
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if (OpNum < InstrDesc->NumOperands &&
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(OpInfo.Constraints & (1 << Constraint))) {
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(OpInfo.Constraints & (1 << Constraint))) {
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unsigned ValuePos = 4 + Constraint * 4;
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return (OpInfo.Constraints >> ValuePos) & 0xf;
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}
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@ -160,7 +160,8 @@ bool MCOperandInfo_isOptionalDef(const MCOperandInfo *m);
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bool MCOperandInfo_isTiedToOp(const MCOperandInfo *m);
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int MCOperandInfo_getOperandConstraint(const MCInstrDesc *OpInfo, unsigned OpNum,
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MCOI_OperandConstraint Constraint);
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int MCOperandInfo_getOperandConstraint(const MCInstrDesc *OpInfo,
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unsigned OpNum,
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MCOI_OperandConstraint Constraint);
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#endif
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42
Mapping.c
42
Mapping.c
@ -23,7 +23,7 @@ static unsigned short *make_id2insn(const insn_map *insns, unsigned int size)
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// look for @id in @insns, given its size in @max. first time call will update
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// @cache. return 0 if not found
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unsigned short insn_find(const insn_map *insns, unsigned int max,
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unsigned int id, unsigned short **cache)
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unsigned int id, unsigned short **cache)
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{
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if (id > insns[max - 1].id)
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return 0;
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@ -99,9 +99,9 @@ void map_implicit_reads(MCInst *MI, const insn_map *imap)
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uint16_t reg = imap[Opcode].regs_use[i];
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while (reg != 0) {
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if (i >= MAX_IMPL_R_REGS ||
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detail->regs_read_count >= MAX_IMPL_R_REGS) {
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detail->regs_read_count >= MAX_IMPL_R_REGS) {
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printf("ERROR: Too many implicit read register defined in "
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"instruction mapping.\n");
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"instruction mapping.\n");
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return;
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}
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detail->regs_read[detail->regs_read_count++] = reg;
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@ -124,9 +124,9 @@ void map_implicit_writes(MCInst *MI, const insn_map *imap)
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uint16_t reg = imap[Opcode].regs_mod[i];
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while (reg != 0) {
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if (i >= MAX_IMPL_W_REGS ||
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detail->regs_write_count >= MAX_IMPL_W_REGS) {
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detail->regs_write_count >= MAX_IMPL_W_REGS) {
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printf("ERROR: Too many implicit write register defined in "
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"instruction mapping.\n");
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"instruction mapping.\n");
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return;
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}
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detail->regs_write[detail->regs_write_count++] = reg;
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@ -161,7 +161,7 @@ void map_groups(MCInst *MI, const insn_map *imap)
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// Search for the CS instruction id for the given @MC_Opcode in @imap.
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// return -1 if none is found.
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unsigned int find_cs_id(unsigned MC_Opcode, const insn_map *imap,
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unsigned imap_size)
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unsigned imap_size)
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{
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// binary searching since the IDs are sorted in order
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unsigned int left, right, m;
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@ -200,7 +200,7 @@ void map_cs_id(MCInst *MI, const insn_map *imap, unsigned int imap_size)
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return;
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}
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printf("ERROR: Could not find CS id for MCInst opcode: %d\n",
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MCInst_getOpcode(MI));
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MCInst_getOpcode(MI));
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return;
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}
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@ -208,13 +208,13 @@ void map_cs_id(MCInst *MI, const insn_map *imap, unsigned int imap_size)
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/// mapping table for instruction operands.
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/// Only usable by `auto-sync` archs!
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const cs_op_type mapping_get_op_type(MCInst *MI, unsigned OpNum,
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const map_insn_ops *insn_ops_map,
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size_t map_size)
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const map_insn_ops *insn_ops_map,
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size_t map_size)
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{
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assert(MI);
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assert(MI->Opcode < map_size);
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assert(OpNum < sizeof(insn_ops_map[MI->Opcode].ops) /
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sizeof(insn_ops_map[MI->Opcode].ops[0]));
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sizeof(insn_ops_map[MI->Opcode].ops[0]));
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return insn_ops_map[MI->Opcode].ops[OpNum].type;
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}
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@ -223,13 +223,13 @@ const cs_op_type mapping_get_op_type(MCInst *MI, unsigned OpNum,
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/// mapping table for instruction operands.
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/// Only usable by `auto-sync` archs!
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const cs_ac_type mapping_get_op_access(MCInst *MI, unsigned OpNum,
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const map_insn_ops *insn_ops_map,
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size_t map_size)
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const map_insn_ops *insn_ops_map,
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size_t map_size)
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{
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assert(MI);
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assert(MI->Opcode < map_size);
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assert(OpNum < sizeof(insn_ops_map[MI->Opcode].ops) /
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sizeof(insn_ops_map[MI->Opcode].ops[0]));
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sizeof(insn_ops_map[MI->Opcode].ops[0]));
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cs_ac_type access = insn_ops_map[MI->Opcode].ops[OpNum].access;
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if (MCInst_opIsTied(MI, OpNum) || MCInst_opIsTying(MI, OpNum))
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@ -239,14 +239,14 @@ const cs_ac_type mapping_get_op_access(MCInst *MI, unsigned OpNum,
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/// Returns the operand at detail->arch.operands[op_count + offset]
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/// Or NULL if detail is not set.
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#define DEFINE_get_detail_op(arch, ARCH) \
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cs_##arch##_op *ARCH##_get_detail_op(MCInst *MI, int offset) \
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{ \
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if (!MI->flat_insn->detail) \
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return NULL; \
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int OpIdx = MI->flat_insn->detail->arch.op_count + offset; \
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assert(OpIdx >= 0 && OpIdx < MAX_MC_OPS); \
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return &MI->flat_insn->detail->arch.operands[OpIdx]; \
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#define DEFINE_get_detail_op(arch, ARCH) \
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cs_##arch##_op *ARCH##_get_detail_op(MCInst *MI, int offset) \
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{ \
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if (!MI->flat_insn->detail) \
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return NULL; \
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int OpIdx = MI->flat_insn->detail->arch.op_count + offset; \
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assert(OpIdx >= 0 && OpIdx < MAX_MC_OPS); \
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return &MI->flat_insn->detail->arch.operands[OpIdx]; \
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}
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DEFINE_get_detail_op(arm, ARM);
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83
Mapping.h
83
Mapping.h
@ -17,27 +17,27 @@
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// map instruction to its characteristics
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typedef struct insn_map {
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unsigned short id; // The LLVM instruction id
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unsigned short mapid; // The Capstone instruction id
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unsigned short id; // The LLVM instruction id
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unsigned short mapid; // The Capstone instruction id
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#ifndef CAPSTONE_DIET
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uint16_t regs_use[MAX_IMPL_R_REGS]; ///< list of implicit registers used by
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///< this instruction
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///< this instruction
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uint16_t regs_mod[MAX_IMPL_W_REGS]; ///< list of implicit registers modified
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///< by this instruction
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unsigned char
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groups[MAX_NUM_GROUPS]; ///< list of group this instruction belong to
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bool branch; // branch instruction?
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bool indirect_branch; // indirect branch instruction?
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///< by this instruction
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unsigned char groups
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[MAX_NUM_GROUPS]; ///< list of group this instruction belong to
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bool branch; // branch instruction?
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bool indirect_branch; // indirect branch instruction?
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#endif
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} insn_map;
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// look for @id in @m, given its size in @max. first time call will update
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// @cache. return 0 if not found
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unsigned short insn_find(const insn_map *m, unsigned int max, unsigned int id,
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unsigned short **cache);
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unsigned short **cache);
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unsigned int find_cs_id(unsigned MC_Opcode, const insn_map *imap,
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unsigned imap_size);
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unsigned imap_size);
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#define MAX_NO_DATA_TYPES 10
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@ -45,41 +45,43 @@ unsigned int find_cs_id(unsigned MC_Opcode, const insn_map *imap,
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typedef struct {
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uint8_t /* cs_op_type */ type; ///< Operand type (e.g.: reg, imm, mem)
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uint8_t /* cs_ac_type */ access; ///< The access type (read, write)
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uint8_t /* cs_data_type */
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dtypes[MAX_NO_DATA_TYPES]; ///< List of op types. Terminated by
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///< CS_DATA_TYPE_LAST
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uint8_t /* cs_data_type */
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dtypes[MAX_NO_DATA_TYPES]; ///< List of op types. Terminated by
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///< CS_DATA_TYPE_LAST
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||||
} mapping_op;
|
||||
|
||||
#define MAX_NO_INSN_MAP_OPS 16
|
||||
|
||||
///< MCOperands of an instruction.
|
||||
typedef struct {
|
||||
mapping_op ops[MAX_NO_INSN_MAP_OPS]; ///< NULL terminated array of insn_op.
|
||||
mapping_op
|
||||
ops[MAX_NO_INSN_MAP_OPS]; ///< NULL terminated array of insn_op.
|
||||
} map_insn_ops;
|
||||
|
||||
/// Only usable by `auto-sync` archs!
|
||||
const cs_op_type mapping_get_op_type(MCInst *MI, unsigned OpNum,
|
||||
const map_insn_ops *insn_ops_map,
|
||||
size_t map_size);
|
||||
const map_insn_ops *insn_ops_map,
|
||||
size_t map_size);
|
||||
|
||||
/// Only usable by `auto-sync` archs!
|
||||
const cs_ac_type mapping_get_op_access(MCInst *MI, unsigned OpNum,
|
||||
const map_insn_ops *insn_ops_map,
|
||||
size_t map_size);
|
||||
const map_insn_ops *insn_ops_map,
|
||||
size_t map_size);
|
||||
|
||||
/// Macro for easier access of operand types from the map.
|
||||
/// Assumes the istruction operands map is called "insn_operands"
|
||||
/// Only usable by `auto-sync` archs!
|
||||
#define map_get_op_type(MI, OpNum) \
|
||||
mapping_get_op_type(MI, OpNum, insn_operands, \
|
||||
sizeof(insn_operands) / sizeof(insn_operands[0]))
|
||||
#define map_get_op_type(MI, OpNum) \
|
||||
mapping_get_op_type(MI, OpNum, insn_operands, \
|
||||
sizeof(insn_operands) / sizeof(insn_operands[0]))
|
||||
|
||||
/// Macro for easier access of operand access flags from the map.
|
||||
/// Assumes the istruction operands map is called "insn_operands"
|
||||
/// Only usable by `auto-sync` archs!
|
||||
#define map_get_op_access(MI, OpNum) \
|
||||
mapping_get_op_access(MI, OpNum, insn_operands, \
|
||||
sizeof(insn_operands) / sizeof(insn_operands[0]))
|
||||
#define map_get_op_access(MI, OpNum) \
|
||||
mapping_get_op_access(MI, OpNum, insn_operands, \
|
||||
sizeof(insn_operands) / \
|
||||
sizeof(insn_operands[0]))
|
||||
|
||||
///< Map for ids to their string
|
||||
typedef struct name_map {
|
||||
@ -105,24 +107,24 @@ void map_groups(MCInst *MI, const insn_map *imap);
|
||||
|
||||
void map_cs_id(MCInst *MI, const insn_map *imap, unsigned int imap_size);
|
||||
|
||||
#define DECL_get_detail_op(arch, ARCH) \
|
||||
#define DECL_get_detail_op(arch, ARCH) \
|
||||
cs_##arch##_op *ARCH##_get_detail_op(MCInst *MI, int offset);
|
||||
|
||||
DECL_get_detail_op(arm, ARM);
|
||||
DECL_get_detail_op(ppc, PPC);
|
||||
|
||||
/// Increments the detail->arch.op_count by one.
|
||||
#define DEFINE_inc_detail_op_count(arch, ARCH) \
|
||||
static inline void ARCH##_inc_op_count(MCInst *MI) \
|
||||
{ \
|
||||
MI->flat_insn->detail->arch.op_count++; \
|
||||
#define DEFINE_inc_detail_op_count(arch, ARCH) \
|
||||
static inline void ARCH##_inc_op_count(MCInst *MI) \
|
||||
{ \
|
||||
MI->flat_insn->detail->arch.op_count++; \
|
||||
}
|
||||
|
||||
/// Decrements the detail->arch.op_count by one.
|
||||
#define DEFINE_dec_detail_op_count(arch, ARCH) \
|
||||
static inline void ARCH##_dec_op_count(MCInst *MI) \
|
||||
{ \
|
||||
MI->flat_insn->detail->arch.op_count--; \
|
||||
#define DEFINE_dec_detail_op_count(arch, ARCH) \
|
||||
static inline void ARCH##_dec_op_count(MCInst *MI) \
|
||||
{ \
|
||||
MI->flat_insn->detail->arch.op_count--; \
|
||||
}
|
||||
|
||||
DEFINE_inc_detail_op_count(arm, ARM);
|
||||
@ -131,7 +133,10 @@ DEFINE_inc_detail_op_count(ppc, PPC);
|
||||
DEFINE_dec_detail_op_count(ppc, PPC);
|
||||
|
||||
/// Returns true if a memory operand is currently edited.
|
||||
static inline bool doing_mem(const MCInst *MI) { return MI->csh->doing_mem; }
|
||||
static inline bool doing_mem(const MCInst *MI)
|
||||
{
|
||||
return MI->csh->doing_mem;
|
||||
}
|
||||
|
||||
/// Sets the doing_mem flag to @status.
|
||||
static inline void set_doing_mem(const MCInst *MI, bool status)
|
||||
@ -140,11 +145,11 @@ static inline void set_doing_mem(const MCInst *MI, bool status)
|
||||
}
|
||||
|
||||
/// Returns detail->arch
|
||||
#define DEFINE_get_arch_detail(arch, ARCH) \
|
||||
static inline cs_##arch *ARCH##_get_detail(const MCInst *MI) \
|
||||
{ \
|
||||
assert(MI && MI->flat_insn && MI->flat_insn->detail); \
|
||||
return &MI->flat_insn->detail->arch; \
|
||||
#define DEFINE_get_arch_detail(arch, ARCH) \
|
||||
static inline cs_##arch *ARCH##_get_detail(const MCInst *MI) \
|
||||
{ \
|
||||
assert(MI && MI->flat_insn && MI->flat_insn->detail); \
|
||||
return &MI->flat_insn->detail->arch; \
|
||||
}
|
||||
|
||||
DEFINE_get_arch_detail(arm, ARM);
|
||||
|
@ -31,150 +31,152 @@ typedef enum {
|
||||
CS_DATA_TYPE_FIRST_INTEGER_VALUETYPE = CS_DATA_TYPE_i1,
|
||||
CS_DATA_TYPE_LAST_INTEGER_VALUETYPE = CS_DATA_TYPE_i128,
|
||||
|
||||
CS_DATA_TYPE_bf16 = 10, // This is a 16 bit brain floating point value
|
||||
CS_DATA_TYPE_f16 = 11, // This is a 16 bit floating point value
|
||||
CS_DATA_TYPE_f32 = 12, // This is a 32 bit floating point value
|
||||
CS_DATA_TYPE_f64 = 13, // This is a 64 bit floating point value
|
||||
CS_DATA_TYPE_f80 = 14, // This is a 80 bit floating point value
|
||||
CS_DATA_TYPE_f128 = 15, // This is a 128 bit floating point value
|
||||
CS_DATA_TYPE_bf16 = 10, // This is a 16 bit brain floating point value
|
||||
CS_DATA_TYPE_f16 = 11, // This is a 16 bit floating point value
|
||||
CS_DATA_TYPE_f32 = 12, // This is a 32 bit floating point value
|
||||
CS_DATA_TYPE_f64 = 13, // This is a 64 bit floating point value
|
||||
CS_DATA_TYPE_f80 = 14, // This is a 80 bit floating point value
|
||||
CS_DATA_TYPE_f128 = 15, // This is a 128 bit floating point value
|
||||
CS_DATA_TYPE_ppcf128 = 16, // This is a PPC 128-bit floating point value
|
||||
|
||||
CS_DATA_TYPE_FIRST_FP_VALUETYPE = CS_DATA_TYPE_bf16,
|
||||
CS_DATA_TYPE_LAST_FP_VALUETYPE = CS_DATA_TYPE_ppcf128,
|
||||
|
||||
CS_DATA_TYPE_v1i1 = 17, // 1 x i1
|
||||
CS_DATA_TYPE_v2i1 = 18, // 2 x i1
|
||||
CS_DATA_TYPE_v4i1 = 19, // 4 x i1
|
||||
CS_DATA_TYPE_v8i1 = 20, // 8 x i1
|
||||
CS_DATA_TYPE_v16i1 = 21, // 16 x i1
|
||||
CS_DATA_TYPE_v32i1 = 22, // 32 x i1
|
||||
CS_DATA_TYPE_v64i1 = 23, // 64 x i1
|
||||
CS_DATA_TYPE_v128i1 = 24, // 128 x i1
|
||||
CS_DATA_TYPE_v256i1 = 25, // 256 x i1
|
||||
CS_DATA_TYPE_v512i1 = 26, // 512 x i1
|
||||
CS_DATA_TYPE_v1024i1 = 27, // 1024 x i1
|
||||
CS_DATA_TYPE_v2048i1 = 28, // 2048 x i1
|
||||
CS_DATA_TYPE_v1i1 = 17, // 1 x i1
|
||||
CS_DATA_TYPE_v2i1 = 18, // 2 x i1
|
||||
CS_DATA_TYPE_v4i1 = 19, // 4 x i1
|
||||
CS_DATA_TYPE_v8i1 = 20, // 8 x i1
|
||||
CS_DATA_TYPE_v16i1 = 21, // 16 x i1
|
||||
CS_DATA_TYPE_v32i1 = 22, // 32 x i1
|
||||
CS_DATA_TYPE_v64i1 = 23, // 64 x i1
|
||||
CS_DATA_TYPE_v128i1 = 24, // 128 x i1
|
||||
CS_DATA_TYPE_v256i1 = 25, // 256 x i1
|
||||
CS_DATA_TYPE_v512i1 = 26, // 512 x i1
|
||||
CS_DATA_TYPE_v1024i1 = 27, // 1024 x i1
|
||||
CS_DATA_TYPE_v2048i1 = 28, // 2048 x i1
|
||||
|
||||
CS_DATA_TYPE_v128i2 = 29, // 128 x i2
|
||||
CS_DATA_TYPE_v256i2 = 30, // 256 x i2
|
||||
CS_DATA_TYPE_v128i2 = 29, // 128 x i2
|
||||
CS_DATA_TYPE_v256i2 = 30, // 256 x i2
|
||||
|
||||
CS_DATA_TYPE_v64i4 = 31, // 64 x i4
|
||||
CS_DATA_TYPE_v128i4 = 32, // 128 x i4
|
||||
CS_DATA_TYPE_v64i4 = 31, // 64 x i4
|
||||
CS_DATA_TYPE_v128i4 = 32, // 128 x i4
|
||||
|
||||
CS_DATA_TYPE_v1i8 = 33, // 1 x i8
|
||||
CS_DATA_TYPE_v2i8 = 34, // 2 x i8
|
||||
CS_DATA_TYPE_v4i8 = 35, // 4 x i8
|
||||
CS_DATA_TYPE_v8i8 = 36, // 8 x i8
|
||||
CS_DATA_TYPE_v16i8 = 37, // 16 x i8
|
||||
CS_DATA_TYPE_v32i8 = 38, // 32 x i8
|
||||
CS_DATA_TYPE_v64i8 = 39, // 64 x i8
|
||||
CS_DATA_TYPE_v128i8 = 40, // 128 x i8
|
||||
CS_DATA_TYPE_v256i8 = 41, // 256 x i8
|
||||
CS_DATA_TYPE_v512i8 = 42, // 512 x i8
|
||||
CS_DATA_TYPE_v1024i8 = 43, // 1024 x i8
|
||||
CS_DATA_TYPE_v1i8 = 33, // 1 x i8
|
||||
CS_DATA_TYPE_v2i8 = 34, // 2 x i8
|
||||
CS_DATA_TYPE_v4i8 = 35, // 4 x i8
|
||||
CS_DATA_TYPE_v8i8 = 36, // 8 x i8
|
||||
CS_DATA_TYPE_v16i8 = 37, // 16 x i8
|
||||
CS_DATA_TYPE_v32i8 = 38, // 32 x i8
|
||||
CS_DATA_TYPE_v64i8 = 39, // 64 x i8
|
||||
CS_DATA_TYPE_v128i8 = 40, // 128 x i8
|
||||
CS_DATA_TYPE_v256i8 = 41, // 256 x i8
|
||||
CS_DATA_TYPE_v512i8 = 42, // 512 x i8
|
||||
CS_DATA_TYPE_v1024i8 = 43, // 1024 x i8
|
||||
|
||||
CS_DATA_TYPE_v1i16 = 44, // 1 x i16
|
||||
CS_DATA_TYPE_v2i16 = 45, // 2 x i16
|
||||
CS_DATA_TYPE_v3i16 = 46, // 3 x i16
|
||||
CS_DATA_TYPE_v4i16 = 47, // 4 x i16
|
||||
CS_DATA_TYPE_v8i16 = 48, // 8 x i16
|
||||
CS_DATA_TYPE_v16i16 = 49, // 16 x i16
|
||||
CS_DATA_TYPE_v32i16 = 50, // 32 x i16
|
||||
CS_DATA_TYPE_v64i16 = 51, // 64 x i16
|
||||
CS_DATA_TYPE_v128i16 = 52, // 128 x i16
|
||||
CS_DATA_TYPE_v256i16 = 53, // 256 x i16
|
||||
CS_DATA_TYPE_v512i16 = 54, // 512 x i16
|
||||
CS_DATA_TYPE_v1i16 = 44, // 1 x i16
|
||||
CS_DATA_TYPE_v2i16 = 45, // 2 x i16
|
||||
CS_DATA_TYPE_v3i16 = 46, // 3 x i16
|
||||
CS_DATA_TYPE_v4i16 = 47, // 4 x i16
|
||||
CS_DATA_TYPE_v8i16 = 48, // 8 x i16
|
||||
CS_DATA_TYPE_v16i16 = 49, // 16 x i16
|
||||
CS_DATA_TYPE_v32i16 = 50, // 32 x i16
|
||||
CS_DATA_TYPE_v64i16 = 51, // 64 x i16
|
||||
CS_DATA_TYPE_v128i16 = 52, // 128 x i16
|
||||
CS_DATA_TYPE_v256i16 = 53, // 256 x i16
|
||||
CS_DATA_TYPE_v512i16 = 54, // 512 x i16
|
||||
|
||||
CS_DATA_TYPE_v1i32 = 55, // 1 x i32
|
||||
CS_DATA_TYPE_v2i32 = 56, // 2 x i32
|
||||
CS_DATA_TYPE_v3i32 = 57, // 3 x i32
|
||||
CS_DATA_TYPE_v4i32 = 58, // 4 x i32
|
||||
CS_DATA_TYPE_v5i32 = 59, // 5 x i32
|
||||
CS_DATA_TYPE_v6i32 = 60, // 6 x i32
|
||||
CS_DATA_TYPE_v7i32 = 61, // 7 x i32
|
||||
CS_DATA_TYPE_v8i32 = 62, // 8 x i32
|
||||
CS_DATA_TYPE_v9i32 = 63, // 9 x i32
|
||||
CS_DATA_TYPE_v10i32 = 64, // 10 x i32
|
||||
CS_DATA_TYPE_v11i32 = 65, // 11 x i32
|
||||
CS_DATA_TYPE_v12i32 = 66, // 12 x i32
|
||||
CS_DATA_TYPE_v16i32 = 67, // 16 x i32
|
||||
CS_DATA_TYPE_v32i32 = 68, // 32 x i32
|
||||
CS_DATA_TYPE_v64i32 = 69, // 64 x i32
|
||||
CS_DATA_TYPE_v128i32 = 70, // 128 x i32
|
||||
CS_DATA_TYPE_v256i32 = 71, // 256 x i32
|
||||
CS_DATA_TYPE_v512i32 = 72, // 512 x i32
|
||||
CS_DATA_TYPE_v1i32 = 55, // 1 x i32
|
||||
CS_DATA_TYPE_v2i32 = 56, // 2 x i32
|
||||
CS_DATA_TYPE_v3i32 = 57, // 3 x i32
|
||||
CS_DATA_TYPE_v4i32 = 58, // 4 x i32
|
||||
CS_DATA_TYPE_v5i32 = 59, // 5 x i32
|
||||
CS_DATA_TYPE_v6i32 = 60, // 6 x i32
|
||||
CS_DATA_TYPE_v7i32 = 61, // 7 x i32
|
||||
CS_DATA_TYPE_v8i32 = 62, // 8 x i32
|
||||
CS_DATA_TYPE_v9i32 = 63, // 9 x i32
|
||||
CS_DATA_TYPE_v10i32 = 64, // 10 x i32
|
||||
CS_DATA_TYPE_v11i32 = 65, // 11 x i32
|
||||
CS_DATA_TYPE_v12i32 = 66, // 12 x i32
|
||||
CS_DATA_TYPE_v16i32 = 67, // 16 x i32
|
||||
CS_DATA_TYPE_v32i32 = 68, // 32 x i32
|
||||
CS_DATA_TYPE_v64i32 = 69, // 64 x i32
|
||||
CS_DATA_TYPE_v128i32 = 70, // 128 x i32
|
||||
CS_DATA_TYPE_v256i32 = 71, // 256 x i32
|
||||
CS_DATA_TYPE_v512i32 = 72, // 512 x i32
|
||||
CS_DATA_TYPE_v1024i32 = 73, // 1024 x i32
|
||||
CS_DATA_TYPE_v2048i32 = 74, // 2048 x i32
|
||||
|
||||
CS_DATA_TYPE_v1i64 = 75, // 1 x i64
|
||||
CS_DATA_TYPE_v2i64 = 76, // 2 x i64
|
||||
CS_DATA_TYPE_v3i64 = 77, // 3 x i64
|
||||
CS_DATA_TYPE_v4i64 = 78, // 4 x i64
|
||||
CS_DATA_TYPE_v8i64 = 79, // 8 x i64
|
||||
CS_DATA_TYPE_v16i64 = 80, // 16 x i64
|
||||
CS_DATA_TYPE_v32i64 = 81, // 32 x i64
|
||||
CS_DATA_TYPE_v64i64 = 82, // 64 x i64
|
||||
CS_DATA_TYPE_v128i64 = 83, // 128 x i64
|
||||
CS_DATA_TYPE_v256i64 = 84, // 256 x i64
|
||||
CS_DATA_TYPE_v1i64 = 75, // 1 x i64
|
||||
CS_DATA_TYPE_v2i64 = 76, // 2 x i64
|
||||
CS_DATA_TYPE_v3i64 = 77, // 3 x i64
|
||||
CS_DATA_TYPE_v4i64 = 78, // 4 x i64
|
||||
CS_DATA_TYPE_v8i64 = 79, // 8 x i64
|
||||
CS_DATA_TYPE_v16i64 = 80, // 16 x i64
|
||||
CS_DATA_TYPE_v32i64 = 81, // 32 x i64
|
||||
CS_DATA_TYPE_v64i64 = 82, // 64 x i64
|
||||
CS_DATA_TYPE_v128i64 = 83, // 128 x i64
|
||||
CS_DATA_TYPE_v256i64 = 84, // 256 x i64
|
||||
|
||||
CS_DATA_TYPE_v1i128 = 85, // 1 x i128
|
||||
CS_DATA_TYPE_v1i128 = 85, // 1 x i128
|
||||
|
||||
CS_DATA_TYPE_FIRST_INTEGER_FIXEDLEN_VECTOR_VALUETYPE = CS_DATA_TYPE_v1i1,
|
||||
CS_DATA_TYPE_LAST_INTEGER_FIXEDLEN_VECTOR_VALUETYPE = CS_DATA_TYPE_v1i128,
|
||||
CS_DATA_TYPE_FIRST_INTEGER_FIXEDLEN_VECTOR_VALUETYPE =
|
||||
CS_DATA_TYPE_v1i1,
|
||||
CS_DATA_TYPE_LAST_INTEGER_FIXEDLEN_VECTOR_VALUETYPE =
|
||||
CS_DATA_TYPE_v1i128,
|
||||
|
||||
CS_DATA_TYPE_v1f16 = 86, // 1 x f16
|
||||
CS_DATA_TYPE_v2f16 = 87, // 2 x f16
|
||||
CS_DATA_TYPE_v3f16 = 88, // 3 x f16
|
||||
CS_DATA_TYPE_v4f16 = 89, // 4 x f16
|
||||
CS_DATA_TYPE_v8f16 = 90, // 8 x f16
|
||||
CS_DATA_TYPE_v16f16 = 91, // 16 x f16
|
||||
CS_DATA_TYPE_v32f16 = 92, // 32 x f16
|
||||
CS_DATA_TYPE_v64f16 = 93, // 64 x f16
|
||||
CS_DATA_TYPE_v128f16 = 94, // 128 x f16
|
||||
CS_DATA_TYPE_v256f16 = 95, // 256 x f16
|
||||
CS_DATA_TYPE_v512f16 = 96, // 512 x f16
|
||||
CS_DATA_TYPE_v1f16 = 86, // 1 x f16
|
||||
CS_DATA_TYPE_v2f16 = 87, // 2 x f16
|
||||
CS_DATA_TYPE_v3f16 = 88, // 3 x f16
|
||||
CS_DATA_TYPE_v4f16 = 89, // 4 x f16
|
||||
CS_DATA_TYPE_v8f16 = 90, // 8 x f16
|
||||
CS_DATA_TYPE_v16f16 = 91, // 16 x f16
|
||||
CS_DATA_TYPE_v32f16 = 92, // 32 x f16
|
||||
CS_DATA_TYPE_v64f16 = 93, // 64 x f16
|
||||
CS_DATA_TYPE_v128f16 = 94, // 128 x f16
|
||||
CS_DATA_TYPE_v256f16 = 95, // 256 x f16
|
||||
CS_DATA_TYPE_v512f16 = 96, // 512 x f16
|
||||
|
||||
CS_DATA_TYPE_v2bf16 = 97, // 2 x bf16
|
||||
CS_DATA_TYPE_v3bf16 = 98, // 3 x bf16
|
||||
CS_DATA_TYPE_v4bf16 = 99, // 4 x bf16
|
||||
CS_DATA_TYPE_v8bf16 = 100, // 8 x bf16
|
||||
CS_DATA_TYPE_v16bf16 = 101, // 16 x bf16
|
||||
CS_DATA_TYPE_v32bf16 = 102, // 32 x bf16
|
||||
CS_DATA_TYPE_v64bf16 = 103, // 64 x bf16
|
||||
CS_DATA_TYPE_v2bf16 = 97, // 2 x bf16
|
||||
CS_DATA_TYPE_v3bf16 = 98, // 3 x bf16
|
||||
CS_DATA_TYPE_v4bf16 = 99, // 4 x bf16
|
||||
CS_DATA_TYPE_v8bf16 = 100, // 8 x bf16
|
||||
CS_DATA_TYPE_v16bf16 = 101, // 16 x bf16
|
||||
CS_DATA_TYPE_v32bf16 = 102, // 32 x bf16
|
||||
CS_DATA_TYPE_v64bf16 = 103, // 64 x bf16
|
||||
CS_DATA_TYPE_v128bf16 = 104, // 128 x bf16
|
||||
|
||||
CS_DATA_TYPE_v1f32 = 105, // 1 x f32
|
||||
CS_DATA_TYPE_v2f32 = 106, // 2 x f32
|
||||
CS_DATA_TYPE_v3f32 = 107, // 3 x f32
|
||||
CS_DATA_TYPE_v4f32 = 108, // 4 x f32
|
||||
CS_DATA_TYPE_v5f32 = 109, // 5 x f32
|
||||
CS_DATA_TYPE_v6f32 = 110, // 6 x f32
|
||||
CS_DATA_TYPE_v7f32 = 111, // 7 x f32
|
||||
CS_DATA_TYPE_v8f32 = 112, // 8 x f32
|
||||
CS_DATA_TYPE_v9f32 = 113, // 9 x f32
|
||||
CS_DATA_TYPE_v10f32 = 114, // 10 x f32
|
||||
CS_DATA_TYPE_v11f32 = 115, // 11 x f32
|
||||
CS_DATA_TYPE_v12f32 = 116, // 12 x f32
|
||||
CS_DATA_TYPE_v16f32 = 117, // 16 x f32
|
||||
CS_DATA_TYPE_v1f32 = 105, // 1 x f32
|
||||
CS_DATA_TYPE_v2f32 = 106, // 2 x f32
|
||||
CS_DATA_TYPE_v3f32 = 107, // 3 x f32
|
||||
CS_DATA_TYPE_v4f32 = 108, // 4 x f32
|
||||
CS_DATA_TYPE_v5f32 = 109, // 5 x f32
|
||||
CS_DATA_TYPE_v6f32 = 110, // 6 x f32
|
||||
CS_DATA_TYPE_v7f32 = 111, // 7 x f32
|
||||
CS_DATA_TYPE_v8f32 = 112, // 8 x f32
|
||||
CS_DATA_TYPE_v9f32 = 113, // 9 x f32
|
||||
CS_DATA_TYPE_v10f32 = 114, // 10 x f32
|
||||
CS_DATA_TYPE_v11f32 = 115, // 11 x f32
|
||||
CS_DATA_TYPE_v12f32 = 116, // 12 x f32
|
||||
CS_DATA_TYPE_v16f32 = 117, // 16 x f32
|
||||
|
||||
CS_DATA_TYPE_v32f32 = 118, // 32 x f32
|
||||
CS_DATA_TYPE_v64f32 = 119, // 64 x f32
|
||||
CS_DATA_TYPE_v128f32 = 120, // 128 x f32
|
||||
CS_DATA_TYPE_v256f32 = 121, // 256 x f32
|
||||
CS_DATA_TYPE_v512f32 = 122, // 512 x f32
|
||||
CS_DATA_TYPE_v32f32 = 118, // 32 x f32
|
||||
CS_DATA_TYPE_v64f32 = 119, // 64 x f32
|
||||
CS_DATA_TYPE_v128f32 = 120, // 128 x f32
|
||||
CS_DATA_TYPE_v256f32 = 121, // 256 x f32
|
||||
CS_DATA_TYPE_v512f32 = 122, // 512 x f32
|
||||
CS_DATA_TYPE_v1024f32 = 123, // 1024 x f32
|
||||
CS_DATA_TYPE_v2048f32 = 124, // 2048 x f32
|
||||
|
||||
CS_DATA_TYPE_v1f64 = 125, // 1 x f64
|
||||
CS_DATA_TYPE_v2f64 = 126, // 2 x f64
|
||||
CS_DATA_TYPE_v3f64 = 127, // 3 x f64
|
||||
CS_DATA_TYPE_v4f64 = 128, // 4 x f64
|
||||
CS_DATA_TYPE_v8f64 = 129, // 8 x f64
|
||||
CS_DATA_TYPE_v16f64 = 130, // 16 x f64
|
||||
CS_DATA_TYPE_v32f64 = 131, // 32 x f64
|
||||
CS_DATA_TYPE_v64f64 = 132, // 64 x f64
|
||||
CS_DATA_TYPE_v128f64 = 133, // 128 x f64
|
||||
CS_DATA_TYPE_v256f64 = 134, // 256 x f64
|
||||
CS_DATA_TYPE_v1f64 = 125, // 1 x f64
|
||||
CS_DATA_TYPE_v2f64 = 126, // 2 x f64
|
||||
CS_DATA_TYPE_v3f64 = 127, // 3 x f64
|
||||
CS_DATA_TYPE_v4f64 = 128, // 4 x f64
|
||||
CS_DATA_TYPE_v8f64 = 129, // 8 x f64
|
||||
CS_DATA_TYPE_v16f64 = 130, // 16 x f64
|
||||
CS_DATA_TYPE_v32f64 = 131, // 32 x f64
|
||||
CS_DATA_TYPE_v64f64 = 132, // 64 x f64
|
||||
CS_DATA_TYPE_v128f64 = 133, // 128 x f64
|
||||
CS_DATA_TYPE_v256f64 = 134, // 256 x f64
|
||||
|
||||
CS_DATA_TYPE_FIRST_FP_FIXEDLEN_VECTOR_VALUETYPE = CS_DATA_TYPE_v1f16,
|
||||
CS_DATA_TYPE_LAST_FP_FIXEDLEN_VECTOR_VALUETYPE = CS_DATA_TYPE_v256f64,
|
||||
@ -182,52 +184,54 @@ typedef enum {
|
||||
CS_DATA_TYPE_FIRST_FIXEDLEN_VECTOR_VALUETYPE = CS_DATA_TYPE_v1i1,
|
||||
CS_DATA_TYPE_LAST_FIXEDLEN_VECTOR_VALUETYPE = CS_DATA_TYPE_v256f64,
|
||||
|
||||
CS_DATA_TYPE_nxv1i1 = 135, // n x 1 x i1
|
||||
CS_DATA_TYPE_nxv2i1 = 136, // n x 2 x i1
|
||||
CS_DATA_TYPE_nxv4i1 = 137, // n x 4 x i1
|
||||
CS_DATA_TYPE_nxv8i1 = 138, // n x 8 x i1
|
||||
CS_DATA_TYPE_nxv16i1 = 139, // n x 16 x i1
|
||||
CS_DATA_TYPE_nxv32i1 = 140, // n x 32 x i1
|
||||
CS_DATA_TYPE_nxv64i1 = 141, // n x 64 x i1
|
||||
CS_DATA_TYPE_nxv1i1 = 135, // n x 1 x i1
|
||||
CS_DATA_TYPE_nxv2i1 = 136, // n x 2 x i1
|
||||
CS_DATA_TYPE_nxv4i1 = 137, // n x 4 x i1
|
||||
CS_DATA_TYPE_nxv8i1 = 138, // n x 8 x i1
|
||||
CS_DATA_TYPE_nxv16i1 = 139, // n x 16 x i1
|
||||
CS_DATA_TYPE_nxv32i1 = 140, // n x 32 x i1
|
||||
CS_DATA_TYPE_nxv64i1 = 141, // n x 64 x i1
|
||||
|
||||
CS_DATA_TYPE_nxv1i8 = 142, // n x 1 x i8
|
||||
CS_DATA_TYPE_nxv2i8 = 143, // n x 2 x i8
|
||||
CS_DATA_TYPE_nxv4i8 = 144, // n x 4 x i8
|
||||
CS_DATA_TYPE_nxv8i8 = 145, // n x 8 x i8
|
||||
CS_DATA_TYPE_nxv16i8 = 146, // n x 16 x i8
|
||||
CS_DATA_TYPE_nxv32i8 = 147, // n x 32 x i8
|
||||
CS_DATA_TYPE_nxv64i8 = 148, // n x 64 x i8
|
||||
CS_DATA_TYPE_nxv1i8 = 142, // n x 1 x i8
|
||||
CS_DATA_TYPE_nxv2i8 = 143, // n x 2 x i8
|
||||
CS_DATA_TYPE_nxv4i8 = 144, // n x 4 x i8
|
||||
CS_DATA_TYPE_nxv8i8 = 145, // n x 8 x i8
|
||||
CS_DATA_TYPE_nxv16i8 = 146, // n x 16 x i8
|
||||
CS_DATA_TYPE_nxv32i8 = 147, // n x 32 x i8
|
||||
CS_DATA_TYPE_nxv64i8 = 148, // n x 64 x i8
|
||||
|
||||
CS_DATA_TYPE_nxv1i16 = 149, // n x 1 x i16
|
||||
CS_DATA_TYPE_nxv2i16 = 150, // n x 2 x i16
|
||||
CS_DATA_TYPE_nxv4i16 = 151, // n x 4 x i16
|
||||
CS_DATA_TYPE_nxv8i16 = 152, // n x 8 x i16
|
||||
CS_DATA_TYPE_nxv1i16 = 149, // n x 1 x i16
|
||||
CS_DATA_TYPE_nxv2i16 = 150, // n x 2 x i16
|
||||
CS_DATA_TYPE_nxv4i16 = 151, // n x 4 x i16
|
||||
CS_DATA_TYPE_nxv8i16 = 152, // n x 8 x i16
|
||||
CS_DATA_TYPE_nxv16i16 = 153, // n x 16 x i16
|
||||
CS_DATA_TYPE_nxv32i16 = 154, // n x 32 x i16
|
||||
|
||||
CS_DATA_TYPE_nxv1i32 = 155, // n x 1 x i32
|
||||
CS_DATA_TYPE_nxv2i32 = 156, // n x 2 x i32
|
||||
CS_DATA_TYPE_nxv4i32 = 157, // n x 4 x i32
|
||||
CS_DATA_TYPE_nxv8i32 = 158, // n x 8 x i32
|
||||
CS_DATA_TYPE_nxv1i32 = 155, // n x 1 x i32
|
||||
CS_DATA_TYPE_nxv2i32 = 156, // n x 2 x i32
|
||||
CS_DATA_TYPE_nxv4i32 = 157, // n x 4 x i32
|
||||
CS_DATA_TYPE_nxv8i32 = 158, // n x 8 x i32
|
||||
CS_DATA_TYPE_nxv16i32 = 159, // n x 16 x i32
|
||||
CS_DATA_TYPE_nxv32i32 = 160, // n x 32 x i32
|
||||
|
||||
CS_DATA_TYPE_nxv1i64 = 161, // n x 1 x i64
|
||||
CS_DATA_TYPE_nxv2i64 = 162, // n x 2 x i64
|
||||
CS_DATA_TYPE_nxv4i64 = 163, // n x 4 x i64
|
||||
CS_DATA_TYPE_nxv8i64 = 164, // n x 8 x i64
|
||||
CS_DATA_TYPE_nxv1i64 = 161, // n x 1 x i64
|
||||
CS_DATA_TYPE_nxv2i64 = 162, // n x 2 x i64
|
||||
CS_DATA_TYPE_nxv4i64 = 163, // n x 4 x i64
|
||||
CS_DATA_TYPE_nxv8i64 = 164, // n x 8 x i64
|
||||
CS_DATA_TYPE_nxv16i64 = 165, // n x 16 x i64
|
||||
CS_DATA_TYPE_nxv32i64 = 166, // n x 32 x i64
|
||||
|
||||
CS_DATA_TYPE_FIRST_INTEGER_SCALABLE_VECTOR_VALUETYPE = CS_DATA_TYPE_nxv1i1,
|
||||
CS_DATA_TYPE_LAST_INTEGER_SCALABLE_VECTOR_VALUETYPE = CS_DATA_TYPE_nxv32i64,
|
||||
CS_DATA_TYPE_FIRST_INTEGER_SCALABLE_VECTOR_VALUETYPE =
|
||||
CS_DATA_TYPE_nxv1i1,
|
||||
CS_DATA_TYPE_LAST_INTEGER_SCALABLE_VECTOR_VALUETYPE =
|
||||
CS_DATA_TYPE_nxv32i64,
|
||||
|
||||
CS_DATA_TYPE_nxv1f16 = 167, // n x 1 x f16
|
||||
CS_DATA_TYPE_nxv2f16 = 168, // n x 2 x f16
|
||||
CS_DATA_TYPE_nxv4f16 = 169, // n x 4 x f16
|
||||
CS_DATA_TYPE_nxv8f16 = 170, // n x 8 x f16
|
||||
CS_DATA_TYPE_nxv16f16 = 171, // n x 16 x f16
|
||||
CS_DATA_TYPE_nxv32f16 = 172, // n x 32 x f16
|
||||
CS_DATA_TYPE_nxv1f16 = 167, // n x 1 x f16
|
||||
CS_DATA_TYPE_nxv2f16 = 168, // n x 2 x f16
|
||||
CS_DATA_TYPE_nxv4f16 = 169, // n x 4 x f16
|
||||
CS_DATA_TYPE_nxv8f16 = 170, // n x 8 x f16
|
||||
CS_DATA_TYPE_nxv16f16 = 171, // n x 16 x f16
|
||||
CS_DATA_TYPE_nxv32f16 = 172, // n x 32 x f16
|
||||
|
||||
CS_DATA_TYPE_nxv1bf16 = 173, // n x 1 x bf16
|
||||
CS_DATA_TYPE_nxv2bf16 = 174, // n x 2 x bf16
|
||||
@ -236,16 +240,16 @@ typedef enum {
|
||||
CS_DATA_TYPE_nxv16bf16 = 177, // n x 16 x bf16
|
||||
CS_DATA_TYPE_nxv32bf16 = 178, // n x 32 x bf16
|
||||
|
||||
CS_DATA_TYPE_nxv1f32 = 179, // n x 1 x f32
|
||||
CS_DATA_TYPE_nxv2f32 = 180, // n x 2 x f32
|
||||
CS_DATA_TYPE_nxv4f32 = 181, // n x 4 x f32
|
||||
CS_DATA_TYPE_nxv8f32 = 182, // n x 8 x f32
|
||||
CS_DATA_TYPE_nxv16f32 = 183, // n x 16 x f32
|
||||
CS_DATA_TYPE_nxv1f32 = 179, // n x 1 x f32
|
||||
CS_DATA_TYPE_nxv2f32 = 180, // n x 2 x f32
|
||||
CS_DATA_TYPE_nxv4f32 = 181, // n x 4 x f32
|
||||
CS_DATA_TYPE_nxv8f32 = 182, // n x 8 x f32
|
||||
CS_DATA_TYPE_nxv16f32 = 183, // n x 16 x f32
|
||||
|
||||
CS_DATA_TYPE_nxv1f64 = 184, // n x 1 x f64
|
||||
CS_DATA_TYPE_nxv2f64 = 185, // n x 2 x f64
|
||||
CS_DATA_TYPE_nxv4f64 = 186, // n x 4 x f64
|
||||
CS_DATA_TYPE_nxv8f64 = 187, // n x 8 x f64
|
||||
CS_DATA_TYPE_nxv1f64 = 184, // n x 1 x f64
|
||||
CS_DATA_TYPE_nxv2f64 = 185, // n x 2 x f64
|
||||
CS_DATA_TYPE_nxv4f64 = 186, // n x 4 x f64
|
||||
CS_DATA_TYPE_nxv8f64 = 187, // n x 8 x f64
|
||||
|
||||
CS_DATA_TYPE_FIRST_FP_SCALABLE_VECTOR_VALUETYPE = CS_DATA_TYPE_nxv1f16,
|
||||
CS_DATA_TYPE_LAST_FP_SCALABLE_VECTOR_VALUETYPE = CS_DATA_TYPE_nxv8f64,
|
||||
@ -258,21 +262,22 @@ typedef enum {
|
||||
|
||||
CS_DATA_TYPE_x86mmx = 188, // This is an X86 MMX value
|
||||
|
||||
CS_DATA_TYPE_Glue = 189, // This glues nodes together during pre-RA sched
|
||||
CS_DATA_TYPE_Glue =
|
||||
189, // This glues nodes together during pre-RA sched
|
||||
|
||||
CS_DATA_TYPE_isVoid = 190, // This has no value
|
||||
CS_DATA_TYPE_isVoid = 190, // This has no value
|
||||
|
||||
CS_DATA_TYPE_Untyped = 191, // This value takes a register, but has
|
||||
// unspecified type. The register class
|
||||
// will be determined by the opcode.
|
||||
CS_DATA_TYPE_Untyped = 191, // This value takes a register, but has
|
||||
// unspecified type. The register class
|
||||
// will be determined by the opcode.
|
||||
|
||||
CS_DATA_TYPE_funcref = 192, // WebAssembly's funcref type
|
||||
CS_DATA_TYPE_funcref = 192, // WebAssembly's funcref type
|
||||
CS_DATA_TYPE_externref = 193, // WebAssembly's externref type
|
||||
CS_DATA_TYPE_x86amx = 194, // This is an X86 AMX value
|
||||
CS_DATA_TYPE_i64x8 = 195, // 8 Consecutive GPRs (AArch64)
|
||||
CS_DATA_TYPE_x86amx = 194, // This is an X86 AMX value
|
||||
CS_DATA_TYPE_i64x8 = 195, // 8 Consecutive GPRs (AArch64)
|
||||
|
||||
CS_DATA_TYPE_FIRST_VALUETYPE =
|
||||
1, // This is always the beginning of the list.
|
||||
1, // This is always the beginning of the list.
|
||||
CS_DATA_TYPE_LAST_VALUETYPE =
|
||||
CS_DATA_TYPE_i64x8, // This always remains at the end of the list.
|
||||
CS_DATA_TYPE_VALUETYPE_SIZE = CS_DATA_TYPE_LAST_VALUETYPE + 1,
|
||||
@ -320,43 +325,47 @@ typedef enum {
|
||||
inline bool isValid(cs_data_type SimpleTy)
|
||||
{
|
||||
return (SimpleTy >= CS_DATA_TYPE_FIRST_VALUETYPE &&
|
||||
SimpleTy <= CS_DATA_TYPE_LAST_VALUETYPE);
|
||||
SimpleTy <= CS_DATA_TYPE_LAST_VALUETYPE);
|
||||
}
|
||||
|
||||
/// Return true if this is a FP or a vector FP type.
|
||||
inline bool isFloatingPoint(cs_data_type SimpleTy)
|
||||
{
|
||||
return ((SimpleTy >= CS_DATA_TYPE_FIRST_FP_VALUETYPE &&
|
||||
SimpleTy <= CS_DATA_TYPE_LAST_FP_VALUETYPE) ||
|
||||
(SimpleTy >= CS_DATA_TYPE_FIRST_FP_FIXEDLEN_VECTOR_VALUETYPE &&
|
||||
SimpleTy <= CS_DATA_TYPE_LAST_FP_FIXEDLEN_VECTOR_VALUETYPE) ||
|
||||
(SimpleTy >= CS_DATA_TYPE_FIRST_FP_SCALABLE_VECTOR_VALUETYPE &&
|
||||
SimpleTy <= CS_DATA_TYPE_LAST_FP_SCALABLE_VECTOR_VALUETYPE));
|
||||
SimpleTy <= CS_DATA_TYPE_LAST_FP_VALUETYPE) ||
|
||||
(SimpleTy >= CS_DATA_TYPE_FIRST_FP_FIXEDLEN_VECTOR_VALUETYPE &&
|
||||
SimpleTy <= CS_DATA_TYPE_LAST_FP_FIXEDLEN_VECTOR_VALUETYPE) ||
|
||||
(SimpleTy >= CS_DATA_TYPE_FIRST_FP_SCALABLE_VECTOR_VALUETYPE &&
|
||||
SimpleTy <= CS_DATA_TYPE_LAST_FP_SCALABLE_VECTOR_VALUETYPE));
|
||||
}
|
||||
|
||||
/// Return true if this is an integer or a vector integer type.
|
||||
inline bool isInteger(cs_data_type SimpleTy)
|
||||
{
|
||||
return ((SimpleTy >= CS_DATA_TYPE_FIRST_INTEGER_VALUETYPE &&
|
||||
SimpleTy <= CS_DATA_TYPE_LAST_INTEGER_VALUETYPE) ||
|
||||
(SimpleTy >= CS_DATA_TYPE_FIRST_INTEGER_FIXEDLEN_VECTOR_VALUETYPE &&
|
||||
SimpleTy <= CS_DATA_TYPE_LAST_INTEGER_FIXEDLEN_VECTOR_VALUETYPE) ||
|
||||
(SimpleTy >= CS_DATA_TYPE_FIRST_INTEGER_SCALABLE_VECTOR_VALUETYPE &&
|
||||
SimpleTy <= CS_DATA_TYPE_LAST_INTEGER_SCALABLE_VECTOR_VALUETYPE));
|
||||
SimpleTy <= CS_DATA_TYPE_LAST_INTEGER_VALUETYPE) ||
|
||||
(SimpleTy >=
|
||||
CS_DATA_TYPE_FIRST_INTEGER_FIXEDLEN_VECTOR_VALUETYPE &&
|
||||
SimpleTy <=
|
||||
CS_DATA_TYPE_LAST_INTEGER_FIXEDLEN_VECTOR_VALUETYPE) ||
|
||||
(SimpleTy >=
|
||||
CS_DATA_TYPE_FIRST_INTEGER_SCALABLE_VECTOR_VALUETYPE &&
|
||||
SimpleTy <=
|
||||
CS_DATA_TYPE_LAST_INTEGER_SCALABLE_VECTOR_VALUETYPE));
|
||||
}
|
||||
|
||||
/// Return true if this is an integer, not including vectors.
|
||||
inline bool isScalarInteger(cs_data_type SimpleTy)
|
||||
{
|
||||
return (SimpleTy >= CS_DATA_TYPE_FIRST_INTEGER_VALUETYPE &&
|
||||
SimpleTy <= CS_DATA_TYPE_LAST_INTEGER_VALUETYPE);
|
||||
SimpleTy <= CS_DATA_TYPE_LAST_INTEGER_VALUETYPE);
|
||||
}
|
||||
|
||||
/// Return true if this is a vector value type.
|
||||
inline bool isVector(cs_data_type SimpleTy)
|
||||
{
|
||||
return (SimpleTy >= CS_DATA_TYPE_FIRST_VECTOR_VALUETYPE &&
|
||||
SimpleTy <= CS_DATA_TYPE_LAST_VECTOR_VALUETYPE);
|
||||
SimpleTy <= CS_DATA_TYPE_LAST_VECTOR_VALUETYPE);
|
||||
}
|
||||
|
||||
/// Return true if this is a vector value type where the
|
||||
@ -364,94 +373,122 @@ inline bool isVector(cs_data_type SimpleTy)
|
||||
inline bool isScalableVector(cs_data_type SimpleTy)
|
||||
{
|
||||
return (SimpleTy >= CS_DATA_TYPE_FIRST_SCALABLE_VECTOR_VALUETYPE &&
|
||||
SimpleTy <= CS_DATA_TYPE_LAST_SCALABLE_VECTOR_VALUETYPE);
|
||||
SimpleTy <= CS_DATA_TYPE_LAST_SCALABLE_VECTOR_VALUETYPE);
|
||||
}
|
||||
|
||||
inline bool isFixedLengthVector(cs_data_type SimpleTy)
|
||||
{
|
||||
return (SimpleTy >= CS_DATA_TYPE_FIRST_FIXEDLEN_VECTOR_VALUETYPE &&
|
||||
SimpleTy <= CS_DATA_TYPE_LAST_FIXEDLEN_VECTOR_VALUETYPE);
|
||||
SimpleTy <= CS_DATA_TYPE_LAST_FIXEDLEN_VECTOR_VALUETYPE);
|
||||
}
|
||||
|
||||
/// Return true if this is a 16-bit vector type.
|
||||
inline bool is16BitVector(cs_data_type SimpleTy)
|
||||
{
|
||||
return (SimpleTy == CS_DATA_TYPE_v2i8 || SimpleTy == CS_DATA_TYPE_v1i16 ||
|
||||
SimpleTy == CS_DATA_TYPE_v16i1 || SimpleTy == CS_DATA_TYPE_v1f16);
|
||||
return (SimpleTy == CS_DATA_TYPE_v2i8 ||
|
||||
SimpleTy == CS_DATA_TYPE_v1i16 ||
|
||||
SimpleTy == CS_DATA_TYPE_v16i1 ||
|
||||
SimpleTy == CS_DATA_TYPE_v1f16);
|
||||
}
|
||||
|
||||
/// Return true if this is a 32-bit vector type.
|
||||
inline bool is32BitVector(cs_data_type SimpleTy)
|
||||
{
|
||||
return (SimpleTy == CS_DATA_TYPE_v32i1 || SimpleTy == CS_DATA_TYPE_v4i8 ||
|
||||
SimpleTy == CS_DATA_TYPE_v2i16 || SimpleTy == CS_DATA_TYPE_v1i32 ||
|
||||
SimpleTy == CS_DATA_TYPE_v2f16 || SimpleTy == CS_DATA_TYPE_v2bf16 ||
|
||||
SimpleTy == CS_DATA_TYPE_v1f32);
|
||||
return (SimpleTy == CS_DATA_TYPE_v32i1 ||
|
||||
SimpleTy == CS_DATA_TYPE_v4i8 ||
|
||||
SimpleTy == CS_DATA_TYPE_v2i16 ||
|
||||
SimpleTy == CS_DATA_TYPE_v1i32 ||
|
||||
SimpleTy == CS_DATA_TYPE_v2f16 ||
|
||||
SimpleTy == CS_DATA_TYPE_v2bf16 ||
|
||||
SimpleTy == CS_DATA_TYPE_v1f32);
|
||||
}
|
||||
|
||||
/// Return true if this is a 64-bit vector type.
|
||||
inline bool is64BitVector(cs_data_type SimpleTy)
|
||||
{
|
||||
return (SimpleTy == CS_DATA_TYPE_v64i1 || SimpleTy == CS_DATA_TYPE_v8i8 ||
|
||||
SimpleTy == CS_DATA_TYPE_v4i16 || SimpleTy == CS_DATA_TYPE_v2i32 ||
|
||||
SimpleTy == CS_DATA_TYPE_v1i64 || SimpleTy == CS_DATA_TYPE_v4f16 ||
|
||||
SimpleTy == CS_DATA_TYPE_v4bf16 || SimpleTy == CS_DATA_TYPE_v2f32 ||
|
||||
SimpleTy == CS_DATA_TYPE_v1f64);
|
||||
return (SimpleTy == CS_DATA_TYPE_v64i1 ||
|
||||
SimpleTy == CS_DATA_TYPE_v8i8 ||
|
||||
SimpleTy == CS_DATA_TYPE_v4i16 ||
|
||||
SimpleTy == CS_DATA_TYPE_v2i32 ||
|
||||
SimpleTy == CS_DATA_TYPE_v1i64 ||
|
||||
SimpleTy == CS_DATA_TYPE_v4f16 ||
|
||||
SimpleTy == CS_DATA_TYPE_v4bf16 ||
|
||||
SimpleTy == CS_DATA_TYPE_v2f32 ||
|
||||
SimpleTy == CS_DATA_TYPE_v1f64);
|
||||
}
|
||||
|
||||
/// Return true if this is a 128-bit vector type.
|
||||
inline bool is128BitVector(cs_data_type SimpleTy)
|
||||
{
|
||||
return (SimpleTy == CS_DATA_TYPE_v128i1 || SimpleTy == CS_DATA_TYPE_v16i8 ||
|
||||
SimpleTy == CS_DATA_TYPE_v8i16 || SimpleTy == CS_DATA_TYPE_v4i32 ||
|
||||
SimpleTy == CS_DATA_TYPE_v2i64 || SimpleTy == CS_DATA_TYPE_v1i128 ||
|
||||
SimpleTy == CS_DATA_TYPE_v8f16 || SimpleTy == CS_DATA_TYPE_v8bf16 ||
|
||||
SimpleTy == CS_DATA_TYPE_v4f32 || SimpleTy == CS_DATA_TYPE_v2f64);
|
||||
return (SimpleTy == CS_DATA_TYPE_v128i1 ||
|
||||
SimpleTy == CS_DATA_TYPE_v16i8 ||
|
||||
SimpleTy == CS_DATA_TYPE_v8i16 ||
|
||||
SimpleTy == CS_DATA_TYPE_v4i32 ||
|
||||
SimpleTy == CS_DATA_TYPE_v2i64 ||
|
||||
SimpleTy == CS_DATA_TYPE_v1i128 ||
|
||||
SimpleTy == CS_DATA_TYPE_v8f16 ||
|
||||
SimpleTy == CS_DATA_TYPE_v8bf16 ||
|
||||
SimpleTy == CS_DATA_TYPE_v4f32 ||
|
||||
SimpleTy == CS_DATA_TYPE_v2f64);
|
||||
}
|
||||
|
||||
/// Return true if this is a 256-bit vector type.
|
||||
inline bool is256BitVector(cs_data_type SimpleTy)
|
||||
{
|
||||
return (SimpleTy == CS_DATA_TYPE_v16f16 ||
|
||||
SimpleTy == CS_DATA_TYPE_v16bf16 ||
|
||||
SimpleTy == CS_DATA_TYPE_v8f32 || SimpleTy == CS_DATA_TYPE_v4f64 ||
|
||||
SimpleTy == CS_DATA_TYPE_v32i8 || SimpleTy == CS_DATA_TYPE_v16i16 ||
|
||||
SimpleTy == CS_DATA_TYPE_v8i32 || SimpleTy == CS_DATA_TYPE_v4i64 ||
|
||||
SimpleTy == CS_DATA_TYPE_v256i1 ||
|
||||
SimpleTy == CS_DATA_TYPE_v128i2 || SimpleTy == CS_DATA_TYPE_v64i4);
|
||||
SimpleTy == CS_DATA_TYPE_v16bf16 ||
|
||||
SimpleTy == CS_DATA_TYPE_v8f32 ||
|
||||
SimpleTy == CS_DATA_TYPE_v4f64 ||
|
||||
SimpleTy == CS_DATA_TYPE_v32i8 ||
|
||||
SimpleTy == CS_DATA_TYPE_v16i16 ||
|
||||
SimpleTy == CS_DATA_TYPE_v8i32 ||
|
||||
SimpleTy == CS_DATA_TYPE_v4i64 ||
|
||||
SimpleTy == CS_DATA_TYPE_v256i1 ||
|
||||
SimpleTy == CS_DATA_TYPE_v128i2 ||
|
||||
SimpleTy == CS_DATA_TYPE_v64i4);
|
||||
}
|
||||
|
||||
/// Return true if this is a 512-bit vector type.
|
||||
inline bool is512BitVector(cs_data_type SimpleTy)
|
||||
{
|
||||
return (
|
||||
SimpleTy == CS_DATA_TYPE_v32f16 || SimpleTy == CS_DATA_TYPE_v32bf16 ||
|
||||
SimpleTy == CS_DATA_TYPE_v16f32 || SimpleTy == CS_DATA_TYPE_v8f64 ||
|
||||
SimpleTy == CS_DATA_TYPE_v512i1 || SimpleTy == CS_DATA_TYPE_v256i2 ||
|
||||
SimpleTy == CS_DATA_TYPE_v128i4 || SimpleTy == CS_DATA_TYPE_v64i8 ||
|
||||
SimpleTy == CS_DATA_TYPE_v32i16 || SimpleTy == CS_DATA_TYPE_v16i32 ||
|
||||
return (SimpleTy == CS_DATA_TYPE_v32f16 ||
|
||||
SimpleTy == CS_DATA_TYPE_v32bf16 ||
|
||||
SimpleTy == CS_DATA_TYPE_v16f32 ||
|
||||
SimpleTy == CS_DATA_TYPE_v8f64 ||
|
||||
SimpleTy == CS_DATA_TYPE_v512i1 ||
|
||||
SimpleTy == CS_DATA_TYPE_v256i2 ||
|
||||
SimpleTy == CS_DATA_TYPE_v128i4 ||
|
||||
SimpleTy == CS_DATA_TYPE_v64i8 ||
|
||||
SimpleTy == CS_DATA_TYPE_v32i16 ||
|
||||
SimpleTy == CS_DATA_TYPE_v16i32 ||
|
||||
SimpleTy == CS_DATA_TYPE_v8i64);
|
||||
}
|
||||
|
||||
/// Return true if this is a 1024-bit vector type.
|
||||
inline bool is1024BitVector(cs_data_type SimpleTy)
|
||||
{
|
||||
return (
|
||||
SimpleTy == CS_DATA_TYPE_v1024i1 || SimpleTy == CS_DATA_TYPE_v128i8 ||
|
||||
SimpleTy == CS_DATA_TYPE_v64i16 || SimpleTy == CS_DATA_TYPE_v32i32 ||
|
||||
SimpleTy == CS_DATA_TYPE_v16i64 || SimpleTy == CS_DATA_TYPE_v64f16 ||
|
||||
SimpleTy == CS_DATA_TYPE_v32f32 || SimpleTy == CS_DATA_TYPE_v16f64 ||
|
||||
return (SimpleTy == CS_DATA_TYPE_v1024i1 ||
|
||||
SimpleTy == CS_DATA_TYPE_v128i8 ||
|
||||
SimpleTy == CS_DATA_TYPE_v64i16 ||
|
||||
SimpleTy == CS_DATA_TYPE_v32i32 ||
|
||||
SimpleTy == CS_DATA_TYPE_v16i64 ||
|
||||
SimpleTy == CS_DATA_TYPE_v64f16 ||
|
||||
SimpleTy == CS_DATA_TYPE_v32f32 ||
|
||||
SimpleTy == CS_DATA_TYPE_v16f64 ||
|
||||
SimpleTy == CS_DATA_TYPE_v64bf16);
|
||||
}
|
||||
|
||||
/// Return true if this is a 2048-bit vector type.
|
||||
inline bool is2048BitVector(cs_data_type SimpleTy)
|
||||
{
|
||||
return (
|
||||
SimpleTy == CS_DATA_TYPE_v256i8 || SimpleTy == CS_DATA_TYPE_v128i16 ||
|
||||
SimpleTy == CS_DATA_TYPE_v64i32 || SimpleTy == CS_DATA_TYPE_v32i64 ||
|
||||
SimpleTy == CS_DATA_TYPE_v128f16 || SimpleTy == CS_DATA_TYPE_v64f32 ||
|
||||
SimpleTy == CS_DATA_TYPE_v32f64 || SimpleTy == CS_DATA_TYPE_v128bf16 ||
|
||||
return (SimpleTy == CS_DATA_TYPE_v256i8 ||
|
||||
SimpleTy == CS_DATA_TYPE_v128i16 ||
|
||||
SimpleTy == CS_DATA_TYPE_v64i32 ||
|
||||
SimpleTy == CS_DATA_TYPE_v32i64 ||
|
||||
SimpleTy == CS_DATA_TYPE_v128f16 ||
|
||||
SimpleTy == CS_DATA_TYPE_v64f32 ||
|
||||
SimpleTy == CS_DATA_TYPE_v32f64 ||
|
||||
SimpleTy == CS_DATA_TYPE_v128bf16 ||
|
||||
SimpleTy == CS_DATA_TYPE_v2048i1);
|
||||
}
|
||||
|
||||
|
@ -201,15 +201,15 @@ typedef struct cs_opt_mnem {
|
||||
|
||||
/// Runtime option for the disassembled engine
|
||||
typedef enum cs_opt_type {
|
||||
CS_OPT_INVALID = 0, ///< No option specified
|
||||
CS_OPT_SYNTAX, ///< Assembly output syntax
|
||||
CS_OPT_DETAIL, ///< Break down instruction structure into details
|
||||
CS_OPT_MODE, ///< Change engine's mode at run-time
|
||||
CS_OPT_MEM, ///< User-defined dynamic memory related functions
|
||||
CS_OPT_INVALID = 0, ///< No option specified
|
||||
CS_OPT_SYNTAX, ///< Assembly output syntax
|
||||
CS_OPT_DETAIL, ///< Break down instruction structure into details
|
||||
CS_OPT_MODE, ///< Change engine's mode at run-time
|
||||
CS_OPT_MEM, ///< User-defined dynamic memory related functions
|
||||
CS_OPT_SKIPDATA, ///< Skip data when disassembling. Then engine is in SKIPDATA mode.
|
||||
CS_OPT_SKIPDATA_SETUP, ///< Setup user-defined function for SKIPDATA option
|
||||
CS_OPT_MNEMONIC, ///< Customize instruction mnemonic
|
||||
CS_OPT_UNSIGNED, ///< print immediate operands in unsigned form
|
||||
CS_OPT_MNEMONIC, ///< Customize instruction mnemonic
|
||||
CS_OPT_UNSIGNED, ///< print immediate operands in unsigned form
|
||||
CS_OPT_NO_BRANCH_OFFSET, ///< ARM, prints branch immediates without offset.
|
||||
} cs_opt_type;
|
||||
|
||||
@ -227,11 +227,12 @@ typedef enum cs_opt_value {
|
||||
|
||||
/// Common instruction operand types - to be consistent across all architectures.
|
||||
typedef enum cs_op_type {
|
||||
CS_OP_INVALID = 0, ///< uninitialized/invalid operand.
|
||||
CS_OP_REG, ///< Register operand.
|
||||
CS_OP_IMM, ///< Immediate operand.
|
||||
CS_OP_FP, ///< Floating-Point operand.
|
||||
CS_OP_MEM = 0x80, ///< Memory operand. Can be ORed with another operand type.
|
||||
CS_OP_INVALID = 0, ///< uninitialized/invalid operand.
|
||||
CS_OP_REG, ///< Register operand.
|
||||
CS_OP_IMM, ///< Immediate operand.
|
||||
CS_OP_FP, ///< Floating-Point operand.
|
||||
CS_OP_MEM =
|
||||
0x80, ///< Memory operand. Can be ORed with another operand type.
|
||||
} cs_op_type;
|
||||
|
||||
/// Common instruction operand access types - to be consistent across all architectures.
|
||||
@ -335,16 +336,18 @@ typedef struct cs_opt_skipdata {
|
||||
/// if cs_detail changes, in particular if a field is added after the union,
|
||||
/// then update arch/ARCH/ARCHDisassembler.c accordingly
|
||||
typedef struct cs_detail {
|
||||
uint16_t regs_read[MAX_IMPL_R_REGS]; ///< list of implicit registers read by this insn
|
||||
uint16_t regs_read
|
||||
[MAX_IMPL_R_REGS]; ///< list of implicit registers read by this insn
|
||||
uint8_t regs_read_count; ///< number of implicit registers read by this insn
|
||||
|
||||
uint16_t regs_write[MAX_IMPL_W_REGS]; ///< list of implicit registers modified by this insn
|
||||
uint16_t regs_write
|
||||
[MAX_IMPL_W_REGS]; ///< list of implicit registers modified by this insn
|
||||
uint8_t regs_write_count; ///< number of implicit registers modified by this insn
|
||||
|
||||
uint8_t groups[MAX_NUM_GROUPS]; ///< list of group this instruction belong to
|
||||
uint8_t groups_count; ///< number of groups this insn belongs to
|
||||
|
||||
bool writeback; ///< Instruction has writeback operands.
|
||||
bool writeback; ///< Instruction has writeback operands.
|
||||
|
||||
/// Architecture-specific instruction info
|
||||
union {
|
||||
|
@ -35,7 +35,7 @@ static char *hex_string(unsigned char *str, size_t len)
|
||||
if (!hex_out) { goto Exit; }
|
||||
|
||||
for (i = 0; i < len; ++i) {
|
||||
snprintf(hex_out + (i*2), 3, "%02x", str[i]);
|
||||
snprintf(hex_out + (i * 2), 3, "%02x", str[i]);
|
||||
}
|
||||
|
||||
hex_out[len*2] = 0; // trailing null
|
||||
@ -284,7 +284,7 @@ static void test_valids()
|
||||
}
|
||||
}};
|
||||
|
||||
struct valid_instructions * valid = NULL;
|
||||
struct valid_instructions *valid = NULL;
|
||||
cs_insn *insn;
|
||||
int i;
|
||||
int j;
|
||||
|
@ -155,7 +155,7 @@ void replace_hex(char *src)
|
||||
void replace_negative(char *src, int mode)
|
||||
{
|
||||
char *tmp, *result, *found, *origin, *orig_found;
|
||||
int cnt, valid;
|
||||
int cnt, valid;
|
||||
char *value, *tmp_tmp;
|
||||
unsigned short int tmp_short;
|
||||
unsigned int tmp_int;
|
||||
|
@ -97,7 +97,7 @@ static void print_insn_detail(csh handle, cs_insn *insn)
|
||||
|
||||
case SH_OP_IMM:
|
||||
printf("\t\toperands[%u].type: IMMEDIATE = #%lu\n", i,
|
||||
op->imm);
|
||||
op->imm);
|
||||
break;
|
||||
|
||||
case SH_OP_MEM:
|
||||
|
6
utils.c
6
utils.c
@ -119,10 +119,10 @@ uint32_t readBytes32(MCInst *MI, const uint8_t *Bytes)
|
||||
uint32_t Insn;
|
||||
if (MODE_IS_BIG_ENDIAN(MI->csh->mode))
|
||||
Insn = (Bytes[3] << 0) | (Bytes[2] << 8) | (Bytes[1] << 16) |
|
||||
((uint32_t)Bytes[0] << 24);
|
||||
((uint32_t)Bytes[0] << 24);
|
||||
else
|
||||
Insn = ((uint32_t)Bytes[3] << 24) | (Bytes[2] << 16) | (Bytes[1] << 8) |
|
||||
(Bytes[0] << 0);
|
||||
Insn = ((uint32_t)Bytes[3] << 24) | (Bytes[2] << 16) |
|
||||
(Bytes[1] << 8) | (Bytes[0] << 0);
|
||||
return Insn;
|
||||
}
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user