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arm64: cleanup
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@ -24,7 +24,6 @@
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// Shifts
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// Shifts
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//
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//
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typedef enum AArch64_AM_ShiftExtendType {
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typedef enum AArch64_AM_ShiftExtendType {
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AArch64_AM_InvalidShiftExtend = -1,
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AArch64_AM_InvalidShiftExtend = -1,
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AArch64_AM_LSL = 0,
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AArch64_AM_LSL = 0,
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@ -142,7 +141,7 @@ static inline AArch64_AM_ShiftExtendType AArch64_AM_getArithExtendType(unsigned
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/// 101 ==> sxth
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/// 101 ==> sxth
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/// 110 ==> sxtw
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/// 110 ==> sxtw
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/// 111 ==> sxtx
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/// 111 ==> sxtx
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inline unsigned AArch64_AM_getExtendEncoding(AArch64_AM_ShiftExtendType ET)
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static inline unsigned AArch64_AM_getExtendEncoding(AArch64_AM_ShiftExtendType ET)
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{
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{
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switch (ET) {
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switch (ET) {
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default: // llvm_unreachable("Invalid extend type requested");
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default: // llvm_unreachable("Invalid extend type requested");
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@ -182,13 +181,6 @@ static inline AArch64_AM_ShiftExtendType AArch64_AM_getMemExtendType(unsigned Im
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return AArch64_AM_getExtendType((Imm >> 1) & 0x7);
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return AArch64_AM_getExtendType((Imm >> 1) & 0x7);
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}
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}
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#if 0
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static inline unsigned AArch64_AM_getMemExtendImm(AArch64_AM_ShiftExtendType ET, bool DoShift)
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{
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return (AArch64_AM_getExtendEncoding(ET) << 1) | unsigned(DoShift);
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}
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#endif
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static inline uint64_t ror(uint64_t elt, unsigned size)
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static inline uint64_t ror(uint64_t elt, unsigned size)
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{
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{
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return ((elt & 1) << (size-1)) | (elt >> 1);
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return ((elt & 1) << (size-1)) | (elt >> 1);
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@ -374,99 +366,6 @@ static inline float AArch64_AM_getFPImmFloat(unsigned Imm)
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return FPUnion.F;
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return FPUnion.F;
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}
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}
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#if 0
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/// getFP16Imm - Return an 8-bit floating-point version of the 16-bit
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/// floating-point value. If the value cannot be represented as an 8-bit
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/// floating-point value, then return -1.
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static inline int AArch64_AM_getFP16Imm(const APInt &Imm)
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{
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uint32_t Sign = Imm.lshr(15).getZExtValue() & 1;
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int32_t Exp = (Imm.lshr(10).getSExtValue() & 0x1f) - 15; // -14 to 15
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int32_t Mantissa = Imm.getZExtValue() & 0x3ff; // 10 bits
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// We can handle 4 bits of mantissa.
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// mantissa = (16+UInt(e:f:g:h))/16.
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if (Mantissa & 0x3f)
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return -1;
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Mantissa >>= 6;
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// We can handle 3 bits of exponent: exp == UInt(NOT(b):c:d)-3
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if (Exp < -3 || Exp > 4)
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return -1;
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Exp = ((Exp + 3) & 0x7) ^ 4;
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return ((int)Sign << 7) | (Exp << 4) | Mantissa;
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}
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static inline int getFP16Imm(const APFloat &FPImm)
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{
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return getFP16Imm(FPImm.bitcastToAPInt());
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}
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/// getFP32Imm - Return an 8-bit floating-point version of the 32-bit
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/// floating-point value. If the value cannot be represented as an 8-bit
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/// floating-point value, then return -1.
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static inline int AArch64_AM_getFP32Imm(const APInt &Imm)
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{
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uint32_t Sign = Imm.lshr(31).getZExtValue() & 1;
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int32_t Exp = (Imm.lshr(23).getSExtValue() & 0xff) - 127; // -126 to 127
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int64_t Mantissa = Imm.getZExtValue() & 0x7fffff; // 23 bits
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// We can handle 4 bits of mantissa.
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// mantissa = (16+UInt(e:f:g:h))/16.
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if (Mantissa & 0x7ffff)
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return -1;
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Mantissa >>= 19;
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if ((Mantissa & 0xf) != Mantissa)
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return -1;
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// We can handle 3 bits of exponent: exp == UInt(NOT(b):c:d)-3
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if (Exp < -3 || Exp > 4)
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return -1;
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Exp = ((Exp + 3) & 0x7) ^ 4;
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return ((int)Sign << 7) | (Exp << 4) | Mantissa;
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}
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static inline int AArch64_AM_getFP32Imm(const APFloat &FPImm)
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{
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return getFP32Imm(FPImm.bitcastToAPInt());
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}
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/// getFP64Imm - Return an 8-bit floating-point version of the 64-bit
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/// floating-point value. If the value cannot be represented as an 8-bit
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/// floating-point value, then return -1.
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static inline int AArch64_AM_getFP64Imm(const APInt &Imm)
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{
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uint64_t Sign = Imm.lshr(63).getZExtValue() & 1;
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int64_t Exp = (Imm.lshr(52).getSExtValue() & 0x7ff) - 1023; // -1022 to 1023
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uint64_t Mantissa = Imm.getZExtValue() & 0xfffffffffffffULL;
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// We can handle 4 bits of mantissa.
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// mantissa = (16+UInt(e:f:g:h))/16.
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if (Mantissa & 0xffffffffffffULL)
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return -1;
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Mantissa >>= 48;
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if ((Mantissa & 0xf) != Mantissa)
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return -1;
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// We can handle 3 bits of exponent: exp == UInt(NOT(b):c:d)-3
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if (Exp < -3 || Exp > 4)
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return -1;
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Exp = ((Exp + 3) & 0x7) ^ 4;
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return ((int)Sign << 7) | (Exp << 4) | Mantissa;
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}
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static inline int AArch64_AM_getFP64Imm(const APFloat &FPImm)
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{
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return getFP64Imm(FPImm.bitcastToAPInt());
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}
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#endif
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//===--------------------------------------------------------------------===//
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//===--------------------------------------------------------------------===//
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// AdvSIMD Modified Immediates
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// AdvSIMD Modified Immediates
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//===--------------------------------------------------------------------===//
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//===--------------------------------------------------------------------===//
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