From 7c668dac9d941c24d6f82e1297acc9ef9433853f Mon Sep 17 00:00:00 2001
From: Catena cyber <35799796+catenacyber@users.noreply.github.com>
Date: Fri, 1 Jun 2018 14:51:46 +0200
Subject: [PATCH] Do not shift signed values in Mips disassembling (#1148)

* Do not shift signed values in Mips disassembling

* Do not shift signed values in Mips disassembling

Multiply instead
---
 arch/Mips/MipsDisassembler.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/Mips/MipsDisassembler.c b/arch/Mips/MipsDisassembler.c
index dfc07eed3..561f522ee 100644
--- a/arch/Mips/MipsDisassembler.c
+++ b/arch/Mips/MipsDisassembler.c
@@ -1196,7 +1196,7 @@ static DecodeStatus DecodeMemMMReglistImm4Lsl2(MCInst *Inst,
 		return MCDisassembler_Fail;
 
 	MCOperand_CreateReg0(Inst, Mips_SP);
-	MCOperand_CreateImm0(Inst, Offset << 2);
+	MCOperand_CreateImm0(Inst, Offset * 4);
 
 	return MCDisassembler_Success;
 }
@@ -1533,7 +1533,7 @@ static DecodeStatus DecodeBranchTarget26(MCInst *Inst,
 static DecodeStatus DecodeBranchTarget7MM(MCInst *Inst,
 		unsigned Offset, uint64_t Address, MCRegisterInfo *Decoder)
 {
-	int32_t BranchOffset = SignExtend32(Offset, 7) << 1;
+	int32_t BranchOffset = SignExtend32(Offset, 7) * 2;
 	MCOperand_CreateImm0(Inst, BranchOffset);
 	return MCDisassembler_Success;
 }
@@ -1541,7 +1541,7 @@ static DecodeStatus DecodeBranchTarget7MM(MCInst *Inst,
 static DecodeStatus DecodeBranchTarget10MM(MCInst *Inst,
 		unsigned Offset, uint64_t Address, MCRegisterInfo *Decoder)
 {
-	int32_t BranchOffset = SignExtend32(Offset, 10) << 1;
+	int32_t BranchOffset = SignExtend32(Offset, 10) * 2;
 	MCOperand_CreateImm0(Inst, BranchOffset);
 	return MCDisassembler_Success;
 }