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python: make Cython binding support X86's @xop_cc
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@ -32,7 +32,7 @@ class CsDetail(object):
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(self.prefix, self.opcode, self.rex, self.addr_size, \
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self.modrm, self.sib, self.disp, \
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self.sib_index, self.sib_scale, self.sib_base, \
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self.sse_cc, self.avx_cc, self.avx_sae, self.avx_rm, \
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self.xop_cc, self.sse_cc, self.avx_cc, self.avx_sae, self.avx_rm, \
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self.operands) = x86.get_arch_info(detail.arch.x86)
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elif arch == capstone.CS_ARCH_MIPS:
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self.operands = mips.get_arch_info(detail.arch.mips)
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