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python: update to reflect the last API change
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@ -42,11 +42,6 @@ class _cs_arm(ctypes.Structure):
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('operands', arm_op * 20),
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)
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def get_arch_info(arch):
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op_info = []
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for i in arch.operands:
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if i.type == 0:
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break
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op_info.append(i)
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return (arch.cc, arch.update_flags, arch.writeback, op_info)
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def get_arch_info(a):
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return (a.cc, a.update_flags, a.writeback, a.operands[:a.op_count])
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@ -43,10 +43,5 @@ class _cs_arm64(ctypes.Structure):
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)
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def get_arch_info(a):
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op_info = []
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for i in a.operands:
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if i.type == 0:
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break
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op_info.append(i)
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return (a.cc, a.update_flags, a.writeback, op_info)
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return (a.cc, a.update_flags, a.writeback, a.operands[:a.op_count])
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@ -123,8 +123,11 @@ class _cs_insn(ctypes.Structure):
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('mnemonic', ctypes.c_char * 32),
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('op_str', ctypes.c_char * 96),
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('regs_read', ctypes.c_uint * 32),
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('regs_read_count', ctypes.c_uint),
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('regs_write', ctypes.c_uint * 32),
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('regs_write_count', ctypes.c_uint),
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('groups', ctypes.c_uint * 8),
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('groups_count', ctypes.c_uint),
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('arch', _cs_arch),
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)
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@ -177,22 +180,14 @@ def cs_disasm_quick(arch, mode, code, offset, count = 0):
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# Python-style class to disasm code
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class cs_insn:
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def __init__(self, csh, all_info, arch):
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def create_list(rawlist):
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fl = []
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for m in rawlist:
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if m == 0:
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break
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fl.append(m)
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return fl
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self.id = all_info.id
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self.address = all_info.address
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self.size = all_info.size
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self.mnemonic = all_info.mnemonic
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self.op_str = all_info.op_str
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self.regs_read = create_list(all_info.regs_read)
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self.regs_write = create_list(all_info.regs_write)
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self.groups = create_list(all_info.groups)
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self.regs_read = all_info.regs_read[:all_info.regs_read_count]
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self.regs_write = all_info.regs_write[:all_info.regs_write_count]
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self.groups = all_info.groups[:all_info.groups_count]
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if arch == CS_ARCH_ARM:
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(self.cc, self.update_flags, self.writeback, self.operands) = \
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@ -30,13 +30,7 @@ class _cs_mips(ctypes.Structure):
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)
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def get_arch_info(a):
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op_info = []
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for i in a.operands:
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if i.type == 0:
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# no more valid op after this
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break
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op_info.append(i)
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return op_info
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return a.operands[:a.op_count]
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# MIPS registers
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@ -46,10 +46,7 @@ class _cs_x86(ctypes.Structure):
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)
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def get_arch_info(a):
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op_info = []
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for i in a.operands:
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if i.type == 0:
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break
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op_info.append(i)
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return (a.prefix, a.segment, a.opcode, a.op_size, a.addr_size, a.disp_size, a.imm_size, a.modrm, a.sib, a.disp, a.sib_index, a.sib_scale, a.sib_base, op_info)
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return (a.prefix, a.segment, a.opcode, a.op_size, a.addr_size, a.disp_size, \
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a.imm_size, a.modrm, a.sib, a.disp, a.sib_index, a.sib_scale, \
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a.sib_base, a.operands[:a.op_count])
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