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python: update to reflect the last API change

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This commit is contained in:
Nguyen Anh Quynh 2013-12-03 11:25:13 +08:00
parent f35e2ad35c
commit 8eb689e4af
5 changed files with 13 additions and 37 deletions
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9
bindings/python/capstone/arm.py
View File

@ -42,11 +42,6 @@ class _cs_arm(ctypes.Structure):
('operands', arm_op * 20), ('operands', arm_op * 20),
) )
def get_arch_info(arch): def get_arch_info(a):
op_info = [] return (a.cc, a.update_flags, a.writeback, a.operands[:a.op_count])
for i in arch.operands:
if i.type == 0:
break
op_info.append(i)
return (arch.cc, arch.update_flags, arch.writeback, op_info)

7
bindings/python/capstone/arm64.py
View File

@ -43,10 +43,5 @@ class _cs_arm64(ctypes.Structure):
) )
def get_arch_info(a): def get_arch_info(a):
op_info = [] return (a.cc, a.update_flags, a.writeback, a.operands[:a.op_count])
for i in a.operands:
if i.type == 0:
break
op_info.append(i)
return (a.cc, a.update_flags, a.writeback, op_info)

17
bindings/python/capstone/capstone.py
View File

@ -123,8 +123,11 @@ class _cs_insn(ctypes.Structure):
('mnemonic', ctypes.c_char * 32), ('mnemonic', ctypes.c_char * 32),
('op_str', ctypes.c_char * 96), ('op_str', ctypes.c_char * 96),
('regs_read', ctypes.c_uint * 32), ('regs_read', ctypes.c_uint * 32),
('regs_read_count', ctypes.c_uint),
('regs_write', ctypes.c_uint * 32), ('regs_write', ctypes.c_uint * 32),
('regs_write_count', ctypes.c_uint),
('groups', ctypes.c_uint * 8), ('groups', ctypes.c_uint * 8),
('groups_count', ctypes.c_uint),
('arch', _cs_arch), ('arch', _cs_arch),
) )
@ -177,22 +180,14 @@ def cs_disasm_quick(arch, mode, code, offset, count = 0):
# Python-style class to disasm code # Python-style class to disasm code
class cs_insn: class cs_insn:
def __init__(self, csh, all_info, arch): def __init__(self, csh, all_info, arch):
def create_list(rawlist):
fl = []
for m in rawlist:
if m == 0:
break
fl.append(m)
return fl
self.id = all_info.id self.id = all_info.id
self.address = all_info.address self.address = all_info.address
self.size = all_info.size self.size = all_info.size
self.mnemonic = all_info.mnemonic self.mnemonic = all_info.mnemonic
self.op_str = all_info.op_str self.op_str = all_info.op_str
self.regs_read = create_list(all_info.regs_read) self.regs_read = all_info.regs_read[:all_info.regs_read_count]
self.regs_write = create_list(all_info.regs_write) self.regs_write = all_info.regs_write[:all_info.regs_write_count]
self.groups = create_list(all_info.groups) self.groups = all_info.groups[:all_info.groups_count]
if arch == CS_ARCH_ARM: if arch == CS_ARCH_ARM:
(self.cc, self.update_flags, self.writeback, self.operands) = \ (self.cc, self.update_flags, self.writeback, self.operands) = \

8
bindings/python/capstone/mips.py
View File

@ -30,13 +30,7 @@ class _cs_mips(ctypes.Structure):
) )
def get_arch_info(a): def get_arch_info(a):
op_info = [] return a.operands[:a.op_count]
for i in a.operands:
if i.type == 0:
# no more valid op after this
break
op_info.append(i)
return op_info
# MIPS registers # MIPS registers

9
bindings/python/capstone/x86.py
View File

@ -46,10 +46,7 @@ class _cs_x86(ctypes.Structure):
) )
def get_arch_info(a): def get_arch_info(a):
op_info = [] return (a.prefix, a.segment, a.opcode, a.op_size, a.addr_size, a.disp_size, \
for i in a.operands: a.imm_size, a.modrm, a.sib, a.disp, a.sib_index, a.sib_scale, \
if i.type == 0: a.sib_base, a.operands[:a.op_count])
break
op_info.append(i)
return (a.prefix, a.segment, a.opcode, a.op_size, a.addr_size, a.disp_size, a.imm_size, a.modrm, a.sib, a.disp, a.sib_index, a.sib_scale, a.sib_base, op_info)