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Merge remote-tracking branch 'upstream/master'

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This commit is contained in:
hardtobelieve 2019-02-13 07:09:45 -08:00
commit a136eda2a0
4 changed files with 96 additions and 21 deletions
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2
arch/AArch64/AArch64InstPrinter.c
View File

@ -763,7 +763,7 @@ static void printOperand(MCInst *MI, unsigned OpNo, SStream *O)
} else {
if (MI->csh->doing_mem) {
if (MI->csh->imm_unsigned) {
printInt64Bang(O, imm & 0xffff);
printUInt64Bang(O, imm);
} else {
printInt64Bang(O, imm);
}

35
arch/X86/X86ATTInstPrinter.c
View File

@ -331,10 +331,29 @@ static void _printOperand(MCInst *MI, unsigned OpNo, SStream *O)
if (MCOperand_isReg(Op)) {
printRegName(O, MCOperand_getReg(Op));
} else if (MCOperand_isImm(Op)) {
uint8_t encsize;
uint8_t opsize = X86_immediate_size(MCInst_getOpcode(MI), &encsize);
// Print X86 immediates as signed values.
int64_t imm = MCOperand_getImm(Op);
if (imm < 0) {
if (MI->csh->imm_unsigned) {
if (opsize) {
switch(opsize) {
default:
break;
case 1:
imm &= 0xff;
break;
case 2:
imm &= 0xffff;
break;
case 4:
imm &= 0xffffffff;
break;
}
}
SStream_concat(O, "$0x%"PRIx64, imm);
} else {
if (imm < -HEX_THRESHOLD)
@ -678,6 +697,22 @@ static void printOperand(MCInst *MI, unsigned OpNo, SStream *O)
SStream_concat(O, "$%"PRIu64, imm);
} else {
if (MI->csh->imm_unsigned) {
if (opsize) {
switch(opsize) {
default:
break;
case 1:
imm &= 0xff;
break;
case 2:
imm &= 0xffff;
break;
case 4:
imm &= 0xffffffff;
break;
}
}
SStream_concat(O, "$0x%"PRIx64, imm);
} else {
if (imm == 0x8000000000000000LL) // imm == -imm

72
arch/X86/X86IntelInstPrinter.c
View File

@ -373,12 +373,28 @@ static bool need_zero_prefix(uint64_t imm)
return true;
}
static void printImm(int syntax, SStream *O, int64_t imm, bool positive)
static void printImm(MCInst *MI, SStream *O, int64_t imm, bool positive)
{
if (positive) {
// always print this number in positive form
if (syntax == CS_OPT_SYNTAX_MASM) {
if (MI->csh->syntax == CS_OPT_SYNTAX_MASM) {
if (imm < 0) {
if (MI->op1_size) {
switch(MI->op1_size) {
default:
break;
case 1:
imm &= 0xff;
break;
case 2:
imm &= 0xffff;
break;
case 4:
imm &= 0xffffffff;
break;
}
}
if (imm == 0x8000000000000000LL) // imm == -imm
SStream_concat0(O, "8000000000000000h");
else if (need_zero_prefix(imm))
@ -396,6 +412,22 @@ static void printImm(int syntax, SStream *O, int64_t imm, bool positive)
}
} else { // Intel syntax
if (imm < 0) {
if (MI->op1_size) {
switch(MI->op1_size) {
default:
break;
case 1:
imm &= 0xff;
break;
case 2:
imm &= 0xffff;
break;
case 4:
imm &= 0xffffffff;
break;
}
}
SStream_concat(O, "0x%"PRIx64, imm);
} else {
if (imm > HEX_THRESHOLD)
@ -405,7 +437,7 @@ static void printImm(int syntax, SStream *O, int64_t imm, bool positive)
}
}
} else {
if (syntax == CS_OPT_SYNTAX_MASM) {
if (MI->csh->syntax == CS_OPT_SYNTAX_MASM) {
if (imm < 0) {
if (imm == 0x8000000000000000LL) // imm == -imm
SStream_concat0(O, "8000000000000000h");
@ -452,7 +484,7 @@ static void _printOperand(MCInst *MI, unsigned OpNo, SStream *O)
printRegName(O, MCOperand_getReg(Op));
} else if (MCOperand_isImm(Op)) {
int64_t imm = MCOperand_getImm(Op);
printImm(MI->csh->syntax, O, imm, MI->csh->imm_unsigned);
printImm(MI, O, imm, MI->csh->imm_unsigned);
}
}
@ -661,9 +693,9 @@ static void printMemOffset(MCInst *MI, unsigned Op, SStream *O)
MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.disp = imm;
if (imm < 0)
printImm(MI->csh->syntax, O, arch_masks[MI->csh->mode] & imm, true);
printImm(MI, O, arch_masks[MI->csh->mode] & imm, true);
else
printImm(MI->csh->syntax, O, imm, true);
printImm(MI, O, imm, true);
}
SStream_concat0(O, "]");
@ -680,7 +712,7 @@ static void printU8Imm(MCInst *MI, unsigned Op, SStream *O)
{
uint8_t val = MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0xff;
printImm(MI->csh->syntax, O, val, true);
printImm(MI, O, val, true);
if (MI->csh->detail) {
#ifndef CAPSTONE_DIET
@ -825,7 +857,7 @@ static void printPCRelImm(MCInst *MI, unsigned OpNo, SStream *O)
if (MI->Opcode == X86_CALLpcrel16 || MI->Opcode == X86_JMP_2)
imm = imm & 0xffff;
printImm(MI->csh->syntax, O, imm, true);
printImm(MI, O, imm, true);
if (MI->csh->detail) {
#ifndef CAPSTONE_DIET
@ -897,12 +929,12 @@ static void printOperand(MCInst *MI, unsigned OpNo, SStream *O)
// printf(">>> id = %u\n", MI->flat_insn->id);
switch(MI->flat_insn->id) {
default:
printImm(MI->csh->syntax, O, imm, MI->csh->imm_unsigned);
printImm(MI, O, imm, MI->csh->imm_unsigned);
break;
case X86_INS_MOVABS:
// do not print number in negative form
printImm(MI->csh->syntax, O, imm, true);
printImm(MI, O, imm, true);
break;
case X86_INS_IN:
@ -910,7 +942,7 @@ static void printOperand(MCInst *MI, unsigned OpNo, SStream *O)
case X86_INS_INT:
// do not print number in negative form
imm = imm & 0xff;
printImm(MI->csh->syntax, O, imm, true);
printImm(MI, O, imm, true);
break;
case X86_INS_LCALL:
@ -920,7 +952,7 @@ static void printOperand(MCInst *MI, unsigned OpNo, SStream *O)
imm = imm & 0xffff;
opsize = 2;
}
printImm(MI->csh->syntax, O, imm, true);
printImm(MI, O, imm, true);
break;
case X86_INS_AND:
@ -928,10 +960,10 @@ static void printOperand(MCInst *MI, unsigned OpNo, SStream *O)
case X86_INS_XOR:
// do not print number in negative form
if (imm >= 0 && imm <= HEX_THRESHOLD)
printImm(MI->csh->syntax, O, imm, true);
printImm(MI, O, imm, true);
else {
imm = arch_masks[opsize? opsize : MI->imm_size] & imm;
printImm(MI->csh->syntax, O, imm, true);
printImm(MI, O, imm, true);
}
break;
@ -939,10 +971,10 @@ static void printOperand(MCInst *MI, unsigned OpNo, SStream *O)
case X86_INS_RETF:
// RET imm16
if (imm >= 0 && imm <= HEX_THRESHOLD)
printImm(MI->csh->syntax, O, imm, true);
printImm(MI, O, imm, true);
else {
imm = 0xffff & imm;
printImm(MI->csh->syntax, O, imm, true);
printImm(MI, O, imm, true);
}
break;
}
@ -1042,17 +1074,17 @@ static void printMemReference(MCInst *MI, unsigned Op, SStream *O)
if (NeedPlus) {
if (DispVal < 0) {
SStream_concat0(O, " - ");
printImm(MI->csh->syntax, O, -DispVal, true);
printImm(MI, O, -DispVal, true);
} else {
SStream_concat0(O, " + ");
printImm(MI->csh->syntax, O, DispVal, true);
printImm(MI, O, DispVal, true);
}
} else {
// memory reference to an immediate address
if (DispVal < 0) {
printImm(MI->csh->syntax, O, arch_masks[MI->csh->mode] & DispVal, true);
printImm(MI, O, arch_masks[MI->csh->mode] & DispVal, true);
} else {
printImm(MI->csh->syntax, O, DispVal, true);
printImm(MI, O, DispVal, true);
}
}

8
suite/cstest/issues.cs
View File

@ -1,3 +1,11 @@
//!# issue 0
//!#CS_ARCH_X86, CS_MODE_64, CS_OPT_UNSIGNED
//0x66,0x83,0xc0,0x80 == add ax, 0xff80
//!# issue 0
//!#CS_ARCH_X86, CS_MODE_64, CS_OPT_SYNTAX_ATT | CS_OPT_UNSIGNED
//0x66,0x83,0xc0,0x80 == addw $0xff80, %ax
!# issue 1323
!#CS_ARCH_ARM, CS_MODE_THUMB, CS_OPT_DETAIL
0x0: 0x70,0x47,0x00 == bx lr ; op_count: 1 ; operands[0].type: REG = lr ; operands[0].access: READ ; Registers read: lr ; Registers modified: pc ; Groups: thumb jump