mirror of
https://github.com/capstone-engine/capstone.git
synced 2024-12-02 18:47:30 +00:00
Indentation fixes
Remove spaces at the end of lines, remove unnecessary brackets and avoid declaring variables after the begining of the stackframe.
This commit is contained in:
radare
parent
5d104b8c73
commit
a776b54672
@ -66,44 +66,39 @@ static uint32_t s_baseAddress;
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unsigned int m68k_read_disassembler_8(uint64_t address)
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{
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address -= s_baseAddress;
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const uint64_t addr = address - s_baseAddress;
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return s_disassemblyBuffer[address];
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}
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unsigned int m68k_read_disassembler_16(uint64_t address)
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{
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address -= s_baseAddress;
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uint16_t v0 = s_disassemblyBuffer[address + 0];
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uint16_t v1 = s_disassemblyBuffer[address + 1];
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const uint64_t addr = address - s_baseAddress;
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uint16_t v0 = s_disassemblyBuffer[addr + 0];
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uint16_t v1 = s_disassemblyBuffer[addr + 1];
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return (v0 << 8) | v1;
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}
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unsigned int m68k_read_disassembler_32(uint64_t address)
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{
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address -= s_baseAddress;
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uint32_t v0 = s_disassemblyBuffer[address + 0];
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uint32_t v1 = s_disassemblyBuffer[address + 1];
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uint32_t v2 = s_disassemblyBuffer[address + 2];
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uint32_t v3 = s_disassemblyBuffer[address + 3];
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const uint64_t addr = address - s_baseAddress;
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uint32_t v0 = s_disassemblyBuffer[addr + 0];
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uint32_t v1 = s_disassemblyBuffer[addr + 1];
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uint32_t v2 = s_disassemblyBuffer[addr + 2];
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uint32_t v3 = s_disassemblyBuffer[addr + 3];
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return (v0 << 24) | (v1 << 16) | (v2 << 8) | v3;
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}
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uint64_t m68k_read_disassembler_64(uint64_t address)
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uint64_t m68k_read_disassembler_64(const uint64_t address)
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{
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address -= s_baseAddress;
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uint64_t v0 = s_disassemblyBuffer[address + 0];
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uint64_t v1 = s_disassemblyBuffer[address + 1];
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uint64_t v2 = s_disassemblyBuffer[address + 2];
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uint64_t v3 = s_disassemblyBuffer[address + 3];
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uint64_t v4 = s_disassemblyBuffer[address + 4];
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uint64_t v5 = s_disassemblyBuffer[address + 5];
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uint64_t v6 = s_disassemblyBuffer[address + 6];
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uint64_t v7 = s_disassemblyBuffer[address + 7];
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const uint64_t addr = address - s_baseAddress;
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uint64_t v0 = s_disassemblyBuffer[addr + 0];
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uint64_t v1 = s_disassemblyBuffer[addr + 1];
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uint64_t v2 = s_disassemblyBuffer[addr + 2];
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uint64_t v3 = s_disassemblyBuffer[addr + 3];
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uint64_t v4 = s_disassemblyBuffer[addr + 4];
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uint64_t v5 = s_disassemblyBuffer[addr + 5];
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uint64_t v6 = s_disassemblyBuffer[addr + 6];
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uint64_t v7 = s_disassemblyBuffer[addr + 7];
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return (v0 << 56) | (v1 << 48) | (v2 << 40) | (v3 << 32) | (v4 << 24) | (v5 << 16) | (v6 << 8) | v7;
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}
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@ -164,49 +159,34 @@ static void registerPair(SStream* O, const cs_m68k_op* op)
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void printAddressingMode(SStream* O, const cs_m68k* inst, const cs_m68k_op* op)
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{
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switch (op->address_mode)
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{
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switch (op->address_mode) {
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case M68K_AM_NONE:
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{
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switch (op->type)
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{
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switch (op->type) {
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case M68K_OP_REG_BITS:
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{
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registerBits(O, op);
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break;
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}
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case M68K_OP_REG_PAIR:
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{
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registerPair(O, op);
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break;
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}
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case M68K_OP_REG:
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{
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SStream_concat(O, "%s", s_reg_names[op->reg]);
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break;
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}
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default:
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break;
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}
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break;
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}
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case M68K_AM_REG_DIRECT_DATA : SStream_concat(O, "d%d", (op->reg - M68K_REG_D0)); break;
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case M68K_AM_REG_DIRECT_ADDR : SStream_concat(O, "a%d", (op->reg - M68K_REG_A0)); break;
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case M68K_AM_REGI_ADDR : SStream_concat(O, "(a%d)", (op->reg - M68K_REG_A0)); break;
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case M68K_AM_REGI_ADDR_POST_INC : SStream_concat(O, "(a%d)+", (op->reg - M68K_REG_A0)); break;
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case M68K_AM_REGI_ADDR_PRE_DEC : SStream_concat(O, "-(a%d)", (op->reg - M68K_REG_A0)); break;
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case M68K_AM_REGI_ADDR_DISP : SStream_concat(O, "$%x(a%d)", op->mem.disp, (op->reg - M68K_REG_A0)); break;
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case M68K_AM_PCI_DISP : SStream_concat(O, "$%x(pc)", op->mem.disp); break;
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case M68K_AM_ABSOLUTE_DATA_SHORT : SStream_concat(O, "$%x.w", op->imm); break;
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case M68K_AM_ABSOLUTE_DATA_LONG : SStream_concat(O, "$%x.l", op->imm); break;
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case M68K_AM_IMMIDIATE :
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{
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case M68K_AM_REG_DIRECT_DATA: SStream_concat(O, "d%d", (op->reg - M68K_REG_D0)); break;
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case M68K_AM_REG_DIRECT_ADDR: SStream_concat(O, "a%d", (op->reg - M68K_REG_A0)); break;
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case M68K_AM_REGI_ADDR: SStream_concat(O, "(a%d)", (op->reg - M68K_REG_A0)); break;
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case M68K_AM_REGI_ADDR_POST_INC: SStream_concat(O, "(a%d)+", (op->reg - M68K_REG_A0)); break;
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case M68K_AM_REGI_ADDR_PRE_DEC: SStream_concat(O, "-(a%d)", (op->reg - M68K_REG_A0)); break;
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case M68K_AM_REGI_ADDR_DISP: SStream_concat(O, "$%x(a%d)", op->mem.disp, (op->reg - M68K_REG_A0)); break;
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case M68K_AM_PCI_DISP: SStream_concat(O, "$%x(pc)", op->mem.disp); break;
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case M68K_AM_ABSOLUTE_DATA_SHORT: SStream_concat(O, "$%x.w", op->imm); break;
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case M68K_AM_ABSOLUTE_DATA_LONG: SStream_concat(O, "$%x.l", op->imm); break;
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case M68K_AM_IMMIDIATE:
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if (inst->op_size.type == M68K_SIZE_TYPE_FPU) {
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if (inst->op_size.fpu_size == M68K_FPU_SIZE_SINGLE)
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SStream_concat(O, "#%f", op->simm);
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@ -214,29 +194,18 @@ void printAddressingMode(SStream* O, const cs_m68k* inst, const cs_m68k_op* op)
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SStream_concat(O, "#%f", op->dimm);
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else
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SStream_concat(O, "#<unsupported>");
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break;
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}
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SStream_concat(O, "#$%x", op->imm);
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break;
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}
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case M68K_AM_PCI_INDEX_8_BIT_DISP :
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{
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case M68K_AM_PCI_INDEX_8_BIT_DISP:
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SStream_concat(O, "$%x(pc,%s%s)", op->mem.disp, s_spacing, getRegName(op->mem.index_reg));
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break;
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}
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case M68K_AM_AREGI_INDEX_8_BIT_DISP :
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{
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case M68K_AM_AREGI_INDEX_8_BIT_DISP:
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SStream_concat(O, "$%x(%s,%s%s.%c)", op->mem.disp, getRegName(op->mem.base_reg), s_spacing, getRegName(op->mem.index_reg), op->mem.index_size ? 'l' : 'w');
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break;
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}
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case M68K_AM_PCI_INDEX_BASE_DISP :
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case M68K_AM_AREGI_INDEX_BASE_DISP :
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{
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case M68K_AM_PCI_INDEX_BASE_DISP:
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case M68K_AM_AREGI_INDEX_BASE_DISP:
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if (op->mem.in_disp > 0)
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SStream_concat(O, "$%x", op->mem.in_disp);
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@ -247,7 +216,6 @@ void printAddressingMode(SStream* O, const cs_m68k* inst, const cs_m68k_op* op)
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} else {
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if (op->mem.base_reg != M68K_REG_INVALID)
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SStream_concat(O, "a%d,%s", op->mem.base_reg - M68K_REG_A0, s_spacing);
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SStream_concat(O, "%s.%c", getRegName(op->mem.index_reg), op->mem.index_size ? 'l' : 'w');
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}
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@ -255,10 +223,7 @@ void printAddressingMode(SStream* O, const cs_m68k* inst, const cs_m68k_op* op)
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SStream_concat(O, "%s*%s%d)", s_spacing, s_spacing, op->mem.scale);
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else
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SStream_concat(O, ")");
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break;
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}
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// It's ok to just use PCMI here as is as we set base_reg to PC in the disassembler. While this is not strictly correct it makes the code
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// easier and that is what actually happens when the code is executed anyway.
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@ -266,9 +231,7 @@ void printAddressingMode(SStream* O, const cs_m68k* inst, const cs_m68k_op* op)
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case M68K_AM_PC_MEMI_PRE_INDEX:
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case M68K_AM_MEMI_PRE_INDEX:
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case M68K_AM_MEMI_POST_INDEX:
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{
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SStream_concat(O, "([");
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if (op->mem.in_disp > 0)
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SStream_concat(O, "$%x", op->mem.in_disp);
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@ -295,66 +258,56 @@ void printAddressingMode(SStream* O, const cs_m68k* inst, const cs_m68k_op* op)
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SStream_concat(O, ",%s$%x", s_spacing, op->mem.out_disp);
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SStream_concat(O, ")");
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}
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break;
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default:
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break;
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}
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if (op->mem.bitfield)
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SStream_concat(O, "{%d:%d}", op->mem.offset, op->mem.width);
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}
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#endif
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void M68K_printInst(MCInst* MI, SStream* O, void* Info)
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{
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#ifndef CAPSTONE_DIET
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int op_count;
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cs_m68k *info;
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int i = 0;
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cs_detail *detail = MI->flat_insn->detail;
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if (!detail) {
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return;
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}
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cs_m68k* info = &detail->m68k;
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const int op_count = info->op_count;
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info = &detail->m68k;
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op_count = info->op_count;
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if (MI->Opcode == M68K_INS_INVALID) {
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SStream_concat(O, "dc.w $%x", info->operands[0].imm);
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return;
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} else {
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SStream_concat0(O, (char*)s_instruction_names[MI->Opcode]);
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}
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SStream_concat0(O, (char*)s_instruction_names[MI->Opcode]);
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switch (info->op_size.type)
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{
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switch (info->op_size.type) {
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case M68K_SIZE_TYPE_INVALID :
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break;
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case M68K_SIZE_TYPE_CPU :
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{
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switch (info->op_size.cpu_size)
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{
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case M68K_CPU_SIZE_BYTE : SStream_concat0(O, ".b"); break;
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case M68K_CPU_SIZE_WORD : SStream_concat0(O, ".w"); break;
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case M68K_CPU_SIZE_LONG : SStream_concat0(O, ".l"); break;
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case M68K_CPU_SIZE_NONE : break;
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switch (info->op_size.cpu_size) {
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case M68K_CPU_SIZE_BYTE: SStream_concat0(O, ".b"); break;
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case M68K_CPU_SIZE_WORD: SStream_concat0(O, ".w"); break;
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case M68K_CPU_SIZE_LONG: SStream_concat0(O, ".l"); break;
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case M68K_CPU_SIZE_NONE: break;
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}
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break;
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}
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case M68K_SIZE_TYPE_FPU :
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{
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switch (info->op_size.fpu_size)
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{
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case M68K_FPU_SIZE_SINGLE : SStream_concat0(O, ".s"); break;
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case M68K_FPU_SIZE_DOUBLE : SStream_concat0(O, ".d"); break;
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case M68K_FPU_SIZE_EXTENDED : SStream_concat0(O, ".x"); break;
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case M68K_FPU_SIZE_NONE : break;
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switch (info->op_size.fpu_size) {
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case M68K_FPU_SIZE_SINGLE: SStream_concat0(O, ".s"); break;
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case M68K_FPU_SIZE_DOUBLE: SStream_concat0(O, ".d"); break;
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case M68K_FPU_SIZE_EXTENDED: SStream_concat0(O, ".x"); break;
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case M68K_FPU_SIZE_NONE: break;
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}
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break;
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}
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}
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@ -363,23 +316,18 @@ void M68K_printInst(MCInst* MI, SStream* O, void* Info)
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// this one is a bit spacial so we do spacial things
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if (MI->Opcode == M68K_INS_CAS2)
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{
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if (MI->Opcode == M68K_INS_CAS2) {
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int reg_value_0, reg_value_1;
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printAddressingMode(O, info, &info->operands[0]); SStream_concat0(O, ",");
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printAddressingMode(O, info, &info->operands[1]); SStream_concat0(O, ",");
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int reg_value_0 = info->operands[2].register_bits >> 4;
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int reg_value_1 = info->operands[2].register_bits & 0xf;
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reg_value_0 = info->operands[2].register_bits >> 4;
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reg_value_1 = info->operands[2].register_bits & 0xf;
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SStream_concat(O, "(%s):(%s)", s_reg_names[M68K_REG_D0 + reg_value_0], s_reg_names[M68K_REG_D0 + reg_value_1]);
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return;
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}
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for (i = 0; i < op_count; ++i)
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{
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for (i = 0; i < op_count; ++i) {
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printAddressingMode(O, info, &info->operands[i]);
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if ((i + 1) != op_count)
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SStream_concat(O, ",%s", s_spacing);
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}
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@ -389,18 +337,12 @@ void M68K_printInst(MCInst* MI, SStream* O, void* Info)
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bool M68K_getInstruction(csh ud, const uint8_t* code, size_t code_len, MCInst* instr, uint16_t* size, uint64_t address, void* info)
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{
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int s;
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//s_spacing = "";
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int cpu_type = M68K_CPU_TYPE_68000;
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cs_struct* handle = (cs_struct *)(uintptr_t)ud;
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s_disassemblyBuffer = (uint8_t*)code;
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s_baseAddress = (uint32_t)address;
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// Use 000 by default
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int cpu_type = M68K_CPU_TYPE_68000;
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if (handle->mode & CS_MODE_M68K_010)
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cpu_type = M68K_CPU_TYPE_68010;
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if (handle->mode & CS_MODE_M68K_020)
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@ -414,8 +356,7 @@ bool M68K_getInstruction(csh ud, const uint8_t* code, size_t code_len, MCInst* i
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s = m68k_disassemble(instr, address, cpu_type);
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if (s == 0)
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{
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if (s == 0) {
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*size = 2;
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return false;
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}
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@ -439,7 +380,7 @@ bool M68K_getInstruction(csh ud, const uint8_t* code, size_t code_len, MCInst* i
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const char* M68K_reg_name(csh handle, unsigned int reg)
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{
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#ifdef CAPSTONE_DIET
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return 0;
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return NULL;
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#else
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return s_reg_names[(int)reg];
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#endif
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@ -453,7 +394,7 @@ void M68K_get_insn_id(cs_struct* h, cs_insn* insn, unsigned int id)
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const char* M68K_insn_name(csh handle, unsigned int id)
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{
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#ifdef CAPSTONE_DIET
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return 0;
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return NULL;
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#else
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return s_instruction_names[id];
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#endif
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@ -461,6 +402,7 @@ const char* M68K_insn_name(csh handle, unsigned int id)
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const char* M68K_group_name(csh handle, unsigned int id)
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{
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return 0;
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// TODO: Implement group names in m68k
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return NULL;
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}
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