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Merge pull request #1934 from frida/fix/custom-allocator-regressions

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Fix regressions in custom memory allocator support
This commit is contained in:
Wu ChenXu 2022-11-24 18:35:19 +08:00 committed by GitHub
commit a7e325389b
2 changed files with 4 additions and 5 deletions
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5
arch/AArch64/AArch64Disassembler.c
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@ -264,8 +264,8 @@ static DecodeStatus _getInstruction(cs_struct *ud, MCInst *MI,
// Init new MCOperand to be used in switch below.
// Kind RegVal set inside a case when needed.
MCOperand *Op;
Op = malloc(sizeof(MCOperand));
MCOperand op_storage;
MCOperand *Op = &op_storage;
switch (MCInst_getOpcode(MI)) {
default:
break;
@ -342,7 +342,6 @@ static DecodeStatus _getInstruction(cs_struct *ud, MCInst *MI,
MCInst_addOperand2(MI, Op);
break;
}
free(Op);
if (result != MCDisassembler_Fail) {
*Size = 4;

4
arch/AArch64/AArch64InstPrinter.c
View File

@ -2485,7 +2485,7 @@ static void printMatrixTileVector(MCInst *MI, unsigned OpNum, SStream *O, bool I
const size_t strLn = strlen(RegName);
// +2 for extra chars, + 1 for null char \0
char *RegNameNew = malloc(sizeof(char) * (strLn + 2 + 1));
char *RegNameNew = cs_mem_malloc(sizeof(char) * (strLn + 2 + 1));
int index = 0, i;
for (i = 0; i < (strLn + 2); i++){
if(RegName[i] != '.'){
@ -2513,7 +2513,7 @@ static void printMatrixTileVector(MCInst *MI, unsigned OpNum, SStream *O, bool I
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = Reg;
MI->flat_insn->detail->arm64.op_count++;
}
free(RegNameNew);
cs_mem_free(RegNameNew);
}
static const unsigned MatrixZADRegisterTable[] = {