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https://github.com/capstone-engine/capstone.git
synced 2024-11-24 22:19:43 +00:00
m68k: cleanup & code style
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parent
f5cc222d2e
commit
ac63d5b995
@ -19,8 +19,7 @@
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static const char* s_spacing = " ";
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static const char* s_reg_names[] =
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{
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static const char* s_reg_names[] = {
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"invalid",
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"d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7",
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"a0", "a1", "a2", "a3", "a4", "a5", "a6", "a7",
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@ -116,8 +115,7 @@ static void printRegbitsRange(char* buffer, uint32_t data, const char* prefix)
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unsigned int run_length = 0;
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int i;
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for (i = 0; i < 8; ++i)
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{
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for (i = 0; i < 8; ++i) {
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if (data & (1 << i)) {
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first = i;
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run_length = 0;
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@ -154,7 +152,7 @@ static void registerBits(SStream* O, const cs_m68k_op* op)
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static void registerPair(SStream* O, const cs_m68k_op* op)
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{
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SStream_concat(O, "%s:%s", s_reg_names[M68K_REG_D0 + (op->register_bits >> 4)],
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s_reg_names[M68K_REG_D0 + (op->register_bits & 0xf)]);
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s_reg_names[M68K_REG_D0 + (op->register_bits & 0xf)]);
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}
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void printAddressingMode(SStream* O, const cs_m68k* inst, const cs_m68k_op* op)
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@ -186,80 +184,80 @@ void printAddressingMode(SStream* O, const cs_m68k* inst, const cs_m68k_op* op)
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case M68K_AM_ABSOLUTE_DATA_SHORT: SStream_concat(O, "$%x.w", op->imm); break;
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case M68K_AM_ABSOLUTE_DATA_LONG: SStream_concat(O, "$%x.l", op->imm); break;
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case M68K_AM_IMMIDIATE:
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if (inst->op_size.type == M68K_SIZE_TYPE_FPU) {
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if (inst->op_size.fpu_size == M68K_FPU_SIZE_SINGLE)
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SStream_concat(O, "#%f", op->simm);
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else if (inst->op_size.fpu_size == M68K_FPU_SIZE_DOUBLE)
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SStream_concat(O, "#%f", op->dimm);
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else
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SStream_concat(O, "#<unsupported>");
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break;
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}
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SStream_concat(O, "#$%x", op->imm);
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break;
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if (inst->op_size.type == M68K_SIZE_TYPE_FPU) {
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if (inst->op_size.fpu_size == M68K_FPU_SIZE_SINGLE)
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SStream_concat(O, "#%f", op->simm);
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else if (inst->op_size.fpu_size == M68K_FPU_SIZE_DOUBLE)
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SStream_concat(O, "#%f", op->dimm);
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else
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SStream_concat(O, "#<unsupported>");
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break;
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}
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SStream_concat(O, "#$%x", op->imm);
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break;
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case M68K_AM_PCI_INDEX_8_BIT_DISP:
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SStream_concat(O, "$%x(pc,%s%s)", op->mem.disp, s_spacing, getRegName(op->mem.index_reg));
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break;
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SStream_concat(O, "$%x(pc,%s%s)", op->mem.disp, s_spacing, getRegName(op->mem.index_reg));
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break;
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case M68K_AM_AREGI_INDEX_8_BIT_DISP:
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SStream_concat(O, "$%x(%s,%s%s.%c)", op->mem.disp, getRegName(op->mem.base_reg), s_spacing, getRegName(op->mem.index_reg), op->mem.index_size ? 'l' : 'w');
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break;
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SStream_concat(O, "$%x(%s,%s%s.%c)", op->mem.disp, getRegName(op->mem.base_reg), s_spacing, getRegName(op->mem.index_reg), op->mem.index_size ? 'l' : 'w');
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break;
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case M68K_AM_PCI_INDEX_BASE_DISP:
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case M68K_AM_AREGI_INDEX_BASE_DISP:
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if (op->mem.in_disp > 0)
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SStream_concat(O, "$%x", op->mem.in_disp);
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if (op->mem.in_disp > 0)
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SStream_concat(O, "$%x", op->mem.in_disp);
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SStream_concat(O, "(");
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SStream_concat(O, "(");
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if (op->address_mode == M68K_AM_PCI_INDEX_BASE_DISP) {
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SStream_concat(O, "pc,%s%s.%c", getRegName(op->mem.index_reg), s_spacing, op->mem.index_size ? 'l' : 'w');
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} else {
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if (op->mem.base_reg != M68K_REG_INVALID)
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SStream_concat(O, "a%d,%s", op->mem.base_reg - M68K_REG_A0, s_spacing);
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SStream_concat(O, "%s.%c", getRegName(op->mem.index_reg), op->mem.index_size ? 'l' : 'w');
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}
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if (op->address_mode == M68K_AM_PCI_INDEX_BASE_DISP) {
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SStream_concat(O, "pc,%s%s.%c", getRegName(op->mem.index_reg), s_spacing, op->mem.index_size ? 'l' : 'w');
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} else {
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if (op->mem.base_reg != M68K_REG_INVALID)
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SStream_concat(O, "a%d,%s", op->mem.base_reg - M68K_REG_A0, s_spacing);
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SStream_concat(O, "%s.%c", getRegName(op->mem.index_reg), op->mem.index_size ? 'l' : 'w');
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}
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if (op->mem.scale > 0)
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SStream_concat(O, "%s*%s%d)", s_spacing, s_spacing, op->mem.scale);
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else
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SStream_concat(O, ")");
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break;
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// It's ok to just use PCMI here as is as we set base_reg to PC in the disassembler. While this is not strictly correct it makes the code
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// easier and that is what actually happens when the code is executed anyway.
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if (op->mem.scale > 0)
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SStream_concat(O, "%s*%s%d)", s_spacing, s_spacing, op->mem.scale);
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else
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SStream_concat(O, ")");
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break;
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// It's ok to just use PCMI here as is as we set base_reg to PC in the disassembler. While this is not strictly correct it makes the code
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// easier and that is what actually happens when the code is executed anyway.
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case M68K_AM_PC_MEMI_POST_INDEX:
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case M68K_AM_PC_MEMI_PRE_INDEX:
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case M68K_AM_MEMI_PRE_INDEX:
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case M68K_AM_MEMI_POST_INDEX:
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SStream_concat(O, "([");
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if (op->mem.in_disp > 0)
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SStream_concat(O, "$%x", op->mem.in_disp);
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SStream_concat(O, "([");
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if (op->mem.in_disp > 0)
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SStream_concat(O, "$%x", op->mem.in_disp);
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if (op->mem.base_reg != M68K_REG_INVALID) {
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if (op->mem.in_disp > 0)
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SStream_concat(O, ",%s%s", s_spacing, getRegName(op->mem.base_reg));
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else
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SStream_concat(O, "%s", getRegName(op->mem.base_reg));
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}
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if (op->mem.base_reg != M68K_REG_INVALID) {
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if (op->mem.in_disp > 0)
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SStream_concat(O, ",%s%s", s_spacing, getRegName(op->mem.base_reg));
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else
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SStream_concat(O, "%s", getRegName(op->mem.base_reg));
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}
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if (op->address_mode == M68K_AM_MEMI_POST_INDEX || op->address_mode == M68K_AM_PC_MEMI_POST_INDEX)
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SStream_concat(O, "]");
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if (op->address_mode == M68K_AM_MEMI_POST_INDEX || op->address_mode == M68K_AM_PC_MEMI_POST_INDEX)
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SStream_concat(O, "]");
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if (op->mem.index_reg != M68K_REG_INVALID)
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SStream_concat(O, ",%s%s.%c", s_spacing, getRegName(op->mem.index_reg), op->mem.index_size ? 'l' : 'w');
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if (op->mem.index_reg != M68K_REG_INVALID)
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SStream_concat(O, ",%s%s.%c", s_spacing, getRegName(op->mem.index_reg), op->mem.index_size ? 'l' : 'w');
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if (op->mem.scale > 0)
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SStream_concat(O, "%s*%s%d", s_spacing, s_spacing, op->mem.scale);
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if (op->mem.scale > 0)
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SStream_concat(O, "%s*%s%d", s_spacing, s_spacing, op->mem.scale);
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if (op->address_mode == M68K_AM_MEMI_PRE_INDEX || op->address_mode == M68K_AM_PC_MEMI_PRE_INDEX)
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SStream_concat(O, "]");
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if (op->address_mode == M68K_AM_MEMI_PRE_INDEX || op->address_mode == M68K_AM_PC_MEMI_PRE_INDEX)
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SStream_concat(O, "]");
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if (op->mem.out_disp > 0)
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SStream_concat(O, ",%s$%x", s_spacing, op->mem.out_disp);
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if (op->mem.out_disp > 0)
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SStream_concat(O, ",%s$%x", s_spacing, op->mem.out_disp);
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SStream_concat(O, ")");
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break;
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SStream_concat(O, ")");
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break;
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default:
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break;
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break;
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}
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if (op->mem.bitfield)
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SStream_concat(O, "{%d:%d}", op->mem.offset, op->mem.width);
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@ -277,6 +275,7 @@ void M68K_printInst(MCInst* MI, SStream* O, void* Info)
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if (!detail) {
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return;
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}
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info = &detail->m68k;
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op_count = info->op_count;
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@ -27,8 +27,6 @@
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* THE SOFTWARE.
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*/
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#ifndef M68KCONF__HEADER
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#define M68KCONF__HEADER
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@ -179,9 +177,4 @@
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#endif /* M68K_COMPILE_FOR_MAME */
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/* ======================================================================== */
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/* ============================== END OF FILE ============================= */
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/* ======================================================================== */
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#endif /* M68KCONF__HEADER */
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File diff suppressed because it is too large
Load Diff
@ -78,8 +78,7 @@
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/* CPU types for use in m68k_set_cpu_type() */
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enum
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{
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enum {
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M68K_CPU_TYPE_INVALID,
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M68K_CPU_TYPE_68000,
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M68K_CPU_TYPE_68010,
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@ -357,9 +356,4 @@ unsigned int m68k_disassemble(MCInst* inst, unsigned int pc, unsigned int cpu_ty
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//#include "m68kmame.h"
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#endif /* M68K_COMPILE_FOR_MAME */
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/* ======================================================================== */
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/* ============================== END OF FILE ============================= */
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/* ======================================================================== */
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#endif /* M68K__HEADER */
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@ -2,7 +2,7 @@
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#define CAPSTONE_68K_H
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/* Capstone Disassembly Engine */
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/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2014 */
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/* By Daniel Collin <daniel@collin.com>, 2015 */
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#ifdef __cplusplus
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extern "C" {
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@ -14,9 +14,9 @@ extern "C" {
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#ifdef _MSC_VER
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#pragma warning(disable:4201)
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#endif
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#define M68K_OPERAND_COUNT 4
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//> M68K registers and special registers
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typedef enum m68k_reg {
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M68K_REG_INVALID = 0,
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@ -578,4 +578,3 @@ typedef enum m68k_insn {
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#endif
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#endif
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