Merge pull request #1960 from Rot127/sh-build-warnings

[SH] Fix build warnings
This commit is contained in:
Wu ChenXu 2023-04-06 18:01:54 +08:00 committed by GitHub
commit b3c9068bcb
4 changed files with 7 additions and 37 deletions

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@ -25,6 +25,13 @@ project(capstone
VERSION 5.0
)
if (MSVC)
add_compile_options(/W1 /w14189 /w16268)
else()
add_compile_options(-Wunused-function -Warray-bounds -Wunused-variable -Wparentheses -Wint-in-bool-context)
endif()
# to configure the options specify them in in the command line or change them in the cmake UI.
# Don't edit the makefile!
option(BUILD_SHARED_LIBS "Build shared library" OFF)

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@ -374,7 +374,6 @@ static bool op0xx8(uint16_t code, uint64_t address, MCInst *MI, cs_mode mode,
{-1, SH_INS_INVALID, ISA_ALL, none},
};
int lvl = isalevel(mode);
sh_insn insn = lookup_insn(list, insn_code, mode);
if (code & 0x0f00)
return MCDisassembler_Fail;
@ -564,13 +563,6 @@ static bool opMOV_rpd(uint16_t code, uint64_t address, MCInst *MI,
return MCDisassembler_Success;
}
static bool opDIV0U(uint16_t code, uint64_t address, MCInst *MI, cs_mode mode,
sh_info *info, cs_detail *detail)
{
MCInst_setOpcode(MI, SH_INS_DIV0U);
return MCDisassembler_Success;
}
opRR(ISA_ALL, TST, 0)
opRR(ISA_ALL, AND, 0)
opRR(ISA_ALL, XOR, 0)
@ -737,8 +729,6 @@ static bool op4xx5(uint16_t code, uint64_t address, MCInst *MI, cs_mode mode,
sh_info *info, cs_detail *detail)
{
int r = (code >> 8) & 0x0f;
uint16_t *regs;
uint8_t *count;
enum direction rw;
static const struct ri_list list[] = {
{0, SH_INS_ROTR, ISA_ALL, none},
@ -1137,7 +1127,6 @@ opLDRSE(LDRE)
static bool op##insn##_i(uint16_t code, uint64_t address, MCInst *MI, \
cs_mode mode, sh_info *info, cs_detail *detail) \
{ \
int dsp = code & 0x00ff; \
MCInst_setOpcode(MI, SH_INS_##insn); \
set_imm(info, 0, code & 0xff); \
set_reg(info, SH_REG_R0, write, detail); \
@ -1153,7 +1142,6 @@ opImmR0(OR)
static bool op##insn##_B(uint16_t code, uint64_t address, MCInst *MI, \
cs_mode mode, sh_info *info, cs_detail *detail) \
{ \
int dsp = code & 0x00ff; \
MCInst_setOpcode(MI, SH_INS_##insn); \
set_imm(info, 0, code & 0xff); \
set_mem(info, SH_OP_MEM_GBR_R0, SH_REG_R0, 0, 8, detail); \
@ -1233,21 +1221,6 @@ static bool opMOVA(uint16_t code, uint64_t address, MCInst *MI, cs_mode mode,
return MCDisassembler_Success;
}
static bool opc8xx(uint16_t code, uint64_t address, MCInst *MI, cs_mode mode,
sh_info *info, cs_detail *detail)
{
int imm = (code & 0x00ff);
sh_insn insn[] = {SH_INS_TST, SH_INS_AND, SH_INS_XOR, SH_INS_OR};
MCInst_setOpcode(MI, insn[(code >> 8) & 3]);
set_imm(info, 1, imm);
if (code & 0x0400) {
set_mem(info, SH_OP_MEM_GBR_R0, SH_REG_INVALID, 0, 8, detail);
} else {
set_reg(info, SH_REG_R0, write, detail);
}
return MCDisassembler_Success;
}
static bool opMOV_i(uint16_t code, uint64_t address, MCInst *MI, cs_mode mode,
sh_info *info, cs_detail *detail)
{
@ -1609,7 +1582,6 @@ static bool set_dsp_move_d(sh_info *info, int xy, uint16_t code, cs_mode mode, c
int a;
int d;
int dir;
int sz;
int op;
static const sh_reg base[] = {SH_REG_DSP_A0, SH_REG_DSP_X0};
switch (xy) {
@ -1824,7 +1796,6 @@ static bool dsp_op_cc0_2opr(uint32_t code, sh_info *info, sh_insn insn,
static bool decode_dsp_3op(const uint32_t code, sh_info *info,
cs_detail *detail)
{
int r;
int cc = (code >> 8) & 3;
int sx = (code >> 6) & 3;
int sy = (code >> 4) & 3;
@ -2052,8 +2023,6 @@ static bool decode_dsp_3op(const uint32_t code, sh_info *info,
static bool decode_dsp_p(const uint32_t code, MCInst *MI, cs_mode mode,
sh_info *info, cs_detail *detail)
{
bool ret;
int dz = code & 0x0f;
MCInst_setOpcode(MI, SH_INS_DSP);
if (!decode_dsp_d(code >> 16, MI, mode, info, detail))

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@ -351,7 +351,6 @@ void SH_printInst(MCInst* MI, SStream* O, void* PrinterInfo)
{
#ifndef CAPSTONE_DIET
sh_info *info = (sh_info *)PrinterInfo;
cs_detail *detail = MI->flat_insn->detail;
int i;
int imm;

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@ -37,10 +37,6 @@ static void print_string_hex_short(unsigned char *str, size_t len)
printf("%02x", *c & 0xff);
}
static const char *s_access[] = {
"UNCHANGED", "READ", "WRITE", "READ | WRITE",
};
static void print_read_write_regs(csh handle, cs_detail *detail)
{
int i;
@ -89,7 +85,6 @@ static void print_insn_detail(csh handle, cs_insn *insn)
for (i = 0; i < sh->op_count; i++) {
cs_sh_op *op = &(sh->operands[i]);
const char *comment;
switch ((int)op->type) {
default: