From b42a6578734fbb8465ff13e9b19e45259e15f08d Mon Sep 17 00:00:00 2001 From: Nguyen Anh Quynh Date: Fri, 29 Nov 2013 17:40:07 +0800 Subject: [PATCH] change cs_disasm() and cs_disasm_dyn() to be portable API. fix related code using these API --- arch/AArch64/AArch64Disassembler.c | 8 ++--- arch/AArch64/AArch64Disassembler.h | 4 +-- arch/ARM/ARMDisassembler.c | 16 +++++----- arch/ARM/ARMDisassembler.h | 4 +-- arch/ARM/ARMGenDisassemblerTables.inc | 2 +- arch/ARM/ARMInstPrinter.c | 6 ++-- arch/Mips/MipsDisassembler.c | 16 +++++----- arch/Mips/MipsDisassembler.h | 8 ++--- arch/X86/X86Disassembler.c | 4 +-- arch/X86/X86Disassembler.h | 4 +-- cs.c | 10 +++---- cs_priv.h | 2 +- include/arm.h | 4 +-- include/capstone.h | 20 ++++++------- tests/test.c | 42 +++++++++++++-------------- tests/test_arm.c | 34 +++++++++++----------- tests/test_arm64.c | 22 +++++++------- tests/test_detail.c | 42 +++++++++++++-------------- tests/test_mips.c | 22 +++++++------- tests/test_x86.c | 32 ++++++++++---------- 20 files changed, 151 insertions(+), 151 deletions(-) diff --git a/arch/AArch64/AArch64Disassembler.c b/arch/AArch64/AArch64Disassembler.c index 97a247948..e9e883db2 100644 --- a/arch/AArch64/AArch64Disassembler.c +++ b/arch/AArch64/AArch64Disassembler.c @@ -226,9 +226,9 @@ void AArch64_init(MCRegisterInfo *MRI) static DecodeStatus _getInstruction(MCInst *MI, - unsigned char *code, uint64_t code_len, + unsigned char *code, size_t code_len, uint16_t *Size, - uint64_t Address, MCRegisterInfo *MRI) + size_t Address, MCRegisterInfo *MRI) { if (code_len < 4) { // not enough data @@ -254,10 +254,10 @@ static DecodeStatus _getInstruction(MCInst *MI, return MCDisassembler_Fail; } -bool AArch64_getInstruction(csh ud, char *code, uint64_t code_len, MCInst *instr, uint16_t *size, uint64_t address, void *info) +bool AArch64_getInstruction(csh ud, unsigned char *code, size_t code_len, MCInst *instr, uint16_t *size, size_t address, void *info) { DecodeStatus status = _getInstruction(instr, - (unsigned char *)code, code_len, + code, code_len, size, address, (MCRegisterInfo *)info); diff --git a/arch/AArch64/AArch64Disassembler.h b/arch/AArch64/AArch64Disassembler.h index b1e07678f..5490c6b3e 100644 --- a/arch/AArch64/AArch64Disassembler.h +++ b/arch/AArch64/AArch64Disassembler.h @@ -12,8 +12,8 @@ void AArch64_init(MCRegisterInfo *MRI); -bool AArch64_getInstruction(csh ud, char *code, uint64_t code_len, - MCInst *instr, uint16_t *size, uint64_t address, void *info); +bool AArch64_getInstruction(csh ud, unsigned char *code, size_t code_len, + MCInst *instr, uint16_t *size, size_t address, void *info); #endif diff --git a/arch/ARM/ARMDisassembler.c b/arch/ARM/ARMDisassembler.c index 5b3900f05..d86a52e61 100644 --- a/arch/ARM/ARMDisassembler.c +++ b/arch/ARM/ARMDisassembler.c @@ -422,8 +422,8 @@ void ARM_init(MCRegisterInfo *MRI) 0); } -static DecodeStatus _ARM_getInstruction(MCInst *MI, char *code, uint64_t code_len, - uint16_t *Size, uint64_t Address) +static DecodeStatus _ARM_getInstruction(MCInst *MI, unsigned char *code, size_t code_len, + uint16_t *Size, size_t Address) { uint8_t bytes[4]; @@ -644,8 +644,8 @@ static void UpdateThumbVFPPredicate(MCInst *MI) } } -static DecodeStatus _Thumb_getInstruction(MCInst *MI, char *code, uint64_t code_len, - uint16_t *Size, uint64_t Address) +static DecodeStatus _Thumb_getInstruction(MCInst *MI, unsigned char *code, size_t code_len, + uint16_t *Size, size_t Address) { uint8_t bytes[4]; @@ -821,8 +821,8 @@ static DecodeStatus _Thumb_getInstruction(MCInst *MI, char *code, uint64_t code_ return MCDisassembler_Fail; } -bool Thumb_getInstruction(csh ud, char *code, uint64_t code_len, MCInst *instr, - uint16_t *size, uint64_t address, void *info) +bool Thumb_getInstruction(csh ud, unsigned char *code, size_t code_len, MCInst *instr, + uint16_t *size, size_t address, void *info) { //cs_struct *handle = (cs_struct *)ud; DecodeStatus status = _Thumb_getInstruction(instr, code, code_len, size, address); @@ -830,8 +830,8 @@ bool Thumb_getInstruction(csh ud, char *code, uint64_t code_len, MCInst *instr, return status == MCDisassembler_Success; } -bool ARM_getInstruction(csh ud, char *code, uint64_t code_len, MCInst *instr, - uint16_t *size, uint64_t address, void *info) +bool ARM_getInstruction(csh ud, unsigned char *code, size_t code_len, MCInst *instr, + uint16_t *size, size_t address, void *info) { //cs_struct *handle = (cs_struct *)ud; DecodeStatus status = _ARM_getInstruction(instr, code, code_len, size, address); diff --git a/arch/ARM/ARMDisassembler.h b/arch/ARM/ARMDisassembler.h index ab604bda2..eb466a3f8 100644 --- a/arch/ARM/ARMDisassembler.h +++ b/arch/ARM/ARMDisassembler.h @@ -9,8 +9,8 @@ void ARM_init(MCRegisterInfo *MRI); -bool ARM_getInstruction(csh handle, char *code, uint64_t code_len, MCInst *instr, uint16_t *size, uint64_t address, void *info); +bool ARM_getInstruction(csh handle, unsigned char *code, size_t code_len, MCInst *instr, uint16_t *size, size_t address, void *info); -bool Thumb_getInstruction(csh handle, char *code, uint64_t code_len, MCInst *instr, uint16_t *size, uint64_t address, void *info); +bool Thumb_getInstruction(csh handle, unsigned char *code, size_t code_len, MCInst *instr, uint16_t *size, size_t address, void *info); #endif diff --git a/arch/ARM/ARMGenDisassemblerTables.inc b/arch/ARM/ARMGenDisassemblerTables.inc index 668064a56..d4b1f14d0 100644 --- a/arch/ARM/ARMGenDisassemblerTables.inc +++ b/arch/ARM/ARMGenDisassemblerTables.inc @@ -13448,7 +13448,7 @@ DecodeToMCInst(decodeToMCInst_4, fieldFromInstruction_4, uint32_t) #define DecodeInstruction(fname, fieldname, decoder, InsnType) \ static DecodeStatus fname(const uint8_t DecodeTable[], MCInst *MI, \ - InsnType insn, uint64_t Address, \ + InsnType insn, size_t Address, \ int feature) \ { \ uint64_t Bits = ARM_getFeatureBits(feature); \ diff --git a/arch/ARM/ARMInstPrinter.c b/arch/ARM/ARMInstPrinter.c index 76f894e97..f08d9f54f 100644 --- a/arch/ARM/ARMInstPrinter.c +++ b/arch/ARM/ARMInstPrinter.c @@ -163,7 +163,7 @@ static void printRegImmShift(MCInst *MI, SStream *O, ARM_AM_ShiftOpc ShOpc, //assert (!(ShOpc == ARM_AM_ror && !ShImm) && "Cannot have ror #0"); SStream_concat(O, ARM_AM_getShiftOpcStr(ShOpc)); - MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count - 1].shift.type = ShOpc; + MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count - 1].shift.type = (arm_shifter)ShOpc; if (ShOpc != ARM_AM_rrx) { SStream_concat(O, " "); @@ -342,7 +342,7 @@ void ARM_printInst(MCInst *MI, SStream *O, void *Info) SStream_concat(O, ", %s", markup("")); - MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count - 1].shift.type = ARM_AM_getSORegShOp(MCOperand_getImm(MO2)); + MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count - 1].shift.type = (arm_shifter)ARM_AM_getSORegShOp(MCOperand_getImm(MO2)); MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count - 1].shift.value = translateShiftImm(getSORegOffset(MCOperand_getImm(MO2))); return; } @@ -622,7 +622,7 @@ static void printAM2PreOrOffsetIndexOp(MCInst *MI, unsigned Op, SStream *O) if (getAM2Offset(MCOperand_getImm(MO3))) { // Don't print +0. SStream_concat(O, ", %s", markup("pub_insn.arm.operands[MI->pub_insn.arm.op_count].shift.type = getAM2Op(MCOperand_getImm(MO3)); + MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].shift.type = (arm_shifter)getAM2Op(MCOperand_getImm(MO3)); MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].shift.value = getAM2Offset(MCOperand_getImm(MO3)); SStream_concat(O, markup(">")); } diff --git a/arch/Mips/MipsDisassembler.c b/arch/Mips/MipsDisassembler.c index 794363274..e6a8cd48d 100644 --- a/arch/Mips/MipsDisassembler.c +++ b/arch/Mips/MipsDisassembler.c @@ -243,9 +243,9 @@ static DecodeStatus readInstruction32(unsigned char *code, uint32_t *insn, bool } static DecodeStatus MipsDisassembler_getInstruction(int mode, MCInst *instr, - char *code, uint64_t code_len, + unsigned char *code, size_t code_len, uint16_t *Size, - uint64_t Address, bool isBigEndian, MCRegisterInfo *MRI, + size_t Address, bool isBigEndian, MCRegisterInfo *MRI, bool isMicroMips) { uint32_t Insn; @@ -279,8 +279,8 @@ static DecodeStatus MipsDisassembler_getInstruction(int mode, MCInst *instr, return MCDisassembler_Fail; } -bool Mips_getInstruction(csh ud, char *code, uint64_t code_len, MCInst *instr, - uint16_t *size, uint64_t address, void *info) +bool Mips_getInstruction(csh ud, unsigned char *code, size_t code_len, MCInst *instr, + uint16_t *size, size_t address, void *info) { cs_struct *handle = (cs_struct *)(uintptr_t)ud; @@ -294,9 +294,9 @@ bool Mips_getInstruction(csh ud, char *code, uint64_t code_len, MCInst *instr, } static DecodeStatus Mips64Disassembler_getInstruction(int mode, MCInst *instr, - char *code, uint64_t code_len, + unsigned char *code, size_t code_len, uint16_t *Size, - uint64_t Address, bool isBigEndian, MCRegisterInfo *MRI) + size_t Address, bool isBigEndian, MCRegisterInfo *MRI) { uint32_t Insn; @@ -320,8 +320,8 @@ static DecodeStatus Mips64Disassembler_getInstruction(int mode, MCInst *instr, return MCDisassembler_Fail; } -bool Mips64_getInstruction(csh ud, char *code, uint64_t code_len, MCInst *instr, - uint16_t *size, uint64_t address, void *info) +bool Mips64_getInstruction(csh ud, unsigned char *code, size_t code_len, MCInst *instr, + uint16_t *size, size_t address, void *info) { cs_struct *handle = (cs_struct *)(uintptr_t)ud; diff --git a/arch/Mips/MipsDisassembler.h b/arch/Mips/MipsDisassembler.h index 04089202f..850023cb7 100644 --- a/arch/Mips/MipsDisassembler.h +++ b/arch/Mips/MipsDisassembler.h @@ -11,10 +11,10 @@ void Mips_init(MCRegisterInfo *MRI); -bool Mips_getInstruction(csh handle, char *code, uint64_t code_len, - MCInst *instr, uint16_t *size, uint64_t address, void *info); +bool Mips_getInstruction(csh handle, unsigned char *code, size_t code_len, + MCInst *instr, uint16_t *size, size_t address, void *info); -bool Mips64_getInstruction(csh handle, char *code, uint64_t code_len, - MCInst *instr, uint16_t *size, uint64_t address, void *info); +bool Mips64_getInstruction(csh handle, unsigned char *code, size_t code_len, + MCInst *instr, uint16_t *size, size_t address, void *info); #endif diff --git a/arch/X86/X86Disassembler.c b/arch/X86/X86Disassembler.c index 2ba22a39a..6663ac48f 100644 --- a/arch/X86/X86Disassembler.c +++ b/arch/X86/X86Disassembler.c @@ -35,7 +35,7 @@ #include "X86GenInstrInfo.inc" struct reader_info { - char *code; + unsigned char *code; uint64_t size; uint64_t offset; }; @@ -611,7 +611,7 @@ static void update_pub_insn(cs_insn *pub, InternalInstruction *inter) } // Public interface for the disassembler -bool X86_getInstruction(csh ud, char *code, uint64_t code_len, MCInst *instr, uint16_t *size, uint64_t address, void *_info) +bool X86_getInstruction(csh ud, unsigned char *code, size_t code_len, MCInst *instr, uint16_t *size, size_t address, void *_info) { cs_struct *handle = (cs_struct *)(uintptr_t)ud; InternalInstruction insn; diff --git a/arch/X86/X86Disassembler.h b/arch/X86/X86Disassembler.h index c0cc1ca21..aadf0d11f 100644 --- a/arch/X86/X86Disassembler.h +++ b/arch/X86/X86Disassembler.h @@ -95,7 +95,7 @@ #undef INSTRUCTION_SPECIFIER_FIELDS #undef INSTRUCTION_IDS -bool X86_getInstruction(csh handle, char *code, uint64_t code_len, - MCInst *instr, uint16_t *size, uint64_t address, void *info); +bool X86_getInstruction(csh handle, unsigned char *code, size_t code_len, + MCInst *instr, uint16_t *size, size_t address, void *info); #endif diff --git a/cs.c b/cs.c index 31fb548d4..7cc352896 100644 --- a/cs.c +++ b/cs.c @@ -189,12 +189,12 @@ static void fill_insn(cs_struct *handle, cs_insn *insn, char *buffer, MCInst *mc insn->mnemonic[sizeof(insn->mnemonic) - 1] = '\0'; } -uint64_t cs_disasm(csh ud, char *buffer, uint64_t size, uint64_t offset, uint64_t count, cs_insn *insn) +size_t cs_disasm(csh ud, unsigned char *buffer, size_t size, size_t offset, size_t count, cs_insn *insn) { cs_struct *handle = (cs_struct *)(uintptr_t)ud; MCInst mci; uint16_t insn_size; - uint64_t c = 0; + size_t c = 0; if (!handle) { // FIXME: handle this case? @@ -238,15 +238,15 @@ uint64_t cs_disasm(csh ud, char *buffer, uint64_t size, uint64_t offset, uint64_ // dynamicly allocate memory to contain disasm insn // NOTE: caller must free() the allocated memory itself to avoid memory leaking -uint64_t cs_disasm_dyn(csh ud, char *buffer, uint64_t size, uint64_t offset, uint64_t count, cs_insn **insn) +size_t cs_disasm_dyn(csh ud, unsigned char *buffer, size_t size, size_t offset, size_t count, cs_insn **insn) { cs_struct *handle = (cs_struct *)(uintptr_t)ud; MCInst mci; uint16_t insn_size; - uint64_t c = 0, f = 0; + size_t c = 0, f = 0; cs_insn insn_cache[64]; void *total = NULL; - uint64_t total_size = 0; + size_t total_size = 0; if (!handle) { // FIXME: how to handle this case: diff --git a/cs_priv.h b/cs_priv.h index 441d31724..32e03f5f7 100644 --- a/cs_priv.h +++ b/cs_priv.h @@ -15,7 +15,7 @@ typedef void (*Printer_t)(MCInst *MI, SStream *OS, void *info); // this is the best time to gather insn's characteristics typedef void (*PostPrinter_t)(unsigned int insn, cs_insn *, char *mnem); -typedef bool (*Disasm_t)(csh handle, char *code, uint64_t code_len, MCInst *instr, uint16_t *size, uint64_t address, void *info); +typedef bool (*Disasm_t)(csh handle, unsigned char *code, size_t code_len, MCInst *instr, uint16_t *size, size_t address, void *info); typedef char *(*GetName_t)(unsigned int reg); diff --git a/include/arm.h b/include/arm.h index 64ccf5cf2..27cad9552 100644 --- a/include/arm.h +++ b/include/arm.h @@ -62,7 +62,7 @@ typedef struct arm_op_mem { unsigned int base; // base register unsigned int index; // index register int scale; // scale for index register (can be 1, or -1) - int64_t disp; // displacement/offset value + int disp; // displacement/offset value } arm_op_mem; // Instruction operand @@ -74,7 +74,7 @@ typedef struct cs_arm_op { arm_op_type type; // operand type union { unsigned int reg; // register value for REG operand - int64_t imm; // immediate value for C-IMM, P-IMM or IMM operand + unsigned int imm; // immediate value for C-IMM, P-IMM or IMM operand double fp; // floating point value for FP operand arm_op_mem mem; // base/index/scale/disp value for MEM operand }; diff --git a/include/capstone.h b/include/capstone.h index a842c1e8e..f6df708ca 100644 --- a/include/capstone.h +++ b/include/capstone.h @@ -12,7 +12,7 @@ extern "C" { #include // Handle using with all API -typedef uint64_t csh; +typedef size_t csh; // Architecture type typedef enum cs_arch { @@ -52,7 +52,7 @@ typedef struct cs_insn { unsigned int id; // Offset address of this instruction - uint64_t address; + size_t address; // Size of this instruction uint16_t size; @@ -144,10 +144,10 @@ cs_err cs_errno(csh handle); @return: the number of succesfully disassembled instructions, or 0 if this function failed to disassemble the given code */ -uint64_t cs_disasm(csh handle, - char *code, uint64_t code_size, - uint64_t offset, - uint64_t count, +size_t cs_disasm(csh handle, + unsigned char *code, size_t code_size, + size_t offset, + size_t count, cs_insn *insn); /* @@ -168,10 +168,10 @@ uint64_t cs_disasm(csh handle, @return: the number of succesfully disassembled instructions, or 0 if this function failed to disassemble the given code */ -uint64_t cs_disasm_dyn(csh handle, - char *code, uint64_t code_size, - uint64_t offset, - uint64_t count, +size_t cs_disasm_dyn(csh handle, + unsigned char *code, size_t code_size, + size_t offset, + size_t count, cs_insn **insn); /* diff --git a/tests/test.c b/tests/test.c index 65e55e449..b52ee22d3 100644 --- a/tests/test.c +++ b/tests/test.c @@ -10,14 +10,14 @@ struct platform { cs_arch arch; cs_mode mode; - char *code; - int size; + unsigned char *code; + size_t size; char *comment; }; -static void print_string_hex(char *str, int len) +static void print_string_hex(unsigned char *str, int len) { - char *c; + unsigned char *c; printf("Code: "); for (c = str; c < str + len; c++) { @@ -48,84 +48,84 @@ static void test() { .arch = CS_ARCH_X86, .mode = CS_MODE_16, - .code = X86_CODE16, + .code = (unsigned char*)X86_CODE16, .size = sizeof(X86_CODE16) - 1, .comment = "X86 16bit (Intel syntax)" }, { .arch = CS_ARCH_X86, .mode = CS_MODE_32 + CS_MODE_SYNTAX_ATT, - .code = X86_CODE32, + .code = (unsigned char*)X86_CODE32, .size = sizeof(X86_CODE32) - 1, .comment = "X86 32bit (ATT syntax)" }, { .arch = CS_ARCH_X86, .mode = CS_MODE_32, - .code = X86_CODE32, + .code = (unsigned char*)X86_CODE32, .size = sizeof(X86_CODE32) - 1, .comment = "X86 32 (Intel syntax)" }, { .arch = CS_ARCH_X86, .mode = CS_MODE_64, - .code = X86_CODE64, + .code = (unsigned char*)X86_CODE64, .size = sizeof(X86_CODE64) - 1, .comment = "X86 64 (Intel syntax)" }, { .arch = CS_ARCH_ARM, .mode = CS_MODE_ARM, - .code = ARM_CODE, + .code = (unsigned char*)ARM_CODE, .size = sizeof(ARM_CODE) - 1, .comment = "ARM" }, { .arch = CS_ARCH_ARM, .mode = CS_MODE_THUMB, - .code = THUMB_CODE2, + .code = (unsigned char*)THUMB_CODE2, .size = sizeof(THUMB_CODE2) - 1, .comment = "THUMB-2" }, { .arch = CS_ARCH_ARM, .mode = CS_MODE_ARM, - .code = ARM_CODE2, + .code = (unsigned char*)ARM_CODE2, .size = sizeof(ARM_CODE2) - 1, .comment = "ARM: Cortex-A15 + NEON" }, { .arch = CS_ARCH_ARM, .mode = CS_MODE_THUMB, - .code = THUMB_CODE, + .code = (unsigned char*)THUMB_CODE, .size = sizeof(THUMB_CODE) - 1, .comment = "THUMB" }, { .arch = CS_ARCH_MIPS, .mode = CS_MODE_32 + CS_MODE_BIG_ENDIAN, - .code = MIPS_CODE, + .code = (unsigned char*)MIPS_CODE, .size = sizeof(MIPS_CODE) - 1, .comment = "MIPS-32 (Big-endian)" }, { .arch = CS_ARCH_MIPS, .mode = CS_MODE_64+ CS_MODE_LITTLE_ENDIAN, - .code = MIPS_CODE2, + .code = (unsigned char*)MIPS_CODE2, .size = sizeof(MIPS_CODE2) - 1, .comment = "MIPS-64-EL (Little-endian)" }, { .arch = CS_ARCH_ARM64, .mode = CS_MODE_ARM, - .code = ARM64_CODE, + .code = (unsigned char*)ARM64_CODE, .size = sizeof(ARM64_CODE) - 1, .comment = "ARM-64" }, }; csh handle; - uint64_t address = 0x1000; + size_t address = 0x1000; //cs_insn insn[16]; cs_insn *insn; int i; @@ -137,22 +137,22 @@ static void test() return; } - //uint64_t count = cs_disasm(handle, platforms[i].code, platforms[i].size, address, 0, insn); - uint64_t count = cs_disasm_dyn(handle, platforms[i].code, platforms[i].size, address, 0, &insn); + //size_t count = cs_disasm(handle, platforms[i].code, platforms[i].size, address, 0, insn); + size_t count = cs_disasm_dyn(handle, platforms[i].code, platforms[i].size, address, 0, &insn); if (count) { printf("****************\n"); printf("Platform: %s\n", platforms[i].comment); print_string_hex(platforms[i].code, platforms[i].size); printf("Disasm:\n"); - uint64_t j; + size_t j; for (j = 0; j < count; j++) { - printf("0x%"PRIx64":\t%s\t\t%s\n", + printf("0x%zu:\t%s\t\t%s\n", insn[j].address, insn[j].mnemonic, insn[j].op_str); } // print out the next offset, after the last insn - printf("0x%"PRIx64":\n", insn[j-1].address + insn[j-1].size); + printf("0x%zu:\n", insn[j-1].address + insn[j-1].size); // free memory allocated by cs_disasm_dyn() cs_free(insn); diff --git a/tests/test_arm.c b/tests/test_arm.c index 21e119433..631de17d9 100644 --- a/tests/test_arm.c +++ b/tests/test_arm.c @@ -12,14 +12,14 @@ static csh handle; struct platform { cs_arch arch; cs_mode mode; - char *code; - int size; + unsigned char *code; + size_t size; char *comment; }; -static void print_string_hex(char *comment, char *str, int len) +static void print_string_hex(char *comment, unsigned char *str, int len) { - char *c; + unsigned char *c; printf("%s", comment); for (c = str; c < str + len; c++) { @@ -46,7 +46,7 @@ static void print_insn_detail(cs_arch mode, cs_insn *ins) printf("\t\toperands[%u].type: REG = %s\n", i, cs_reg_name(handle, op->reg)); break; case ARM_OP_IMM: - printf("\t\toperands[%u].type: IMM = 0x%"PRIx64 "\n", i, op->imm); + printf("\t\toperands[%u].type: IMM = 0x%x\n", i, op->imm); break; case ARM_OP_FP: printf("\t\toperands[%u].type: FP = %f\n", i, op->fp); @@ -62,14 +62,14 @@ static void print_insn_detail(cs_arch mode, cs_insn *ins) if (op->mem.scale != 1) printf("\t\t\toperands[%u].mem.scale: %u\n", i, op->mem.scale); if (op->mem.disp != 0) - printf("\t\t\toperands[%u].mem.disp: 0x%" PRIx64 "\n", i, op->mem.disp); + printf("\t\t\toperands[%u].mem.disp: 0x%x\n", i, op->mem.disp); break; case ARM_OP_PIMM: - printf("\t\toperands[%u].type: P-IMM = %"PRIu64 "\n", i, op->imm); + printf("\t\toperands[%u].type: P-IMM = %u\n", i, op->imm); break; case ARM_OP_CIMM: - printf("\t\toperands[%u].type: C-IMM = %"PRIu64 "\n", i, op->imm); + printf("\t\toperands[%u].type: C-IMM = %u\n", i, op->imm); break; } @@ -152,34 +152,34 @@ static void test() { .arch = CS_ARCH_ARM, .mode = CS_MODE_ARM, - .code = ARM_CODE, + .code = (unsigned char *)ARM_CODE, .size = sizeof(ARM_CODE) - 1, .comment = "ARM" }, { .arch = CS_ARCH_ARM, .mode = CS_MODE_THUMB, - .code = THUMB_CODE, + .code = (unsigned char *)THUMB_CODE, .size = sizeof(THUMB_CODE) - 1, .comment = "Thumb" }, { .arch = CS_ARCH_ARM, .mode = CS_MODE_THUMB, - .code = ARM_CODE2, + .code = (unsigned char *)ARM_CODE2, .size = sizeof(ARM_CODE2) - 1, .comment = "Thumb-mixed" }, { .arch = CS_ARCH_ARM, .mode = CS_MODE_THUMB, - .code = THUMB_CODE2, + .code = (unsigned char *)THUMB_CODE2, .size = sizeof(THUMB_CODE2) - 1, .comment = "Thumb-2" }, }; - uint64_t address = 0x1000; + size_t address = 0x1000; cs_insn *insn; int i; @@ -187,19 +187,19 @@ static void test() if (cs_open(platforms[i].arch, platforms[i].mode, &handle)) return; - uint64_t count = cs_disasm_dyn(handle, platforms[i].code, platforms[i].size, address, 0, &insn); + size_t count = cs_disasm_dyn(handle, platforms[i].code, platforms[i].size, address, 0, &insn); if (count) { printf("****************\n"); printf("Platform: %s\n", platforms[i].comment); print_string_hex("Code:", platforms[i].code, platforms[i].size); printf("Disasm:\n"); - uint64_t j; + size_t j; for (j = 0; j < count; j++) { - printf("0x%"PRIx64":\t%s\t%s\n", insn[j].address, insn[j].mnemonic, insn[j].op_str); + printf("0x%zu:\t%s\t%s\n", insn[j].address, insn[j].mnemonic, insn[j].op_str); print_insn_detail(platforms[i].mode, &insn[j]); } - printf("0x%"PRIx64":\n", insn[j-1].address + insn[j-1].size); + printf("0x%zu:\n", insn[j-1].address + insn[j-1].size); // free memory allocated by cs_disasm_dyn() cs_free(insn); diff --git a/tests/test_arm64.c b/tests/test_arm64.c index 80aa55247..310d7c7cc 100644 --- a/tests/test_arm64.c +++ b/tests/test_arm64.c @@ -12,14 +12,14 @@ static csh handle; struct platform { cs_arch arch; cs_mode mode; - char *code; - int size; + unsigned char *code; + size_t size; char *comment; }; -static void print_string_hex(char *comment, char *str, int len) +static void print_string_hex(char *comment, unsigned char *str, int len) { - char *c; + unsigned char *c; printf("%s", comment); for (c = str; c < str + len; c++) { @@ -137,13 +137,13 @@ static void test() { .arch = CS_ARCH_ARM64, .mode = CS_MODE_ARM, - .code = ARM64_CODE, + .code = (unsigned char *)ARM64_CODE, .size = sizeof(ARM64_CODE) - 1, .comment = "ARM-64" }, }; - uint64_t address = 0x2c; + size_t address = 0x2c; //cs_insn insn[16]; cs_insn *insn; int i; @@ -152,20 +152,20 @@ static void test() if (cs_open(platforms[i].arch, platforms[i].mode, &handle)) return; - //uint64_t count = cs_disasm(handle, platforms[i].code, platforms[i].size, address, 0, insn); - uint64_t count = cs_disasm_dyn(handle, platforms[i].code, platforms[i].size, address, 0, &insn); + //size_t count = cs_disasm(handle, platforms[i].code, platforms[i].size, address, 0, insn); + size_t count = cs_disasm_dyn(handle, platforms[i].code, platforms[i].size, address, 0, &insn); if (count) { printf("****************\n"); printf("Platform: %s\n", platforms[i].comment); print_string_hex("Code:", platforms[i].code, platforms[i].size); printf("Disasm:\n"); - uint64_t j; + size_t j; for (j = 0; j < count; j++) { - printf("0x%"PRIx64":\t%s\t%s\n", insn[j].address, insn[j].mnemonic, insn[j].op_str); + printf("0x%zu:\t%s\t%s\n", insn[j].address, insn[j].mnemonic, insn[j].op_str); print_insn_detail(platforms[i].mode, &insn[j]); } - printf("0x%"PRIx64":\n", insn[j-1].address + insn[j-1].size); + printf("0x%zu:\n", insn[j-1].address + insn[j-1].size); // free memory allocated by cs_disasm_dyn() cs_free(insn); diff --git a/tests/test_detail.c b/tests/test_detail.c index 0254f2ea1..c89425944 100644 --- a/tests/test_detail.c +++ b/tests/test_detail.c @@ -10,14 +10,14 @@ struct platform { cs_arch arch; cs_mode mode; - char *code; - int size; + unsigned char *code; + size_t size; char *comment; }; -static void print_string_hex(char *str, int len) +static void print_string_hex(unsigned char *str, int len) { - char *c; + unsigned char *c; printf("Code: "); for (c = str; c < str + len; c++) { @@ -50,84 +50,84 @@ static void test() { .arch = CS_ARCH_X86, .mode = CS_MODE_16, - .code = X86_CODE16, + .code = (unsigned char *)X86_CODE16, .size = sizeof(X86_CODE32) - 1, .comment = "X86 16bit (Intel syntax)" }, { .arch = CS_ARCH_X86, .mode = CS_MODE_32 + CS_MODE_SYNTAX_ATT, - .code = X86_CODE32, + .code = (unsigned char *)X86_CODE32, .size = sizeof(X86_CODE32) - 1, .comment = "X86 32bit (ATT syntax)" }, { .arch = CS_ARCH_X86, .mode = CS_MODE_32, - .code = X86_CODE32, + .code = (unsigned char *)X86_CODE32, .size = sizeof(X86_CODE32) - 1, .comment = "X86 32 (Intel syntax)" }, { .arch = CS_ARCH_X86, .mode = CS_MODE_64, - .code = X86_CODE64, + .code = (unsigned char *)X86_CODE64, .size = sizeof(X86_CODE64) - 1, .comment = "X86 64 (Intel syntax)" }, { .arch = CS_ARCH_ARM, .mode = CS_MODE_ARM, - .code = ARM_CODE, + .code = (unsigned char *)ARM_CODE, .size = sizeof(ARM_CODE) - 1, .comment = "ARM" }, { .arch = CS_ARCH_ARM, .mode = CS_MODE_THUMB, - .code = THUMB_CODE2, + .code = (unsigned char *)THUMB_CODE2, .size = sizeof(THUMB_CODE2) - 1, .comment = "THUMB-2" }, { .arch = CS_ARCH_ARM, .mode = CS_MODE_ARM, - .code = ARM_CODE2, + .code = (unsigned char *)ARM_CODE2, .size = sizeof(ARM_CODE2) - 1, .comment = "ARM: Cortex-A15 + NEON" }, { .arch = CS_ARCH_ARM, .mode = CS_MODE_THUMB, - .code = THUMB_CODE, + .code = (unsigned char *)THUMB_CODE, .size = sizeof(THUMB_CODE) - 1, .comment = "THUMB" }, { .arch = CS_ARCH_MIPS, .mode = CS_MODE_32 + CS_MODE_BIG_ENDIAN, - .code = MIPS_CODE, + .code = (unsigned char *)MIPS_CODE, .size = sizeof(MIPS_CODE) - 1, .comment = "MIPS-32 (Big-endian)" }, { .arch = CS_ARCH_MIPS, .mode = CS_MODE_64+ CS_MODE_LITTLE_ENDIAN, - .code = MIPS_CODE2, + .code = (unsigned char *)MIPS_CODE2, .size = sizeof(MIPS_CODE2) - 1, .comment = "MIPS-64-EL (Little-endian)" }, { .arch = CS_ARCH_ARM64, .mode = CS_MODE_ARM, - .code = ARM64_CODE, + .code = (unsigned char *)ARM64_CODE, .size = sizeof(ARM64_CODE) - 1, .comment = "ARM-64" }, }; csh handle; - uint64_t address = 0x1000; + size_t address = 0x1000; //cs_insn all_insn[16]; cs_insn *all_insn; int i; @@ -136,19 +136,19 @@ static void test() if (cs_open(platforms[i].arch, platforms[i].mode, &handle)) return; - //uint64_t count = cs_disasm(handle, platforms[i].code, platforms[i].size, address, 0, all_insn); - uint64_t count = cs_disasm_dyn(handle, platforms[i].code, platforms[i].size, address, 0, &all_insn); + //size_t count = cs_disasm(handle, platforms[i].code, platforms[i].size, address, 0, all_insn); + size_t count = cs_disasm_dyn(handle, platforms[i].code, platforms[i].size, address, 0, &all_insn); if (count) { printf("****************\n"); printf("Platform: %s\n", platforms[i].comment); print_string_hex(platforms[i].code, platforms[i].size); printf("Disasm:\n"); - uint64_t j; + size_t j; int n; for (j = 0; j < count; j++) { cs_insn *i = &(all_insn[j]); - printf("0x%"PRIx64":\t%s\t\t%s // insn-ID: %u, insn-mnem: %s\n", + printf("0x%zu:\t%s\t\t%s // insn-ID: %u, insn-mnem: %s\n", i->address, i->mnemonic, i->op_str, i->id, cs_insn_name(handle, i->id)); @@ -187,7 +187,7 @@ static void test() } // print out the next offset, after the last insn - printf("0x%"PRIx64":\n", all_insn[j-1].address + all_insn[j-1].size); + printf("0x%zu:\n", all_insn[j-1].address + all_insn[j-1].size); // free memory allocated by cs_disasm_dyn() cs_free(all_insn); diff --git a/tests/test_mips.c b/tests/test_mips.c index fbbd97674..b80d8dbad 100644 --- a/tests/test_mips.c +++ b/tests/test_mips.c @@ -10,16 +10,16 @@ struct platform { cs_arch arch; cs_mode mode; - char *code; - int size; + unsigned char *code; + size_t size; char *comment; }; static csh handle; -static void print_string_hex(char *comment, char *str, int len) +static void print_string_hex(char *comment, unsigned char *str, int len) { - char *c; + unsigned char *c; printf("%s", comment); for (c = str; c < str + len; c++) { @@ -79,20 +79,20 @@ static void test() { .arch = CS_ARCH_MIPS, .mode = CS_MODE_32 + CS_MODE_BIG_ENDIAN, - .code = MIPS_CODE, + .code = (unsigned char *)MIPS_CODE, .size = sizeof(MIPS_CODE) - 1, .comment = "MIPS-32 (Big-endian)" }, { .arch = CS_ARCH_MIPS, .mode = CS_MODE_64+ CS_MODE_LITTLE_ENDIAN, - .code = MIPS_CODE2, + .code = (unsigned char *)MIPS_CODE2, .size = sizeof(MIPS_CODE2) - 1, .comment = "MIPS-64-EL (Little-endian)" }, }; - uint64_t address = 0x1000; + size_t address = 0x1000; cs_insn *insn; int i; @@ -100,19 +100,19 @@ static void test() if (cs_open(platforms[i].arch, platforms[i].mode, &handle)) return; - uint64_t count = cs_disasm_dyn(handle, platforms[i].code, platforms[i].size, address, 0, &insn); + size_t count = cs_disasm_dyn(handle, platforms[i].code, platforms[i].size, address, 0, &insn); if (count) { printf("****************\n"); printf("Platform: %s\n", platforms[i].comment); print_string_hex("Code:", platforms[i].code, platforms[i].size); printf("Disasm:\n"); - uint64_t j; + size_t j; for (j = 0; j < count; j++) { - printf("0x%"PRIx64":\t%s\t%s\n", insn[j].address, insn[j].mnemonic, insn[j].op_str); + printf("0x%zu:\t%s\t%s\n", insn[j].address, insn[j].mnemonic, insn[j].op_str); print_insn_detail(platforms[i].mode, &insn[j]); } - printf("0x%"PRIx64":\n", insn[j-1].address + insn[j-1].size); + printf("0x%zu:\n", insn[j-1].address + insn[j-1].size); // free memory allocated by cs_disasm_dyn() cs_free(insn); diff --git a/tests/test_x86.c b/tests/test_x86.c index 64531111e..7f8c40867 100644 --- a/tests/test_x86.c +++ b/tests/test_x86.c @@ -12,14 +12,14 @@ static csh handle; struct platform { cs_arch arch; cs_mode mode; - char *code; - int size; + unsigned char *code; + size_t size; char *comment; }; -static void print_string_hex(char *comment, char *str, int len) +static void print_string_hex(char *comment, unsigned char *str, int len) { - char *c; + unsigned char *c; printf("%s", comment); for (c = str; c < str + len; c++) { @@ -34,12 +34,12 @@ static void print_insn_detail(csh ud, cs_mode mode, cs_insn *ins) int i; cs_x86 *x86 = &(ins->x86); - print_string_hex("\tPrefix:", (char *)x86->prefix, 5); + print_string_hex("\tPrefix:", x86->prefix, 5); if (x86->segment != X86_REG_INVALID) printf("\tSegment override: %s\n", cs_reg_name(handle, x86->segment)); - print_string_hex("\tOpcode:", (char *)x86->opcode, 3); + print_string_hex("\tOpcode:", x86->opcode, 3); printf("\top_size: %u, addr_size: %u, disp_size: %u, imm_size: %u\n", x86->op_size, x86->addr_size, x86->disp_size, x86->imm_size); printf("\tmodrm: 0x%x\n", x86->modrm); printf("\tdisp: 0x%x\n", x86->disp); @@ -117,34 +117,34 @@ static void test() { .arch = CS_ARCH_X86, .mode = CS_MODE_16, - .code = X86_CODE16, + .code = (unsigned char *)X86_CODE16, .size = sizeof(X86_CODE16) - 1, .comment = "X86 16bit (Intel syntax)" }, { .arch = CS_ARCH_X86, .mode = CS_MODE_32 + CS_MODE_SYNTAX_ATT, - .code = X86_CODE32, + .code = (unsigned char *)X86_CODE32, .size = sizeof(X86_CODE32) - 1, .comment = "X86 32 (AT&T syntax)" }, { .arch = CS_ARCH_X86, .mode = CS_MODE_32, - .code = X86_CODE32, + .code = (unsigned char *)X86_CODE32, .size = sizeof(X86_CODE32) - 1, .comment = "X86 32 (Intel syntax)" }, { .arch = CS_ARCH_X86, .mode = CS_MODE_64, - .code = X86_CODE64, + .code = (unsigned char *)X86_CODE64, .size = sizeof(X86_CODE64) - 1, .comment = "X86 64 (Intel syntax)" }, }; - uint64_t address = 0x1000; + size_t address = 0x1000; //cs_insn insn[16]; cs_insn *insn; int i; @@ -153,20 +153,20 @@ static void test() if (cs_open(platforms[i].arch, platforms[i].mode, &handle)) return; - //uint64_t count = cs_disasm(handle, platforms[i].code, platforms[i].size, address, 0, insn); - uint64_t count = cs_disasm_dyn(handle, platforms[i].code, platforms[i].size, address, 0, &insn); + //size_t count = cs_disasm(handle, platforms[i].code, platforms[i].size, address, 0, insn); + size_t count = cs_disasm_dyn(handle, platforms[i].code, platforms[i].size, address, 0, &insn); if (count) { printf("****************\n"); printf("Platform: %s\n", platforms[i].comment); print_string_hex("Code:", platforms[i].code, platforms[i].size); printf("Disasm:\n"); - uint64_t j; + size_t j; for (j = 0; j < count; j++) { - printf("0x%"PRIx64":\t%s\t%s\n", insn[j].address, insn[j].mnemonic, insn[j].op_str); + printf("0x%zu:\t%s\t%s\n", insn[j].address, insn[j].mnemonic, insn[j].op_str); print_insn_detail(handle, platforms[i].mode, &insn[j]); } - printf("0x%"PRIx64":\n", insn[j-1].address + insn[j-1].size); + printf("0x%zu:\n", insn[j-1].address + insn[j-1].size); // free memory allocated by cs_disasm_dyn() cs_free(insn);