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Improve init of cs_detail for x86 (#1125)
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@ -920,17 +920,25 @@ bool X86_getInstruction(csh ud, const uint8_t *code, size_t code_len,
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info.offset = address;
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if (instr->flat_insn->detail) {
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instr->flat_insn->detail->x86.op_count = 0;
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instr->flat_insn->detail->x86.sse_cc = X86_SSE_CC_INVALID;
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instr->flat_insn->detail->x86.avx_cc = X86_AVX_CC_INVALID;
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instr->flat_insn->detail->x86.avx_sae = false;
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instr->flat_insn->detail->x86.avx_rm = X86_AVX_RM_INVALID;
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instr->flat_insn->detail->x86.xop_cc = X86_XOP_CC_INVALID;
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instr->flat_insn->detail->x86.eflags = 0;
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// instr->flat_insn->detail initialization: 3 alternatives
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memset(instr->flat_insn->detail->x86.prefix, 0, sizeof(instr->flat_insn->detail->x86.prefix));
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memset(instr->flat_insn->detail->x86.opcode, 0, sizeof(instr->flat_insn->detail->x86.opcode));
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memset(instr->flat_insn->detail->x86.operands, 0, sizeof(instr->flat_insn->detail->x86.operands));
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// 1. The whole structure, this is how it's done in other arch disassemblers
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// Probably overkill since cs_detail is huge because of the 36 operands of ARM
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//memset(instr->flat_insn->detail, 0, sizeof(cs_detail));
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// 2. Only the part relevant to x86
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memset(instr->flat_insn->detail, 0, offsetof(cs_detail, x86)+sizeof(cs_x86));
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// 3. The relevant part except for x86.operands
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// sizeof(cs_x86) is 0x1c0, sizeof(x86.operands) is 0x180
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// marginally faster, should be okay since x86.op_count is set to 0
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//memset(instr->flat_insn->detail, 0, offsetof(cs_detail, x86)+offsetof(cs_x86, operands));
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}
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if (handle->mode & CS_MODE_16)
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