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- add tricore to python binding

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- try fix `test_corpus.py`
This commit is contained in:
billow 2023-03-25 21:12:40 +08:00
parent cffcfdbb4c
commit c4a9694d9e
6 changed files with 593 additions and 138 deletions
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160
bindings/const_generator.py
View File

@ -5,7 +5,7 @@ import sys, re
INCL_DIR = '../include/capstone/'
include = [ 'arm.h', 'arm64.h', 'm68k.h', 'mips.h', 'x86.h', 'ppc.h', 'sparc.h', 'systemz.h', 'xcore.h', 'tms320c64x.h', 'm680x.h', 'evm.h', 'mos65xx.h', 'wasm.h', 'bpf.h' ,'riscv.h' ]
include = [ 'arm.h', 'arm64.h', 'm68k.h', 'mips.h', 'x86.h', 'ppc.h', 'sparc.h', 'systemz.h', 'xcore.h', 'tms320c64x.h', 'm680x.h', 'evm.h', 'mos65xx.h', 'wasm.h', 'bpf.h' ,'riscv.h', 'tricore.h' ]
template = {
'java': {
@ -52,6 +52,7 @@ template = {
'mos65xx.h': 'mos65xx',
'bpf.h': 'bpf',
'riscv.h': 'riscv',
'tricore.h': ['TRICORE', 'TriCore'],
'comment_open': '#',
'comment_close': '',
},
@ -199,6 +200,11 @@ def gen(lang):
print("Warning: No binding found for %s" % target)
continue
prefix = templ[target]
prefixs = []
if isinstance(prefix, list):
prefixs = prefix
prefix = prefix[0].lower()
outfile = open(templ['out_file'] %(prefix), 'wb') # open as binary prevents windows newlines
outfile.write((templ['header'] % (prefix)).encode("utf-8"))
@ -237,7 +243,13 @@ def gen(lang):
xline.insert(1, '=') # insert an = so the expression below can parse it
line = ' '.join(xline)
if not line.startswith(prefix.upper()):
def is_with_prefix(x):
if prefixs:
return any(x.startswith(pre) for pre in prefixs)
else:
return x.startswith(prefix.upper())
if not is_with_prefix(line):
continue
tmp = line.strip().split(',')
@ -249,91 +261,93 @@ def gen(lang):
t = re.sub(r'\((\d+)ULL << (\d+)\)', r'\1 << \2', t) # (1ULL<<1) to 1 << 1
f = re.split('\s+', t)
if f[0].startswith(prefix.upper()):
if len(f) > 1 and f[1] not in ('//', '///<', '='):
print("Error: Unable to convert %s" % f)
continue
elif len(f) > 1 and f[1] == '=':
rhs = ''.join(f[2:])
else:
rhs = str(count)
count += 1
if not is_with_prefix(f[0]):
continue
try:
count = int(rhs) + 1
if (count == 1):
outfile.write(("\n").encode("utf-8"))
except ValueError:
if lang == 'ocaml':
# ocaml uses lsl for '<<', lor for '|'
rhs = rhs.replace('<<', ' lsl ')
rhs = rhs.replace('|', ' lor ')
# ocaml variable has _ as prefix
if rhs[0].isalpha():
rhs = '_' + rhs
if len(f) > 1 and f[1] not in ('//', '///<', '='):
print("Error: Unable to convert %s" % f)
continue
elif len(f) > 1 and f[1] == '=':
rhs = ''.join(f[2:])
else:
rhs = str(count)
count += 1
if lang == 'swift':
value = eval(rhs, None, values)
exec('%s = %d' %(f[0].strip(), value), None, values)
else:
value = rhs
try:
count = int(rhs) + 1
if (count == 1):
outfile.write(("\n").encode("utf-8"))
except ValueError:
if lang == 'ocaml':
# ocaml uses lsl for '<<', lor for '|'
rhs = rhs.replace('<<', ' lsl ')
rhs = rhs.replace('|', ' lor ')
# ocaml variable has _ as prefix
if rhs[0].isalpha():
rhs = '_' + rhs
name = f[0].strip()
if lang == 'swift':
value = eval(rhs, None, values)
exec('%s = %d' %(f[0].strip(), value), None, values)
else:
value = rhs
if 'rename' in templ:
# constant renaming
for pattern, replacement in templ['rename'].items():
if re.match(pattern, name):
name = re.sub(pattern, replacement, name)
break
name = f[0].strip()
if 'rename' in templ:
# constant renaming
for pattern, replacement in templ['rename'].items():
if re.match(pattern, name):
name = re.sub(pattern, replacement, name)
break
if 'enum_header' in templ:
# separate constants by enums based on name
enum, name = pascalize_const(name)
if enum not in enums:
if len(enums) > 0:
write_enum_extra_options(outfile, templ, last_enum, enums[last_enum])
outfile.write((templ['enum_footer']).encode("utf-8"))
last_enum = enum
if 'enum_header' in templ:
# separate constants by enums based on name
enum, name = pascalize_const(name)
if enum not in enums:
if len(enums) > 0:
write_enum_extra_options(outfile, templ, last_enum, enums[last_enum])
outfile.write((templ['enum_footer']).encode("utf-8"))
last_enum = enum
if 'enum_doc' in templ:
for doc_line in doc_lines:
outfile.write((templ['enum_doc'] %(doc_line)).encode("utf-8"))
doc_lines = []
if 'option_sets' in templ and enum in templ['option_sets']:
outfile.write((templ['option_set_header'] %(enum, templ['option_sets'][enum])).encode("utf-8"))
else:
outfile.write((templ['enum_header'] %(enum, enum_type(enum, templ))).encode("utf-8"))
enums[enum] = {}
if 'enum_doc' in templ:
for doc_line in doc_lines:
outfile.write((templ['enum_doc'] %(doc_line)).encode("utf-8"))
doc_lines = []
if 'option_sets' in templ and enum in templ['option_sets']:
# option set format
line_format = templ['option_format'].format(option='%s',type=enum,value='%s')
if value == 0:
continue # skip empty option
# option set values need not be literals
value = rhs
elif 'dup_line_format' in templ and value in enums[enum].values():
# different format for duplicate values?
line_format = templ['dup_line_format']
outfile.write((templ['option_set_header'] %(enum, templ['option_sets'][enum])).encode("utf-8"))
else:
line_format = templ['line_format']
enums[enum][name] = value
outfile.write((templ['enum_header'] %(enum, enum_type(enum, templ))).encode("utf-8"))
enums[enum] = {}
# escape reserved words
if 'reserved_words' in templ and name in templ['reserved_words']:
name = templ['reserved_word_format'] %(name)
# print documentation?
if 'doc_line_format' in templ and '///<' in line:
doc = line.split('///<')[1].strip()
outfile.write((templ['doc_line_format'] %(doc)).encode("utf-8"))
if 'option_sets' in templ and enum in templ['option_sets']:
# option set format
line_format = templ['option_format'].format(option='%s',type=enum,value='%s')
if value == 0:
continue # skip empty option
# option set values need not be literals
value = rhs
elif 'dup_line_format' in templ and value in enums[enum].values():
# different format for duplicate values?
line_format = templ['dup_line_format']
else:
line_format = templ['line_format']
enums[enum][name] = value
outfile.write((line_format %(name, value)).encode("utf-8"))
# escape reserved words
if 'reserved_words' in templ and name in templ['reserved_words']:
name = templ['reserved_word_format'] %(name)
# print documentation?
if 'doc_line_format' in templ and '///<' in line:
doc = line.split('///<')[1].strip()
outfile.write((templ['doc_line_format'] %(doc)).encode("utf-8"))
else:
line_format = templ['line_format']
outfile.write((line_format %(name, value)).encode("utf-8"))
if 'enum_footer' in templ:
write_enum_extra_options(outfile, templ, enum, enums[enum])

9
bindings/python/capstone/__init__.py
View File

@ -38,6 +38,7 @@ __all__ = [
'CS_ARCH_BPF',
'CS_ARCH_RISCV',
'CS_ARCH_MOS65XX',
'CS_ARCH_TRICORE',
'CS_ARCH_ALL',
'CS_MODE_LITTLE_ENDIAN',
@ -88,6 +89,7 @@ __all__ = [
'CS_MODE_MOS65XX_65816_LONG_M',
'CS_MODE_MOS65XX_65816_LONG_X',
'CS_MODE_MOS65XX_65816_LONG_MX',
'CS_MODE_TRICORE',
'CS_OPT_SYNTAX',
'CS_OPT_SYNTAX_DEFAULT',
@ -174,7 +176,9 @@ CS_ARCH_MOS65XX = 12
CS_ARCH_WASM = 13
CS_ARCH_BPF = 14
CS_ARCH_RISCV = 15
CS_ARCH_MAX = 16
# CS_ARCH_SH = 16
CS_ARCH_TRICORE = 17
CS_ARCH_MAX = 18
CS_ARCH_ALL = 0xFFFF
# disasm mode
@ -226,6 +230,7 @@ CS_MODE_MOS65XX_65816 = (1 << 4) # MOS65XXX WDC 65816, 8-bit m/x
CS_MODE_MOS65XX_65816_LONG_M = (1 << 5) # MOS65XXX WDC 65816, 16-bit m, 8-bit x
CS_MODE_MOS65XX_65816_LONG_X = (1 << 6) # MOS65XXX WDC 65816, 8-bit m, 16-bit x
CS_MODE_MOS65XX_65816_LONG_MX = CS_MODE_MOS65XX_65816_LONG_M | CS_MODE_MOS65XX_65816_LONG_X
CS_MODE_TRICORE = 1 << 1 # Tricore
# Capstone option type
CS_OPT_SYNTAX = 1 # Intel X86 asm syntax (CS_ARCH_X86 arch)
@ -1173,7 +1178,7 @@ def debug():
"mips": CS_ARCH_MIPS, "ppc": CS_ARCH_PPC, "sparc": CS_ARCH_SPARC,
"sysz": CS_ARCH_SYSZ, 'xcore': CS_ARCH_XCORE, "tms320c64x": CS_ARCH_TMS320C64X,
"m680x": CS_ARCH_M680X, 'evm': CS_ARCH_EVM, 'mos65xx': CS_ARCH_MOS65XX,
'bpf': CS_ARCH_BPF, 'riscv': CS_ARCH_RISCV,
'bpf': CS_ARCH_BPF, 'riscv': CS_ARCH_RISCV, 'tricore': CS_ARCH_TRICORE,
}
all_archs = ""

433
bindings/python/capstone/tricore_const.py Normal file
View File

@ -0,0 +1,433 @@
# For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [tricore_const.py]
# Operand type for instruction's operands
TRICORE_OP_INVALID = 0
TRICORE_OP_REG = 1
TRICORE_OP_IMM = 2
TRICORE_OP_MEM = 3
# TriCore registers
TriCore_REG_INVALID = 0
TriCore_REG_FCX = 1
TriCore_REG_PC = 2
TriCore_REG_PCXI = 3
TriCore_REG_PSW = 4
TriCore_REG_A0 = 5
TriCore_REG_A1 = 6
TriCore_REG_A2 = 7
TriCore_REG_A3 = 8
TriCore_REG_A4 = 9
TriCore_REG_A5 = 10
TriCore_REG_A6 = 11
TriCore_REG_A7 = 12
TriCore_REG_A8 = 13
TriCore_REG_A9 = 14
TriCore_REG_A10 = 15
TriCore_REG_A11 = 16
TriCore_REG_A12 = 17
TriCore_REG_A13 = 18
TriCore_REG_A14 = 19
TriCore_REG_A15 = 20
TriCore_REG_D0 = 21
TriCore_REG_D1 = 22
TriCore_REG_D2 = 23
TriCore_REG_D3 = 24
TriCore_REG_D4 = 25
TriCore_REG_D5 = 26
TriCore_REG_D6 = 27
TriCore_REG_D7 = 28
TriCore_REG_D8 = 29
TriCore_REG_D9 = 30
TriCore_REG_D10 = 31
TriCore_REG_D11 = 32
TriCore_REG_D12 = 33
TriCore_REG_D13 = 34
TriCore_REG_D14 = 35
TriCore_REG_D15 = 36
TriCore_REG_E0 = 37
TriCore_REG_E2 = 38
TriCore_REG_E4 = 39
TriCore_REG_E6 = 40
TriCore_REG_E8 = 41
TriCore_REG_E10 = 42
TriCore_REG_E12 = 43
TriCore_REG_E14 = 44
TriCore_REG_P0 = 45
TriCore_REG_P2 = 46
TriCore_REG_P4 = 47
TriCore_REG_P6 = 48
TriCore_REG_P8 = 49
TriCore_REG_P10 = 50
TriCore_REG_P12 = 51
TriCore_REG_P14 = 52
TriCore_REG_A0_A1 = 53
TriCore_REG_A2_A3 = 54
TriCore_REG_A4_A5 = 55
TriCore_REG_A6_A7 = 56
TriCore_REG_A8_A9 = 57
TriCore_REG_A10_A11 = 58
TriCore_REG_A12_A13 = 59
TriCore_REG_A14_A15 = 60
TriCore_REG_ENDING = 61
# TriCore instruction
TriCore_INS_INVALID = 0
TriCore_INS_XOR_T = 1
TriCore_INS_ABSDIFS_H = 2
TriCore_INS_ABSDIFS = 3
TriCore_INS_ABSDIF_B = 4
TriCore_INS_ABSDIF_H = 5
TriCore_INS_ABSDIF = 6
TriCore_INS_ABSS_H = 7
TriCore_INS_ABSS = 8
TriCore_INS_ABS_B = 9
TriCore_INS_ABS_H = 10
TriCore_INS_ABS = 11
TriCore_INS_ADDC = 12
TriCore_INS_ADDIH_A = 13
TriCore_INS_ADDIH = 14
TriCore_INS_ADDI = 15
TriCore_INS_ADDSC_AT = 16
TriCore_INS_ADDSC_A = 17
TriCore_INS_ADDS_H = 18
TriCore_INS_ADDS_HU = 19
TriCore_INS_ADDS_U = 20
TriCore_INS_ADDS = 21
TriCore_INS_ADDX = 22
TriCore_INS_ADD_A = 23
TriCore_INS_ADD_B = 24
TriCore_INS_ADD_F = 25
TriCore_INS_ADD_H = 26
TriCore_INS_ADD = 27
TriCore_INS_ANDN_T = 28
TriCore_INS_ANDN = 29
TriCore_INS_AND_ANDN_T = 30
TriCore_INS_AND_AND_T = 31
TriCore_INS_AND_EQ = 32
TriCore_INS_AND_GE_U = 33
TriCore_INS_AND_GE = 34
TriCore_INS_AND_LT_U = 35
TriCore_INS_AND_LT = 36
TriCore_INS_AND_NE = 37
TriCore_INS_AND_NOR_T = 38
TriCore_INS_AND_OR_T = 39
TriCore_INS_AND_T = 40
TriCore_INS_AND = 41
TriCore_INS_BISR = 42
TriCore_INS_BMERGE = 43
TriCore_INS_BSPLIT = 44
TriCore_INS_CACHEI_I = 45
TriCore_INS_CACHEI_WI = 46
TriCore_INS_CACHEI_W = 47
TriCore_INS_CACHE_I = 48
TriCore_INS_CACHE_WI = 49
TriCore_INS_CACHE_W = 50
TriCore_INS_CADDN = 51
TriCore_INS_CADD = 52
TriCore_INS_CALLA = 53
TriCore_INS_CALLI = 54
TriCore_INS_CALL = 55
TriCore_INS_CLO_H = 56
TriCore_INS_CLO = 57
TriCore_INS_CLS_H = 58
TriCore_INS_CLS = 59
TriCore_INS_CLZ_H = 60
TriCore_INS_CLZ = 61
TriCore_INS_CMOVN = 62
TriCore_INS_CMOV = 63
TriCore_INS_CMPSWAP_W = 64
TriCore_INS_CMP_F = 65
TriCore_INS_CRC32B_W = 66
TriCore_INS_CRC32L_W = 67
TriCore_INS_CRC32_B = 68
TriCore_INS_CRCN = 69
TriCore_INS_CSUB = 70
TriCore_INS_DEBUG = 71
TriCore_INS_DEXTR = 72
TriCore_INS_DISABLE = 73
TriCore_INS_DIV_F = 74
TriCore_INS_DIV_U = 75
TriCore_INS_DIV = 76
TriCore_INS_DSYNC = 77
TriCore_INS_DVADJ = 78
TriCore_INS_DVINIT_BU = 79
TriCore_INS_DVINIT_B = 80
TriCore_INS_DVINIT_HU = 81
TriCore_INS_DVINIT_H = 82
TriCore_INS_DVINIT_U = 83
TriCore_INS_DVINIT = 84
TriCore_INS_DVSTEP_U = 85
TriCore_INS_DVSTEP = 86
TriCore_INS_ENABLE = 87
TriCore_INS_EQANY_B = 88
TriCore_INS_EQANY_H = 89
TriCore_INS_EQZ_A = 90
TriCore_INS_EQ_A = 91
TriCore_INS_EQ_B = 92
TriCore_INS_EQ_H = 93
TriCore_INS_EQ_W = 94
TriCore_INS_EQ = 95
TriCore_INS_EXTR_U = 96
TriCore_INS_EXTR = 97
TriCore_INS_FCALLA = 98
TriCore_INS_FCALLI = 99
TriCore_INS_FCALL = 100
TriCore_INS_FRET = 101
TriCore_INS_FTOHP = 102
TriCore_INS_FTOIZ = 103
TriCore_INS_FTOI = 104
TriCore_INS_FTOQ31Z = 105
TriCore_INS_FTOQ31 = 106
TriCore_INS_FTOUZ = 107
TriCore_INS_FTOU = 108
TriCore_INS_GE_A = 109
TriCore_INS_GE_U = 110
TriCore_INS_GE = 111
TriCore_INS_HPTOF = 112
TriCore_INS_IMASK = 113
TriCore_INS_INSERT = 114
TriCore_INS_INSN_T = 115
TriCore_INS_INS_T = 116
TriCore_INS_ISYNC = 117
TriCore_INS_ITOF = 118
TriCore_INS_IXMAX_U = 119
TriCore_INS_IXMAX = 120
TriCore_INS_IXMIN_U = 121
TriCore_INS_IXMIN = 122
TriCore_INS_JA = 123
TriCore_INS_JEQ_A = 124
TriCore_INS_JEQ = 125
TriCore_INS_JGEZ = 126
TriCore_INS_JGE_U = 127
TriCore_INS_JGE = 128
TriCore_INS_JGTZ = 129
TriCore_INS_JI = 130
TriCore_INS_JLA = 131
TriCore_INS_JLEZ = 132
TriCore_INS_JLI = 133
TriCore_INS_JLTZ = 134
TriCore_INS_JLT_U = 135
TriCore_INS_JLT = 136
TriCore_INS_JL = 137
TriCore_INS_JNED = 138
TriCore_INS_JNEI = 139
TriCore_INS_JNE_A = 140
TriCore_INS_JNE = 141
TriCore_INS_JNZ_A = 142
TriCore_INS_JNZ_T = 143
TriCore_INS_JNZ = 144
TriCore_INS_JZ_A = 145
TriCore_INS_JZ_T = 146
TriCore_INS_JZ = 147
TriCore_INS_J = 148
TriCore_INS_LDLCX = 149
TriCore_INS_LDMST = 150
TriCore_INS_LDUCX = 151
TriCore_INS_LD_A = 152
TriCore_INS_LD_BU = 153
TriCore_INS_LD_B = 154
TriCore_INS_LD_DA = 155
TriCore_INS_LD_D = 156
TriCore_INS_LD_HU = 157
TriCore_INS_LD_H = 158
TriCore_INS_LD_Q = 159
TriCore_INS_LD_W = 160
TriCore_INS_LEA = 161
TriCore_INS_LHA = 162
TriCore_INS_LOOPU = 163
TriCore_INS_LOOP = 164
TriCore_INS_LT_A = 165
TriCore_INS_LT_B = 166
TriCore_INS_LT_BU = 167
TriCore_INS_LT_H = 168
TriCore_INS_LT_HU = 169
TriCore_INS_LT_U = 170
TriCore_INS_LT_W = 171
TriCore_INS_LT_WU = 172
TriCore_INS_LT = 173
TriCore_INS_MADDMS_H = 174
TriCore_INS_MADDM_H = 175
TriCore_INS_MADDRS_H = 176
TriCore_INS_MADDRS_Q = 177
TriCore_INS_MADDR_H = 178
TriCore_INS_MADDR_Q = 179
TriCore_INS_MADDSUMS_H = 180
TriCore_INS_MADDSUM_H = 181
TriCore_INS_MADDSURS_H = 182
TriCore_INS_MADDSUR_H = 183
TriCore_INS_MADDSUS_H = 184
TriCore_INS_MADDSU_H = 185
TriCore_INS_MADDS_H = 186
TriCore_INS_MADDS_Q = 187
TriCore_INS_MADDS_U = 188
TriCore_INS_MADDS = 189
TriCore_INS_MADD_F = 190
TriCore_INS_MADD_H = 191
TriCore_INS_MADD_Q = 192
TriCore_INS_MADD_U = 193
TriCore_INS_MADD = 194
TriCore_INS_MAX_B = 195
TriCore_INS_MAX_BU = 196
TriCore_INS_MAX_H = 197
TriCore_INS_MAX_HU = 198
TriCore_INS_MAX_U = 199
TriCore_INS_MAX = 200
TriCore_INS_MFCR = 201
TriCore_INS_MIN_B = 202
TriCore_INS_MIN_BU = 203
TriCore_INS_MIN_H = 204
TriCore_INS_MIN_HU = 205
TriCore_INS_MIN_U = 206
TriCore_INS_MIN = 207
TriCore_INS_MOVH_A = 208
TriCore_INS_MOV_AA = 209
TriCore_INS_MOV_A = 210
TriCore_INS_MOV_D = 211
TriCore_INS_MOV_H = 212
TriCore_INS_MOV_U = 213
TriCore_INS_MOV = 214
TriCore_INS_MSUBADMS_H = 215
TriCore_INS_MSUBADM_H = 216
TriCore_INS_MSUBADRS_H = 217
TriCore_INS_MSUBADR_H = 218
TriCore_INS_MSUBADS_H = 219
TriCore_INS_MSUBAD_H = 220
TriCore_INS_MSUBMS_H = 221
TriCore_INS_MSUBM_H = 222
TriCore_INS_MSUBRS_H = 223
TriCore_INS_MSUBRS_Q = 224
TriCore_INS_MSUBR_H = 225
TriCore_INS_MSUBR_Q = 226
TriCore_INS_MSUBS_H = 227
TriCore_INS_MSUBS_Q = 228
TriCore_INS_MSUBS = 229
TriCore_INS_MSUB_F = 230
TriCore_INS_MSUB_H = 231
TriCore_INS_MSUB_Q = 232
TriCore_INS_MSUB = 233
TriCore_INS_MULM_H = 234
TriCore_INS_MULR_H = 235
TriCore_INS_MULR_Q = 236
TriCore_INS_MULS_U = 237
TriCore_INS_MULS = 238
TriCore_INS_MUL_H = 239
TriCore_INS_MUL_Q = 240
TriCore_INS_MUL_U = 241
TriCore_INS_MUL = 242
TriCore_INS_NAND_T = 243
TriCore_INS_NAND = 244
TriCore_INS_NEZ_A = 245
TriCore_INS_NE_A = 246
TriCore_INS_NE = 247
TriCore_INS_NOP = 248
TriCore_INS_NOR_T = 249
TriCore_INS_NOR = 250
TriCore_INS_NOT = 251
TriCore_INS_ORN_T = 252
TriCore_INS_ORN = 253
TriCore_INS_OR_ANDN_T = 254
TriCore_INS_OR_AND_T = 255
TriCore_INS_OR_EQ = 256
TriCore_INS_OR_GE_U = 257
TriCore_INS_OR_GE = 258
TriCore_INS_OR_LT_U = 259
TriCore_INS_OR_LT = 260
TriCore_INS_OR_NE = 261
TriCore_INS_OR_NOR_T = 262
TriCore_INS_OR_OR_T = 263
TriCore_INS_OR_T = 264
TriCore_INS_OR = 265
TriCore_INS_PACK = 266
TriCore_INS_PARITY = 267
TriCore_INS_POPCNT_W = 268
TriCore_INS_Q31TOF = 269
TriCore_INS_QSEED_F = 270
TriCore_INS_RESTORE = 271
TriCore_INS_RET = 272
TriCore_INS_RFE = 273
TriCore_INS_RFM = 274
TriCore_INS_RELCK = 275
TriCore_INS_RSUBS_U = 276
TriCore_INS_RSUBS = 277
TriCore_INS_RSUB = 278
TriCore_INS_SAT_BU = 279
TriCore_INS_SAT_B = 280
TriCore_INS_SAT_HU = 281
TriCore_INS_SAT_H = 282
TriCore_INS_SELN = 283
TriCore_INS_SEL = 284
TriCore_INS_SHAS = 285
TriCore_INS_SHA_H = 286
TriCore_INS_SHA = 287
TriCore_INS_SHUFFLE = 288
TriCore_INS_SH_ANDN_T = 289
TriCore_INS_SH_AND_T = 290
TriCore_INS_SH_EQ = 291
TriCore_INS_SH_GE_U = 292
TriCore_INS_SH_GE = 293
TriCore_INS_SH_H = 294
TriCore_INS_SH_LT_U = 295
TriCore_INS_SH_LT = 296
TriCore_INS_SH_NAND_T = 297
TriCore_INS_SH_NOR_T = 298
TriCore_INS_SH_ORN_T = 299
TriCore_INS_SH_OR_T = 300
TriCore_INS_SH_XNOR_T = 301
TriCore_INS_SH_XOR_T = 302
TriCore_INS_SH = 303
TriCore_INS_STLCX = 304
TriCore_INS_STUCX = 305
TriCore_INS_ST_A = 306
TriCore_INS_ST_B = 307
TriCore_INS_ST_DA = 308
TriCore_INS_ST_D = 309
TriCore_INS_ST_H = 310
TriCore_INS_ST_Q = 311
TriCore_INS_ST_T = 312
TriCore_INS_ST_W = 313
TriCore_INS_SUBC = 314
TriCore_INS_SUBS_HU = 315
TriCore_INS_SUBS_H = 316
TriCore_INS_SUBS_U = 317
TriCore_INS_SUBS = 318
TriCore_INS_SUBX = 319
TriCore_INS_SUB_A = 320
TriCore_INS_SUB_B = 321
TriCore_INS_SUB_F = 322
TriCore_INS_SUB_H = 323
TriCore_INS_SUB = 324
TriCore_INS_SVLCX = 325
TriCore_INS_SWAPMSK_W = 326
TriCore_INS_SWAP_W = 327
TriCore_INS_SYSCALL = 328
TriCore_INS_TRAPSV = 329
TriCore_INS_TRAPV = 330
TriCore_INS_UNPACK = 331
TriCore_INS_UPDFL = 332
TriCore_INS_UTOF = 333
TriCore_INS_WAIT = 334
TriCore_INS_XNOR_T = 335
TriCore_INS_XNOR = 336
TriCore_INS_XOR_EQ = 337
TriCore_INS_XOR_GE_U = 338
TriCore_INS_XOR_GE = 339
TriCore_INS_XOR_LT_U = 340
TriCore_INS_XOR_LT = 341
TriCore_INS_XOR_NE = 342
TriCore_INS_XOR = 343
TriCore_INS_ENDING = 344
TriCore_GRP_CALL = 345
TriCore_GRP_JUMP = 346
TriCore_GRP_INVALID = 347
TriCore_GRP_ENDING = 348
# Group of TriCore instructions
TRICORE_GRP_INVALID = 0
# Generic groups
TRICORE_GRP_JUMP = 1
TRICORE_GRP_ENDING = 2

4
cs.c
View File

@ -382,8 +382,8 @@ bool CAPSTONE_API cs_support(int query)
(1 << CS_ARCH_M68K) | (1 << CS_ARCH_TMS320C64X) |
(1 << CS_ARCH_M680X) | (1 << CS_ARCH_EVM) |
(1 << CS_ARCH_RISCV) | (1 << CS_ARCH_MOS65XX) |
(1 << CS_ARCH_WASM) | (1 << CS_ARCH_BPF)) |
(1 << CS_ARCH_SH) | (1 << CS_ARCH_TRICORE);
(1 << CS_ARCH_WASM) | (1 << CS_ARCH_BPF) |
(1 << CS_ARCH_SH) | (1 << CS_ARCH_TRICORE));
if ((unsigned int)query < CS_ARCH_MAX)
return all_arch & (1 << query);

122
include/capstone/tricore.h
View File

@ -45,7 +45,7 @@ typedef struct cs_tricore_op {
// Instruction structure
typedef struct cs_tricore {
// Number of operands of this instruction,
// Number of operands of this instruction,
// or 0 when instruction has no operand.
uint8_t op_count;
cs_tricore_op operands[8]; // operands for this instruction.
@ -54,66 +54,66 @@ typedef struct cs_tricore {
//> TriCore registers
typedef enum tricore_reg {
TriCore_REG_INVALID = 0,
TriCore_REG_FCX = 1,
TriCore_REG_PC = 2,
TriCore_REG_PCXI = 3,
TriCore_REG_PSW = 4,
TriCore_REG_A0 = 5,
TriCore_REG_A1 = 6,
TriCore_REG_A2 = 7,
TriCore_REG_A3 = 8,
TriCore_REG_A4 = 9,
TriCore_REG_A5 = 10,
TriCore_REG_A6 = 11,
TriCore_REG_A7 = 12,
TriCore_REG_A8 = 13,
TriCore_REG_A9 = 14,
TriCore_REG_A10 = 15,
TriCore_REG_A11 = 16,
TriCore_REG_A12 = 17,
TriCore_REG_A13 = 18,
TriCore_REG_A14 = 19,
TriCore_REG_A15 = 20,
TriCore_REG_D0 = 21,
TriCore_REG_D1 = 22,
TriCore_REG_D2 = 23,
TriCore_REG_D3 = 24,
TriCore_REG_D4 = 25,
TriCore_REG_D5 = 26,
TriCore_REG_D6 = 27,
TriCore_REG_D7 = 28,
TriCore_REG_D8 = 29,
TriCore_REG_D9 = 30,
TriCore_REG_D10 = 31,
TriCore_REG_D11 = 32,
TriCore_REG_D12 = 33,
TriCore_REG_D13 = 34,
TriCore_REG_D14 = 35,
TriCore_REG_D15 = 36,
TriCore_REG_E0 = 37,
TriCore_REG_E2 = 38,
TriCore_REG_E4 = 39,
TriCore_REG_E6 = 40,
TriCore_REG_E8 = 41,
TriCore_REG_E10 = 42,
TriCore_REG_E12 = 43,
TriCore_REG_E14 = 44,
TriCore_REG_P0 = 45,
TriCore_REG_P2 = 46,
TriCore_REG_P4 = 47,
TriCore_REG_P6 = 48,
TriCore_REG_P8 = 49,
TriCore_REG_P10 = 50,
TriCore_REG_P12 = 51,
TriCore_REG_P14 = 52,
TriCore_REG_A0_A1 = 53,
TriCore_REG_A2_A3 = 54,
TriCore_REG_A4_A5 = 55,
TriCore_REG_A6_A7 = 56,
TriCore_REG_A8_A9 = 57,
TriCore_REG_A10_A11 = 58,
TriCore_REG_A12_A13 = 59,
TriCore_REG_A14_A15 = 60,
TriCore_REG_FCX = 1,
TriCore_REG_PC = 2,
TriCore_REG_PCXI = 3,
TriCore_REG_PSW = 4,
TriCore_REG_A0 = 5,
TriCore_REG_A1 = 6,
TriCore_REG_A2 = 7,
TriCore_REG_A3 = 8,
TriCore_REG_A4 = 9,
TriCore_REG_A5 = 10,
TriCore_REG_A6 = 11,
TriCore_REG_A7 = 12,
TriCore_REG_A8 = 13,
TriCore_REG_A9 = 14,
TriCore_REG_A10 = 15,
TriCore_REG_A11 = 16,
TriCore_REG_A12 = 17,
TriCore_REG_A13 = 18,
TriCore_REG_A14 = 19,
TriCore_REG_A15 = 20,
TriCore_REG_D0 = 21,
TriCore_REG_D1 = 22,
TriCore_REG_D2 = 23,
TriCore_REG_D3 = 24,
TriCore_REG_D4 = 25,
TriCore_REG_D5 = 26,
TriCore_REG_D6 = 27,
TriCore_REG_D7 = 28,
TriCore_REG_D8 = 29,
TriCore_REG_D9 = 30,
TriCore_REG_D10 = 31,
TriCore_REG_D11 = 32,
TriCore_REG_D12 = 33,
TriCore_REG_D13 = 34,
TriCore_REG_D14 = 35,
TriCore_REG_D15 = 36,
TriCore_REG_E0 = 37,
TriCore_REG_E2 = 38,
TriCore_REG_E4 = 39,
TriCore_REG_E6 = 40,
TriCore_REG_E8 = 41,
TriCore_REG_E10 = 42,
TriCore_REG_E12 = 43,
TriCore_REG_E14 = 44,
TriCore_REG_P0 = 45,
TriCore_REG_P2 = 46,
TriCore_REG_P4 = 47,
TriCore_REG_P6 = 48,
TriCore_REG_P8 = 49,
TriCore_REG_P10 = 50,
TriCore_REG_P12 = 51,
TriCore_REG_P14 = 52,
TriCore_REG_A0_A1 = 53,
TriCore_REG_A2_A3 = 54,
TriCore_REG_A4_A5 = 55,
TriCore_REG_A6_A7 = 56,
TriCore_REG_A8_A9 = 57,
TriCore_REG_A10_A11 = 58,
TriCore_REG_A12_A13 = 59,
TriCore_REG_A14_A15 = 60,
TriCore_REG_ENDING, // <-- mark the end of the list of registers
} tricore_reg;

3
suite/test_corpus.py
View File

@ -32,6 +32,7 @@ def test_file(fname):
"CS_ARCH_X86": CS_ARCH_X86,
"CS_ARCH_XCORE": CS_ARCH_XCORE,
"CS_ARCH_RISCV": CS_ARCH_RISCV,
"CS_ARCH_TRICORE": CS_ARCH_TRICORE,
}
modes = {
@ -60,6 +61,7 @@ def test_file(fname):
"CS_MODE_MIPS64+CS_MODE_BIG_ENDIAN": CS_MODE_MIPS64+CS_MODE_BIG_ENDIAN,
"CS_MODE_RISCV32": CS_MODE_RISCV32,
"CS_MODE_RISCV64": CS_MODE_RISCV64,
"CS_MODE_TRICORE": CS_MODE_TRICORE,
}
mc_modes = {
@ -96,6 +98,7 @@ def test_file(fname):
("CS_ARCH_BPF", "CS_MODE_BIG_ENDIAN+CS_MODE_BPF_EXTENDED"): 32,
("CS_ARCH_RISCV", "CS_MODE_RISCV32"): 44,
("CS_ARCH_RISCV", "CS_MODE_RISCV64"): 45,
("CS_ARCH_TRICORE", "CS_MODE_TRICORE"): 45,
}
#if not option in ('', 'None'):