Magic-Mirror/capstone
1
0
Fork 0
mirror of https://github.com/capstone-engine/capstone.git synced 2025-02-22 23:50:35 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

rename all the constants marking ending from _MAX to _ENDING. this also updates Java/Python/Ocaml bindings accordingly

Browse Source
This commit is contained in:
Nguyen Anh Quynh 2014-09-29 17:15:25 +08:00
parent 0b702b892d
commit d7e42b7d36
40 changed files with 121 additions and 121 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
arch/AArch64/AArch64Mapping.c
View File

@ -283,7 +283,7 @@ static name_map reg_name_maps[] = {
const char *AArch64_reg_name(csh handle, unsigned int reg)
{
#ifndef CAPSTONE_DIET
if (reg >= ARM64_REG_MAX)
if (reg >= ARM64_REG_ENDING)
return NULL;
return reg_name_maps[reg].name;
@ -14781,7 +14781,7 @@ const char *AArch64_insn_name(csh handle, unsigned int id)
#ifndef CAPSTONE_DIET
unsigned int i;
if (id >= ARM64_INS_MAX)
if (id >= ARM64_INS_ENDING)
return NULL;
if (id < ARR_SIZE(insn_name_maps))
@ -14815,7 +14815,7 @@ static name_map group_name_maps[] = {
const char *AArch64_group_name(csh handle, unsigned int id)
{
#ifndef CAPSTONE_DIET
if (id >= ARM64_GRP_MAX)
if (id >= ARM64_GRP_ENDING)
return NULL;
return group_name_maps[id].name;

8
arch/ARM/ARMMapping.c
View File

@ -245,7 +245,7 @@ static name_map reg_name_maps2[] = {
const char *ARM_reg_name(csh handle, unsigned int reg)
{
#ifndef CAPSTONE_DIET
if (reg >= ARM_REG_MAX)
if (reg >= ARM_REG_ENDING)
return NULL;
return reg_name_maps[reg].name;
@ -257,7 +257,7 @@ const char *ARM_reg_name(csh handle, unsigned int reg)
const char *ARM_reg_name2(csh handle, unsigned int reg)
{
#ifndef CAPSTONE_DIET
if (reg >= ARM_REG_MAX)
if (reg >= ARM_REG_ENDING)
return NULL;
return reg_name_maps2[reg].name;
@ -14021,7 +14021,7 @@ static name_map insn_name_maps[] = {
const char *ARM_insn_name(csh handle, unsigned int id)
{
#ifndef CAPSTONE_DIET
if (id >= ARM_INS_MAX)
if (id >= ARM_INS_ENDING)
return NULL;
return insn_name_maps[id].name;
@ -14072,7 +14072,7 @@ static name_map group_name_maps[] = {
const char *ARM_group_name(csh handle, unsigned int id)
{
#ifndef CAPSTONE_DIET
if (id >= ARM_GRP_MAX)
if (id >= ARM_GRP_ENDING)
return NULL;
return group_name_maps[id].name;

6
arch/Mips/MipsMapping.c
View File

@ -192,7 +192,7 @@ static name_map reg_name_maps[] = {
const char *Mips_reg_name(csh handle, unsigned int reg)
{
#ifndef CAPSTONE_DIET
if (reg >= MIPS_REG_MAX)
if (reg >= MIPS_REG_ENDING)
return NULL;
return reg_name_maps[reg].name;
@ -9875,7 +9875,7 @@ static name_map insn_name_maps[] = {
const char *Mips_insn_name(csh handle, unsigned int id)
{
#ifndef CAPSTONE_DIET
if (id >= MIPS_INS_MAXIMUM)
if (id >= MIPS_INS_ENDING)
return NULL;
return insn_name_maps[id].name;
@ -9933,7 +9933,7 @@ static name_map group_name_maps[] = {
const char *Mips_group_name(csh handle, unsigned int id)
{
#ifndef CAPSTONE_DIET
if (id >= MIPS_GRP_MAX)
if (id >= MIPS_GRP_ENDING)
return NULL;
return group_name_maps[id].name;

6
arch/PowerPC/PPCMapping.c
View File

@ -202,7 +202,7 @@ static name_map reg_name_maps[] = {
const char *PPC_reg_name(csh handle, unsigned int reg)
{
#ifndef CAPSTONE_DIET
if (reg >= PPC_REG_MAX)
if (reg >= PPC_REG_ENDING)
return NULL;
return reg_name_maps[reg].name;
@ -7875,7 +7875,7 @@ const char *PPC_insn_name(csh handle, unsigned int id)
#ifndef CAPSTONE_DIET
unsigned int i;
if (id >= PPC_INS_MAX)
if (id >= PPC_INS_ENDING)
return NULL;
// handle special alias first
@ -7911,7 +7911,7 @@ static name_map group_name_maps[] = {
const char *PPC_group_name(csh handle, unsigned int id)
{
#ifndef CAPSTONE_DIET
if (id >= PPC_GRP_MAX)
if (id >= PPC_GRP_ENDING)
return NULL;
return group_name_maps[id].name;

6
arch/Sparc/SparcMapping.c
View File

@ -112,7 +112,7 @@ static name_map reg_name_maps[] = {
const char *Sparc_reg_name(csh handle, unsigned int reg)
{
#ifndef CAPSTONE_DIET
if (reg >= SPARC_REG_MAX)
if (reg >= SPARC_REG_ENDING)
return NULL;
return reg_name_maps[reg].name;
@ -3130,7 +3130,7 @@ const char *Sparc_insn_name(csh handle, unsigned int id)
#ifndef CAPSTONE_DIET
unsigned int i;
if (id >= SPARC_INS_MAX)
if (id >= SPARC_INS_ENDING)
return NULL;
// handle special alias first
@ -3163,7 +3163,7 @@ static name_map group_name_maps[] = {
const char *Sparc_group_name(csh handle, unsigned int id)
{
#ifndef CAPSTONE_DIET
if (id >= SPARC_GRP_MAX)
if (id >= SPARC_GRP_ENDING)
return NULL;
return group_name_maps[id].name;

6
arch/SystemZ/SystemZMapping.c
View File

@ -57,7 +57,7 @@ static name_map reg_name_maps[] = {
const char *SystemZ_reg_name(csh handle, unsigned int reg)
{
#ifndef CAPSTONE_DIET
if (reg >= SYSZ_REG_MAX)
if (reg >= SYSZ_REG_ENDING)
return NULL;
return reg_name_maps[reg].name;
@ -5041,7 +5041,7 @@ const char *SystemZ_insn_name(csh handle, unsigned int id)
#ifndef CAPSTONE_DIET
unsigned int i;
if (id >= SYSZ_INS_MAX)
if (id >= SYSZ_INS_ENDING)
return NULL;
// handle special alias first
@ -5072,7 +5072,7 @@ static name_map group_name_maps[] = {
const char *SystemZ_group_name(csh handle, unsigned int id)
{
#ifndef CAPSTONE_DIET
if (id >= SYSZ_GRP_MAX)
if (id >= SYSZ_GRP_ENDING)
return NULL;
return group_name_maps[id].name;

6
arch/X86/X86Mapping.c
View File

@ -795,7 +795,7 @@ const char *X86_reg_name(csh handle, unsigned int reg)
#ifndef CAPSTONE_DIET
cs_struct *ud = (cs_struct *)handle;
if (reg >= X86_REG_MAX)
if (reg >= X86_REG_ENDING)
return NULL;
if (reg == X86_REG_EFLAGS) {
@ -2118,7 +2118,7 @@ static name_map insn_name_maps[] = {
const char *X86_insn_name(csh handle, unsigned int id)
{
#ifndef CAPSTONE_DIET
if (id >= X86_INS_MAX)
if (id >= X86_INS_ENDING)
return NULL;
return insn_name_maps[id].name;
@ -2183,7 +2183,7 @@ static name_map group_name_maps[] = {
const char *X86_group_name(csh handle, unsigned int id)
{
#ifndef CAPSTONE_DIET
if (id >= X86_GRP_MAX)
if (id >= X86_GRP_ENDING)
return NULL;
return group_name_maps[id].name;

6
arch/XCore/XCoreMapping.c
View File

@ -49,7 +49,7 @@ static name_map reg_name_maps[] = {
const char *XCore_reg_name(csh handle, unsigned int reg)
{
#ifndef CAPSTONE_DIET
if (reg >= XCORE_REG_MAX)
if (reg >= XCORE_REG_ENDING)
return NULL;
return reg_name_maps[reg].name;
@ -1533,7 +1533,7 @@ const char *XCore_insn_name(csh handle, unsigned int id)
#ifndef CAPSTONE_DIET
unsigned int i;
if (id >= XCORE_INS_MAX)
if (id >= XCORE_INS_ENDING)
return NULL;
// handle special alias first
@ -1558,7 +1558,7 @@ static name_map group_name_maps[] = {
const char *XCore_group_name(csh handle, unsigned int id)
{
#ifndef CAPSTONE_DIET
if (id >= XCORE_GRP_MAX)
if (id >= XCORE_GRP_ENDING)
return NULL;
return group_name_maps[id].name;

6
bindings/java/capstone/Arm64_const.java
View File

@ -567,7 +567,7 @@ public class Arm64_const {
public static final int ARM64_REG_V29 = 257;
public static final int ARM64_REG_V30 = 258;
public static final int ARM64_REG_V31 = 259;
public static final int ARM64_REG_MAX = 260;
public static final int ARM64_REG_ENDING = 260;
// alias registers
public static final int ARM64_REG_IP1 = ARM64_REG_X16;
@ -1029,7 +1029,7 @@ public class Arm64_const {
public static final int ARM64_INS_DC = 449;
public static final int ARM64_INS_AT = 450;
public static final int ARM64_INS_TLBI = 451;
public static final int ARM64_INS_MAX = 452;
public static final int ARM64_INS_ENDING = 452;
// Group of ARM64 instructions
@ -1039,5 +1039,5 @@ public class Arm64_const {
public static final int ARM64_GRP_NEON = 3;
public static final int ARM64_GRP_CRC = 4;
public static final int ARM64_GRP_JUMP = 5;
public static final int ARM64_GRP_MAX = 6;
public static final int ARM64_GRP_ENDING = 6;
}

6
bindings/java/capstone/Arm_const.java
View File

@ -255,7 +255,7 @@ public class Arm_const {
public static final int ARM_REG_S29 = 108;
public static final int ARM_REG_S30 = 109;
public static final int ARM_REG_S31 = 110;
public static final int ARM_REG_MAX = 111;
public static final int ARM_REG_ENDING = 111;
// alias registers
public static final int ARM_REG_R13 = ARM_REG_SP;
@ -703,7 +703,7 @@ public class Arm_const {
public static final int ARM_INS_SEVL = 432;
public static final int ARM_INS_VPUSH = 433;
public static final int ARM_INS_VPOP = 434;
public static final int ARM_INS_MAX = 435;
public static final int ARM_INS_ENDING = 435;
// Group of ARM instructions
@ -740,5 +740,5 @@ public class Arm_const {
public static final int ARM_GRP_DPVFP = 30;
public static final int ARM_GRP_V6M = 31;
public static final int ARM_GRP_JUMP = 32;
public static final int ARM_GRP_MAX = 33;
public static final int ARM_GRP_ENDING = 33;
}

6
bindings/java/capstone/Mips_const.java
View File

@ -161,7 +161,7 @@ public class Mips_const {
public static final int MIPS_REG_MPL0 = 134;
public static final int MIPS_REG_MPL1 = 135;
public static final int MIPS_REG_MPL2 = 136;
public static final int MIPS_REG_MAX = 137;
public static final int MIPS_REG_ENDING = 137;
public static final int MIPS_REG_ZERO = MIPS_REG_0;
public static final int MIPS_REG_AT = MIPS_REG_1;
public static final int MIPS_REG_V0 = MIPS_REG_2;
@ -796,7 +796,7 @@ public class Mips_const {
// special instructions
public static final int MIPS_INS_JALR_HB = 584;
public static final int MIPS_INS_JR_HB = 585;
public static final int MIPS_INS_MAXIMUM = 586;
public static final int MIPS_INS_ENDING = 586;
// Group of MIPS instructions
@ -835,5 +835,5 @@ public class Mips_const {
public static final int MIPS_GRP_GP32BIT = 32;
public static final int MIPS_GRP_GP64BIT = 33;
public static final int MIPS_GRP_JUMP = 34;
public static final int MIPS_GRP_MAX = 35;
public static final int MIPS_GRP_ENDING = 35;
}

6
bindings/java/capstone/Ppc_const.java
View File

@ -210,7 +210,7 @@ public class Ppc_const {
public static final int PPC_REG_CTR8 = 175;
public static final int PPC_REG_LR8 = 176;
public static final int PPC_REG_CR1EQ = 177;
public static final int PPC_REG_MAX = 178;
public static final int PPC_REG_ENDING = 178;
// PPC instruction
@ -1148,7 +1148,7 @@ public class Ppc_const {
public static final int PPC_INS_BDNZFLRL = 931;
public static final int PPC_INS_BDZTLRL = 932;
public static final int PPC_INS_BDZFLRL = 933;
public static final int PPC_INS_MAX = 934;
public static final int PPC_INS_ENDING = 934;
// Group of PPC instructions
@ -1164,5 +1164,5 @@ public class Ppc_const {
public static final int PPC_GRP_PPC4XX = 9;
public static final int PPC_GRP_PPC6XX = 10;
public static final int PPC_GRP_JUMP = 11;
public static final int PPC_GRP_MAX = 12;
public static final int PPC_GRP_ENDING = 12;
}

6
bindings/java/capstone/Sparc_const.java
View File

@ -147,7 +147,7 @@ public class Sparc_const {
public static final int SPARC_REG_SP = 85;
public static final int SPARC_REG_Y = 86;
public static final int SPARC_REG_XCC = 87;
public static final int SPARC_REG_MAX = 88;
public static final int SPARC_REG_ENDING = 88;
public static final int SPARC_REG_O6 = SPARC_REG_SP;
public static final int SPARC_REG_I6 = SPARC_REG_FP;
@ -432,7 +432,7 @@ public class Sparc_const {
public static final int SPARC_INS_XOR = 276;
public static final int SPARC_INS_RET = 277;
public static final int SPARC_INS_RETL = 278;
public static final int SPARC_INS_MAX = 279;
public static final int SPARC_INS_ENDING = 279;
// Group of SPARC instructions
@ -445,5 +445,5 @@ public class Sparc_const {
public static final int SPARC_GRP_32BIT = 6;
public static final int SPARC_GRP_64BIT = 7;
public static final int SPARC_GRP_JUMP = 8;
public static final int SPARC_GRP_MAX = 9;
public static final int SPARC_GRP_ENDING = 9;
}

6
bindings/java/capstone/Sysz_const.java
View File

@ -66,7 +66,7 @@ public class Sysz_const {
public static final int SYSZ_REG_F14 = 32;
public static final int SYSZ_REG_F15 = 33;
public static final int SYSZ_REG_R0L = 34;
public static final int SYSZ_REG_MAX = 35;
public static final int SYSZ_REG_ENDING = 35;
// SystemZ instruction
@ -752,7 +752,7 @@ public class Sysz_const {
public static final int SYSZ_INS_XR = 679;
public static final int SYSZ_INS_XRK = 680;
public static final int SYSZ_INS_XY = 681;
public static final int SYSZ_INS_MAX = 682;
public static final int SYSZ_INS_ENDING = 682;
// Group of SystemZ instructions
@ -763,5 +763,5 @@ public class Sysz_const {
public static final int SYSZ_GRP_INTERLOCKEDACCESS1 = 4;
public static final int SYSZ_GRP_LOADSTOREONCOND = 5;
public static final int SYSZ_GRP_JUMP = 6;
public static final int SYSZ_GRP_MAX = 7;
public static final int SYSZ_GRP_ENDING = 7;
}

6
bindings/java/capstone/X86_const.java
View File

@ -239,7 +239,7 @@ public class X86_const {
public static final int X86_REG_R13W = 231;
public static final int X86_REG_R14W = 232;
public static final int X86_REG_R15W = 233;
public static final int X86_REG_MAX = 234;
public static final int X86_REG_ENDING = 234;
// Operand type for instruction's operands
@ -1621,7 +1621,7 @@ public class X86_const {
public static final int X86_INS_XSHA256 = 1295;
public static final int X86_INS_XSTORE = 1296;
public static final int X86_INS_XTEST = 1297;
public static final int X86_INS_MAX = 1298;
public static final int X86_INS_ENDING = 1298;
// Group of X86 instructions
@ -1672,5 +1672,5 @@ public class X86_const {
public static final int X86_GRP_IRET = 44;
public static final int X86_GRP_CALL = 45;
public static final int X86_GRP_RET = 46;
public static final int X86_GRP_MAX = 47;
public static final int X86_GRP_ENDING = 47;
}

6
bindings/java/capstone/Xcore_const.java
View File

@ -40,7 +40,7 @@ public class Xcore_const {
public static final int XCORE_REG_KEP = 23;
public static final int XCORE_REG_KSP = 24;
public static final int XCORE_REG_ID = 25;
public static final int XCORE_REG_MAX = 26;
public static final int XCORE_REG_ENDING = 26;
// XCore instruction
@ -165,11 +165,11 @@ public class Xcore_const {
public static final int XCORE_INS_WAITEU = 118;
public static final int XCORE_INS_XOR = 119;
public static final int XCORE_INS_ZEXT = 120;
public static final int XCORE_INS_MAX = 121;
public static final int XCORE_INS_ENDING = 121;
// Group of XCore instructions
public static final int XCORE_GRP_INVALID = 0;
public static final int XCORE_GRP_JUMP = 1;
public static final int XCORE_GRP_MAX = 2;
public static final int XCORE_GRP_ENDING = 2;
}

6
bindings/ocaml/arm64_const.ml
View File

@ -564,7 +564,7 @@ let _ARM64_REG_V28 = 256;;
let _ARM64_REG_V29 = 257;;
let _ARM64_REG_V30 = 258;;
let _ARM64_REG_V31 = 259;;
let _ARM64_REG_MAX = 260;;
let _ARM64_REG_ENDING = 260;;
(* alias registers *)
let _ARM64_REG_IP1 = _ARM64_REG_X16;;
@ -1026,7 +1026,7 @@ let _ARM64_INS_IC = 448;;
let _ARM64_INS_DC = 449;;
let _ARM64_INS_AT = 450;;
let _ARM64_INS_TLBI = 451;;
let _ARM64_INS_MAX = 452;;
let _ARM64_INS_ENDING = 452;;
(* Group of ARM64 instructions *)
@ -1036,4 +1036,4 @@ let _ARM64_GRP_FPARMV8 = 2;;
let _ARM64_GRP_NEON = 3;;
let _ARM64_GRP_CRC = 4;;
let _ARM64_GRP_JUMP = 5;;
let _ARM64_GRP_MAX = 6;;
let _ARM64_GRP_ENDING = 6;;

6
bindings/ocaml/arm_const.ml
View File

@ -252,7 +252,7 @@ let _ARM_REG_S28 = 107;;
let _ARM_REG_S29 = 108;;
let _ARM_REG_S30 = 109;;
let _ARM_REG_S31 = 110;;
let _ARM_REG_MAX = 111;;
let _ARM_REG_ENDING = 111;;
(* alias registers *)
let _ARM_REG_R13 = _ARM_REG_SP;;
@ -700,7 +700,7 @@ let _ARM_INS_SEV = 431;;
let _ARM_INS_SEVL = 432;;
let _ARM_INS_VPUSH = 433;;
let _ARM_INS_VPOP = 434;;
let _ARM_INS_MAX = 435;;
let _ARM_INS_ENDING = 435;;
(* Group of ARM instructions *)
@ -737,4 +737,4 @@ let _ARM_GRP_CRC = 29;;
let _ARM_GRP_DPVFP = 30;;
let _ARM_GRP_V6M = 31;;
let _ARM_GRP_JUMP = 32;;
let _ARM_GRP_MAX = 33;;
let _ARM_GRP_ENDING = 33;;

6
bindings/ocaml/mips_const.ml
View File

@ -158,7 +158,7 @@ let _MIPS_REG_P2 = 133;;
let _MIPS_REG_MPL0 = 134;;
let _MIPS_REG_MPL1 = 135;;
let _MIPS_REG_MPL2 = 136;;
let _MIPS_REG_MAX = 137;;
let _MIPS_REG_ENDING = 137;;
let _MIPS_REG_ZERO = _MIPS_REG_0;;
let _MIPS_REG_AT = _MIPS_REG_1;;
let _MIPS_REG_V0 = _MIPS_REG_2;;
@ -793,7 +793,7 @@ let _MIPS_INS_NEGU = 583;;
(* special instructions *)
let _MIPS_INS_JALR_HB = 584;;
let _MIPS_INS_JR_HB = 585;;
let _MIPS_INS_MAXIMUM = 586;;
let _MIPS_INS_ENDING = 586;;
(* Group of MIPS instructions *)
@ -832,4 +832,4 @@ let _MIPS_GRP_MIPS5_32R2 = 31;;
let _MIPS_GRP_GP32BIT = 32;;
let _MIPS_GRP_GP64BIT = 33;;
let _MIPS_GRP_JUMP = 34;;
let _MIPS_GRP_MAX = 35;;
let _MIPS_GRP_ENDING = 35;;

6
bindings/ocaml/ppc_const.ml
View File

@ -207,7 +207,7 @@ let _PPC_REG_RM = 174;;
let _PPC_REG_CTR8 = 175;;
let _PPC_REG_LR8 = 176;;
let _PPC_REG_CR1EQ = 177;;
let _PPC_REG_MAX = 178;;
let _PPC_REG_ENDING = 178;;
(* PPC instruction *)
@ -1145,7 +1145,7 @@ let _PPC_INS_BDNZTLRL = 930;;
let _PPC_INS_BDNZFLRL = 931;;
let _PPC_INS_BDZTLRL = 932;;
let _PPC_INS_BDZFLRL = 933;;
let _PPC_INS_MAX = 934;;
let _PPC_INS_ENDING = 934;;
(* Group of PPC instructions *)
@ -1161,4 +1161,4 @@ let _PPC_GRP_E500 = 8;;
let _PPC_GRP_PPC4XX = 9;;
let _PPC_GRP_PPC6XX = 10;;
let _PPC_GRP_JUMP = 11;;
let _PPC_GRP_MAX = 12;;
let _PPC_GRP_ENDING = 12;;

6
bindings/ocaml/sparc_const.ml
View File

@ -144,7 +144,7 @@ let _SPARC_REG_O7 = 84;;
let _SPARC_REG_SP = 85;;
let _SPARC_REG_Y = 86;;
let _SPARC_REG_XCC = 87;;
let _SPARC_REG_MAX = 88;;
let _SPARC_REG_ENDING = 88;;
let _SPARC_REG_O6 = _SPARC_REG_SP;;
let _SPARC_REG_I6 = _SPARC_REG_FP;;
@ -429,7 +429,7 @@ let _SPARC_INS_XORCC = 275;;
let _SPARC_INS_XOR = 276;;
let _SPARC_INS_RET = 277;;
let _SPARC_INS_RETL = 278;;
let _SPARC_INS_MAX = 279;;
let _SPARC_INS_ENDING = 279;;
(* Group of SPARC instructions *)
@ -442,4 +442,4 @@ let _SPARC_GRP_VIS3 = 5;;
let _SPARC_GRP_32BIT = 6;;
let _SPARC_GRP_64BIT = 7;;
let _SPARC_GRP_JUMP = 8;;
let _SPARC_GRP_MAX = 9;;
let _SPARC_GRP_ENDING = 9;;

6
bindings/ocaml/sysz_const.ml
View File

@ -63,7 +63,7 @@ let _SYSZ_REG_F13 = 31;;
let _SYSZ_REG_F14 = 32;;
let _SYSZ_REG_F15 = 33;;
let _SYSZ_REG_R0L = 34;;
let _SYSZ_REG_MAX = 35;;
let _SYSZ_REG_ENDING = 35;;
(* SystemZ instruction *)
@ -749,7 +749,7 @@ let _SYSZ_INS_XIY = 678;;
let _SYSZ_INS_XR = 679;;
let _SYSZ_INS_XRK = 680;;
let _SYSZ_INS_XY = 681;;
let _SYSZ_INS_MAX = 682;;
let _SYSZ_INS_ENDING = 682;;
(* Group of SystemZ instructions *)
@ -760,4 +760,4 @@ let _SYSZ_GRP_HIGHWORD = 3;;
let _SYSZ_GRP_INTERLOCKEDACCESS1 = 4;;
let _SYSZ_GRP_LOADSTOREONCOND = 5;;
let _SYSZ_GRP_JUMP = 6;;
let _SYSZ_GRP_MAX = 7;;
let _SYSZ_GRP_ENDING = 7;;

6
bindings/ocaml/x86_const.ml
View File

@ -236,7 +236,7 @@ let _X86_REG_R12W = 230;;
let _X86_REG_R13W = 231;;
let _X86_REG_R14W = 232;;
let _X86_REG_R15W = 233;;
let _X86_REG_MAX = 234;;
let _X86_REG_ENDING = 234;;
(* Operand type for instruction's operands *)
@ -1618,7 +1618,7 @@ let _X86_INS_XSHA1 = 1294;;
let _X86_INS_XSHA256 = 1295;;
let _X86_INS_XSTORE = 1296;;
let _X86_INS_XTEST = 1297;;
let _X86_INS_MAX = 1298;;
let _X86_INS_ENDING = 1298;;
(* Group of X86 instructions *)
@ -1669,4 +1669,4 @@ let _X86_GRP_INT = 43;;
let _X86_GRP_IRET = 44;;
let _X86_GRP_CALL = 45;;
let _X86_GRP_RET = 46;;
let _X86_GRP_MAX = 47;;
let _X86_GRP_ENDING = 47;;

6
bindings/ocaml/xcore_const.ml
View File

@ -37,7 +37,7 @@ let _XCORE_REG_SED = 22;;
let _XCORE_REG_KEP = 23;;
let _XCORE_REG_KSP = 24;;
let _XCORE_REG_ID = 25;;
let _XCORE_REG_MAX = 26;;
let _XCORE_REG_ENDING = 26;;
(* XCore instruction *)
@ -162,10 +162,10 @@ let _XCORE_INS_WAITET = 117;;
let _XCORE_INS_WAITEU = 118;;
let _XCORE_INS_XOR = 119;;
let _XCORE_INS_ZEXT = 120;;
let _XCORE_INS_MAX = 121;;
let _XCORE_INS_ENDING = 121;;
(* Group of XCore instructions *)
let _XCORE_GRP_INVALID = 0;;
let _XCORE_GRP_JUMP = 1;;
let _XCORE_GRP_MAX = 2;;
let _XCORE_GRP_ENDING = 2;;

6
bindings/python/capstone/arm64_const.py
View File

@ -564,7 +564,7 @@ ARM64_REG_V28 = 256
ARM64_REG_V29 = 257
ARM64_REG_V30 = 258
ARM64_REG_V31 = 259
ARM64_REG_MAX = 260
ARM64_REG_ENDING = 260
# alias registers
ARM64_REG_IP1 = ARM64_REG_X16
@ -1026,7 +1026,7 @@ ARM64_INS_IC = 448
ARM64_INS_DC = 449
ARM64_INS_AT = 450
ARM64_INS_TLBI = 451
ARM64_INS_MAX = 452
ARM64_INS_ENDING = 452
# Group of ARM64 instructions
@ -1036,4 +1036,4 @@ ARM64_GRP_FPARMV8 = 2
ARM64_GRP_NEON = 3
ARM64_GRP_CRC = 4
ARM64_GRP_JUMP = 5
ARM64_GRP_MAX = 6
ARM64_GRP_ENDING = 6

6
bindings/python/capstone/arm_const.py
View File

@ -252,7 +252,7 @@ ARM_REG_S28 = 107
ARM_REG_S29 = 108
ARM_REG_S30 = 109
ARM_REG_S31 = 110
ARM_REG_MAX = 111
ARM_REG_ENDING = 111
# alias registers
ARM_REG_R13 = ARM_REG_SP
@ -700,7 +700,7 @@ ARM_INS_SEV = 431
ARM_INS_SEVL = 432
ARM_INS_VPUSH = 433
ARM_INS_VPOP = 434
ARM_INS_MAX = 435
ARM_INS_ENDING = 435
# Group of ARM instructions
@ -737,4 +737,4 @@ ARM_GRP_CRC = 29
ARM_GRP_DPVFP = 30
ARM_GRP_V6M = 31
ARM_GRP_JUMP = 32
ARM_GRP_MAX = 33
ARM_GRP_ENDING = 33

6
bindings/python/capstone/mips_const.py
View File

@ -158,7 +158,7 @@ MIPS_REG_P2 = 133
MIPS_REG_MPL0 = 134
MIPS_REG_MPL1 = 135
MIPS_REG_MPL2 = 136
MIPS_REG_MAX = 137
MIPS_REG_ENDING = 137
MIPS_REG_ZERO = MIPS_REG_0
MIPS_REG_AT = MIPS_REG_1
MIPS_REG_V0 = MIPS_REG_2
@ -793,7 +793,7 @@ MIPS_INS_NEGU = 583
# special instructions
MIPS_INS_JALR_HB = 584
MIPS_INS_JR_HB = 585
MIPS_INS_MAXIMUM = 586
MIPS_INS_ENDING = 586
# Group of MIPS instructions
@ -832,4 +832,4 @@ MIPS_GRP_MIPS5_32R2 = 31
MIPS_GRP_GP32BIT = 32
MIPS_GRP_GP64BIT = 33
MIPS_GRP_JUMP = 34
MIPS_GRP_MAX = 35
MIPS_GRP_ENDING = 35

6
bindings/python/capstone/ppc_const.py
View File

@ -207,7 +207,7 @@ PPC_REG_RM = 174
PPC_REG_CTR8 = 175
PPC_REG_LR8 = 176
PPC_REG_CR1EQ = 177
PPC_REG_MAX = 178
PPC_REG_ENDING = 178
# PPC instruction
@ -1145,7 +1145,7 @@ PPC_INS_BDNZTLRL = 930
PPC_INS_BDNZFLRL = 931
PPC_INS_BDZTLRL = 932
PPC_INS_BDZFLRL = 933
PPC_INS_MAX = 934
PPC_INS_ENDING = 934
# Group of PPC instructions
@ -1161,4 +1161,4 @@ PPC_GRP_E500 = 8
PPC_GRP_PPC4XX = 9
PPC_GRP_PPC6XX = 10
PPC_GRP_JUMP = 11
PPC_GRP_MAX = 12
PPC_GRP_ENDING = 12

6
bindings/python/capstone/sparc_const.py
View File

@ -144,7 +144,7 @@ SPARC_REG_O7 = 84
SPARC_REG_SP = 85
SPARC_REG_Y = 86
SPARC_REG_XCC = 87
SPARC_REG_MAX = 88
SPARC_REG_ENDING = 88
SPARC_REG_O6 = SPARC_REG_SP
SPARC_REG_I6 = SPARC_REG_FP
@ -429,7 +429,7 @@ SPARC_INS_XORCC = 275
SPARC_INS_XOR = 276
SPARC_INS_RET = 277
SPARC_INS_RETL = 278
SPARC_INS_MAX = 279
SPARC_INS_ENDING = 279
# Group of SPARC instructions
@ -442,4 +442,4 @@ SPARC_GRP_VIS3 = 5
SPARC_GRP_32BIT = 6
SPARC_GRP_64BIT = 7
SPARC_GRP_JUMP = 8
SPARC_GRP_MAX = 9
SPARC_GRP_ENDING = 9

6
bindings/python/capstone/sysz_const.py
View File

@ -63,7 +63,7 @@ SYSZ_REG_F13 = 31
SYSZ_REG_F14 = 32
SYSZ_REG_F15 = 33
SYSZ_REG_R0L = 34
SYSZ_REG_MAX = 35
SYSZ_REG_ENDING = 35
# SystemZ instruction
@ -749,7 +749,7 @@ SYSZ_INS_XIY = 678
SYSZ_INS_XR = 679
SYSZ_INS_XRK = 680
SYSZ_INS_XY = 681
SYSZ_INS_MAX = 682
SYSZ_INS_ENDING = 682
# Group of SystemZ instructions
@ -760,4 +760,4 @@ SYSZ_GRP_HIGHWORD = 3
SYSZ_GRP_INTERLOCKEDACCESS1 = 4
SYSZ_GRP_LOADSTOREONCOND = 5
SYSZ_GRP_JUMP = 6
SYSZ_GRP_MAX = 7
SYSZ_GRP_ENDING = 7

6
bindings/python/capstone/x86_const.py
View File

@ -236,7 +236,7 @@ X86_REG_R12W = 230
X86_REG_R13W = 231
X86_REG_R14W = 232
X86_REG_R15W = 233
X86_REG_MAX = 234
X86_REG_ENDING = 234
# Operand type for instruction's operands
@ -1618,7 +1618,7 @@ X86_INS_XSHA1 = 1294
X86_INS_XSHA256 = 1295
X86_INS_XSTORE = 1296
X86_INS_XTEST = 1297
X86_INS_MAX = 1298
X86_INS_ENDING = 1298
# Group of X86 instructions
@ -1669,4 +1669,4 @@ X86_GRP_INT = 43
X86_GRP_IRET = 44
X86_GRP_CALL = 45
X86_GRP_RET = 46
X86_GRP_MAX = 47
X86_GRP_ENDING = 47

6
bindings/python/capstone/xcore_const.py
View File

@ -37,7 +37,7 @@ XCORE_REG_SED = 22
XCORE_REG_KEP = 23
XCORE_REG_KSP = 24
XCORE_REG_ID = 25
XCORE_REG_MAX = 26
XCORE_REG_ENDING = 26
# XCore instruction
@ -162,10 +162,10 @@ XCORE_INS_WAITET = 117
XCORE_INS_WAITEU = 118
XCORE_INS_XOR = 119
XCORE_INS_ZEXT = 120
XCORE_INS_MAX = 121
XCORE_INS_ENDING = 121
# Group of XCore instructions
XCORE_GRP_INVALID = 0
XCORE_GRP_JUMP = 1
XCORE_GRP_MAX = 2
XCORE_GRP_ENDING = 2

6
include/arm.h
View File

@ -346,7 +346,7 @@ typedef enum arm_reg {
ARM_REG_S30,
ARM_REG_S31,
ARM_REG_MAX, // <-- mark the end of the list or registers
ARM_REG_ENDING, // <-- mark the end of the list or registers
//> alias registers
ARM_REG_R13 = ARM_REG_SP,
@ -800,7 +800,7 @@ typedef enum arm_insn {
ARM_INS_VPUSH,
ARM_INS_VPOP,
ARM_INS_MAX, // <-- mark the end of the list of instructions
ARM_INS_ENDING, // <-- mark the end of the list of instructions
} arm_insn;
//> Group of ARM instructions
@ -840,7 +840,7 @@ typedef enum arm_insn_group {
ARM_GRP_JUMP, // all jump instructions (conditional+direct+indirect jumps)
ARM_GRP_MAX,
ARM_GRP_ENDING,
} arm_insn_group;
#ifdef __cplusplus

6
include/arm64.h
View File

@ -652,7 +652,7 @@ typedef enum arm64_reg {
ARM64_REG_V30,
ARM64_REG_V31,
ARM64_REG_MAX, // <-- mark the end of the list of registers
ARM64_REG_ENDING, // <-- mark the end of the list of registers
//> alias registers
@ -1124,7 +1124,7 @@ typedef enum arm64_insn {
ARM64_INS_AT,
ARM64_INS_TLBI,
ARM64_INS_MAX, // <-- mark the end of the list of insn
ARM64_INS_ENDING, // <-- mark the end of the list of insn
} arm64_insn;
//> Group of ARM64 instructions
@ -1138,7 +1138,7 @@ typedef enum arm64_insn_group {
ARM64_GRP_JUMP, // all jump instructions (conditional+direct+indirect jumps)
ARM64_GRP_MAX, // <-- mark the end of the list of groups
ARM64_GRP_ENDING, // <-- mark the end of the list of groups
} arm64_insn_group;
#ifdef __cplusplus

6
include/mips.h
View File

@ -207,7 +207,7 @@ typedef enum mips_reg {
MIPS_REG_MPL1,
MIPS_REG_MPL2,
MIPS_REG_MAX, // <-- mark the end of the list or registers
MIPS_REG_ENDING, // <-- mark the end of the list or registers
// alias registers
MIPS_REG_ZERO = MIPS_REG_0,
@ -848,7 +848,7 @@ typedef enum mips_insn {
MIPS_INS_JALR_HB, // jump and link with Hazard Barrier
MIPS_INS_JR_HB, // jump register with Hazard Barrier
MIPS_INS_MAXIMUM,
MIPS_INS_ENDING,
} mips_insn;
//> Group of MIPS instructions
@ -891,7 +891,7 @@ typedef enum mips_insn_group {
MIPS_GRP_JUMP, // all jump instructions (conditional+direct+indirect jumps)
MIPS_GRP_MAX,
MIPS_GRP_ENDING,
} mips_insn_group;
#ifdef __cplusplus

6
include/ppc.h
View File

@ -265,7 +265,7 @@ typedef enum ppc_reg {
PPC_REG_LR8,
PPC_REG_CR1EQ,
PPC_REG_MAX, // <-- mark the end of the list of registers
PPC_REG_ENDING, // <-- mark the end of the list of registers
} ppc_reg;
//> PPC instruction
@ -1209,7 +1209,7 @@ typedef enum ppc_insn {
PPC_INS_BDZTLRL,
PPC_INS_BDZFLRL,
PPC_INS_MAX, // <-- mark the end of the list of instructions
PPC_INS_ENDING, // <-- mark the end of the list of instructions
} ppc_insn;
//> Group of PPC instructions
@ -1229,7 +1229,7 @@ typedef enum ppc_insn_group {
PPC_GRP_JUMP, // all jump instructions (conditional+direct+indirect jumps)
PPC_GRP_MAX, // <-- mark the end of the list of groups
PPC_GRP_ENDING, // <-- mark the end of the list of groups
} ppc_insn_group;
#ifdef __cplusplus

6
include/sparc.h
View File

@ -197,7 +197,7 @@ typedef enum sparc_reg {
// special register
SPARC_REG_XCC,
SPARC_REG_MAX, // <-- mark the end of the list of registers
SPARC_REG_ENDING, // <-- mark the end of the list of registers
// extras
SPARC_REG_O6 = SPARC_REG_SP,
@ -489,7 +489,7 @@ typedef enum sparc_insn {
SPARC_INS_RET,
SPARC_INS_RETL,
SPARC_INS_MAX, // <-- mark the end of the list of instructions
SPARC_INS_ENDING, // <-- mark the end of the list of instructions
} sparc_insn;
//> Group of SPARC instructions
@ -506,7 +506,7 @@ typedef enum sparc_insn_group {
SPARC_GRP_JUMP, // all jump instructions (conditional+direct+indirect jumps)
SPARC_GRP_MAX, // <-- mark the end of the list of groups
SPARC_GRP_ENDING, // <-- mark the end of the list of groups
} sparc_insn_group;
#ifdef __cplusplus

6
include/systemz.h
View File

@ -112,7 +112,7 @@ typedef enum sysz_reg {
SYSZ_REG_R0L,
SYSZ_REG_MAX,
SYSZ_REG_ENDING,
} sysz_reg;
//> SystemZ instruction
@ -801,7 +801,7 @@ typedef enum sysz_insn {
SYSZ_INS_XRK,
SYSZ_INS_XY,
SYSZ_INS_MAX, // <-- mark the end of the list of instructions
SYSZ_INS_ENDING, // <-- mark the end of the list of instructions
} sysz_insn;
//> Group of SystemZ instructions
@ -815,7 +815,7 @@ typedef enum sysz_insn_group {
SYSZ_GRP_JUMP, // all jump instructions (conditional+direct+indirect jumps)
SYSZ_GRP_MAX, // <-- mark the end of the list of groups
SYSZ_GRP_ENDING, // <-- mark the end of the list of groups
} sysz_insn_group;
#ifdef __cplusplus

6
include/x86.h
View File

@ -64,7 +64,7 @@ typedef enum x86_reg {
X86_REG_R14D, X86_REG_R15D, X86_REG_R8W, X86_REG_R9W, X86_REG_R10W,
X86_REG_R11W, X86_REG_R12W, X86_REG_R13W, X86_REG_R14W, X86_REG_R15W,
X86_REG_MAX // <-- mark the end of the list of registers
X86_REG_ENDING // <-- mark the end of the list of registers
} x86_reg;
//> Operand type for instruction's operands
@ -1542,7 +1542,7 @@ typedef enum x86_insn {
X86_INS_XSTORE,
X86_INS_XTEST,
X86_INS_MAX, // mark the end of the list of insn
X86_INS_ENDING, // mark the end of the list of insn
} x86_insn;
//> Group of X86 instructions
@ -1597,7 +1597,7 @@ typedef enum x86_insn_group {
X86_GRP_CALL, // all call instructions
X86_GRP_RET, // all call return instructions
X86_GRP_MAX
X86_GRP_ENDING
} x86_insn_group;
#ifdef __cplusplus

6
include/xcore.h
View File

@ -85,7 +85,7 @@ typedef enum xcore_reg {
XCORE_REG_KSP, // kernel stack pointer
XCORE_REG_ID, // thread ID
XCORE_REG_MAX, // <-- mark the end of the list of registers
XCORE_REG_ENDING, // <-- mark the end of the list of registers
} xcore_reg;
//> XCore instruction
@ -213,7 +213,7 @@ typedef enum xcore_insn {
XCORE_INS_XOR,
XCORE_INS_ZEXT,
XCORE_INS_MAX, // <-- mark the end of the list of instructions
XCORE_INS_ENDING, // <-- mark the end of the list of instructions
} xcore_insn;
//> Group of XCore instructions
@ -222,7 +222,7 @@ typedef enum xcore_insn_group {
XCORE_GRP_JUMP, // all jump instructions (conditional+direct+indirect jumps)
XCORE_GRP_MAX, // <-- mark the end of the list of groups
XCORE_GRP_ENDING, // <-- mark the end of the list of groups
} xcore_insn_group;
#ifdef __cplusplus