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Update X86Mapping.c
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@ -2752,7 +2752,7 @@ static struct insn_reg2 insn_regs_intel2[] = {
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{ X86_INVLPGA64, X86_REG_RAX, X86_REG_ECX, CS_AC_READ, CS_AC_READ },
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};
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struct insn_reg insn_regs_intel_sorted [ARR_SIZE(insn_regs_intel)];
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static struct insn_reg insn_regs_intel_sorted [ARR_SIZE(insn_regs_intel)];
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static int regs_cmp(const void *a, const void *b)
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{
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@ -2761,7 +2761,7 @@ static int regs_cmp(const void *a, const void *b)
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return (l - r);
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}
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static bool intel_resgs_sorted = false;
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static bool intel_regs_sorted = false;
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// return register of given instruction id
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// return 0 if not found
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// this is to handle instructions embedding accumulate registers into AsmStrs[]
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@ -2771,13 +2771,13 @@ x86_reg X86_insn_reg_intel(unsigned int id, enum cs_ac_type *access)
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unsigned int last = ARR_SIZE(insn_regs_intel) - 1;
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unsigned int mid = ARR_SIZE(insn_regs_intel) / 2;
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if (!intel_resgs_sorted) {
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if (!intel_regs_sorted) {
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memcpy (insn_regs_intel_sorted, insn_regs_intel,
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sizeof(insn_regs_intel_sorted));
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qsort (insn_regs_intel_sorted,
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ARR_SIZE(insn_regs_intel_sorted),
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sizeof(struct insn_reg), regs_cmp);
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intel_resgs_sorted = true;
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intel_regs_sorted = true;
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}
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while (first <= last) {
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