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Add ARM_GRP_RET and with it some missing ARM_GRP_JUMP. (#2191)

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Rot127 2023-11-10 02:58:18 +00:00 committed by GitHub
parent 232e1ae359
commit f8b7ae7c2a
5 changed files with 30988 additions and 48735 deletions
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79716
arch/ARM/ARMGenCSMappingInsn.inc
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1
arch/ARM/ARMMapping.c
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@ -595,6 +595,7 @@ static const name_map group_name_maps[] = {
{ ARM_GRP_INVALID, NULL },
{ ARM_GRP_JUMP, "jump" },
{ ARM_GRP_CALL, "call" },
{ ARM_GRP_RET, "return" },
{ ARM_GRP_INT, "int" },
{ ARM_GRP_PRIVILEGE, "privilege" },
{ ARM_GRP_BRANCH_RELATIVE, "branch_relative" },

1
bindings/python/capstone/arm_const.py
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@ -1187,6 +1187,7 @@ ARM_INS_NOP = ARM_INS_HINT
ARM_GRP_INVALID = 0
ARM_GRP_JUMP = 1
ARM_GRP_CALL = 2
ARM_GRP_RET = 3
ARM_GRP_INT = 4
ARM_GRP_PRIVILEGE = 6
ARM_GRP_BRANCH_RELATIVE = 7

1
include/capstone/arm.h
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@ -1578,6 +1578,7 @@ typedef enum arm_insn_group {
// all jump instructions (conditional+direct+indirect jumps)
ARM_GRP_JUMP, ///< = CS_GRP_JUMP
ARM_GRP_CALL, ///< = CS_GRP_CALL
ARM_GRP_RET, ///< = CS_GRP_RET
ARM_GRP_INT = 4, ///< = CS_GRP_INT
ARM_GRP_PRIVILEGE = 6, ///< = CS_GRP_PRIVILEGE
ARM_GRP_BRANCH_RELATIVE, ///< = CS_GRP_BRANCH_RELATIVE

4
suite/cstest/issues.cs
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@ -713,7 +713,7 @@
!# issue 825
!# CS_ARCH_ARM, CS_MODE_ARM, CS_OPT_DETAIL
0x0: 0x0e,0xf0,0xa0,0xe1 == mov pc, lr ; op_count: 2 ; operands[0].type: REG = r15 ; operands[0].access: WRITE ; operands[1].type: REG = r14 ; operands[1].access: READ ; Registers read: r14 ; Registers modified: r15 ; Groups: IsARM
0x0: 0x0e,0xf0,0xa0,0xe1 == mov pc, lr ; op_count: 2 ; operands[0].type: REG = r15 ; operands[0].access: WRITE ; operands[1].type: REG = r14 ; operands[1].access: READ ; Registers read: r14 ; Registers modified: r15 ; Groups: jump return IsARM
!# issue 813
!# CS_ARCH_ARM, CS_MODE_THUMB | CS_MODE_BIG_ENDIAN, None
@ -1021,7 +1021,7 @@
!# issue 130
!# CS_ARCH_ARM, CS_MODE_BIG_ENDIAN, CS_OPT_DETAIL
0x0: 0xe1,0xa0,0xf0,0x0e == mov pc, lr ; op_count: 2 ; operands[0].type: REG = r15 ; operands[0].access: WRITE ; operands[1].type: REG = r14 ; operands[1].access: READ ; Registers read: r14 ; Registers modified: r15 ; Groups: IsARM
0x0: 0xe1,0xa0,0xf0,0x0e == mov pc, lr ; op_count: 2 ; operands[0].type: REG = r15 ; operands[0].access: WRITE ; operands[1].type: REG = r14 ; operands[1].access: READ ; Registers read: r14 ; Registers modified: r15 ; Groups: jump return IsARM
!# issue 85
!# CS_ARCH_ARM64, CS_MODE_LITTLE_ENDIAN, None