Commit Graph

347 Commits

Author SHA1 Message Date
lasek0
df9a949b8e fix lcall seg:off format for x86-16 2022-01-24 00:04:03 +01:00
kabeor
f0d5ca3ee2 update .gitignore 2022-01-04 23:47:08 +08:00
kabeor
cbd75d1fec update benchmark 2022-01-04 23:44:22 +08:00
kabeor
0d4881ef14 add ci_test steps&&Fixed suite test for python3 2021-11-23 12:27:39 +08:00
kabeor
263f7a280a adapt to python3 2021-11-21 12:37:28 +08:00
SmartSmurf
9dbc677ce3 switched to next branch 2021-11-10 17:05:26 +01:00
Nguyen Anh Quynh
bfb2e45d76 fix cstest compile issue 2020-11-27 17:30:12 +08:00
Nguyen Anh Quynh
f7efa08eca x86: fix testcase of MOVSD 2020-05-07 21:51:54 +08:00
Richard Henderson
aaffb38c44 Constify backends (#1549)
* Constify registerinfo.py output

Remove two conditionals separating identical bits of code.
Add "const" markup to MCRegisterDesc and MCRegisterClass.

Signed-off-by: Richard Henderson <rth@twiddle.net>

* Constify instrinfo-arch.py output

In this case, do not actively strip const.

Signed-off-by: Richard Henderson <rth@twiddle.net>

* Constify the AArch64 backend

Signed-off-by: Richard Henderson <rth@twiddle.net>

* Constify the EVM backend

Signed-off-by: Richard Henderson <rth@twiddle.net>

* Constify M680X backend

Signed-off-by: Richard Henderson <rth@twiddle.net>

* Constify M68K backend

Signed-off-by: Richard Henderson <rth@twiddle.net>

* Constify the Mips backend

The Mips backend has not been regenerated from LLVM recently,
and there are more fixups required than I'd like.  Just apply
the fixes to the tables by hand for now.

Signed-off-by: Richard Henderson <rth@twiddle.net>

* Constify the Sparc backend

Signed-off-by: Richard Henderson <rth@twiddle.net>

* Constify the TMS320C64x backend

Signed-off-by: Richard Henderson <rth@twiddle.net>

* Constify the X86 backend

Signed-off-by: Richard Henderson <rth@twiddle.net>

* Constify the XCore backend

Signed-off-by: Richard Henderson <rth@twiddle.net>

* Constify systemregister.py output

Signed-off-by: Richard Henderson <rth@twiddle.net>

* Constify the ARM backend

Signed-off-by: Richard Henderson <rth@twiddle.net>

* Constify the PowerPC backend

Signed-off-by: Richard Henderson <rth@twiddle.net>

* Constify the MOS65XX backend

Signed-off-by: Richard Henderson <rth@twiddle.net>

* Constify the SystemZ backend

The mapping of system register to indexes is easy to
generate read-only.  Since we know the indexes are
between 0 and 31, use uint8_t instead of unsigned.

Signed-off-by: Richard Henderson <rth@twiddle.net>

* Constify the WASM backend

Signed-off-by: Richard Henderson <rth@twiddle.net>

* Constify cs.c

Signed-off-by: Richard Henderson <rth@twiddle.net>

* Constify the BPF backend

Signed-off-by: Richard Henderson <rth@twiddle.net>
2019-12-23 20:30:57 +08:00
Vemake
eb357143a2 Fixed 47 missing dependencies and 51 excessive dependencies in Makefile (#1522)
* Fix Excessive and Missing Dependencies found by Vemake

* Remove extra spaces at the end of Makefile

* Remove used macro df

* Change "-rf" to "-f" in tests/Makefile

* Change "-rf" to "-f" in suite/fuzz/Makefile

* Remove 'r' from the removal command.

* Remove an extra blank line.
2019-07-29 14:15:05 +08:00
Catena cyber
1065ce78c3 Fuzzit integration (#1520) 2019-07-25 09:06:52 +08:00
Catena cyber
839c5e2c19 Updates files from LLVM for PPC64 (#1510)
* Updates files from LLVM for PPC64

* Only fix tbegin, tabort and such
2019-07-01 10:35:02 +08:00
naq
60bbd7f60a cstest: fix xmmword ptr case in intel-syntax-encoding.s.cs 2019-06-09 02:05:31 +08:00
naq
46c6aab052 x86: printf64m should print qword ptr by default. TODO: fix related cases in tablegen instead 2019-06-09 01:58:03 +08:00
naq
550a598058 cstest: add issue 1505 2019-06-09 01:06:09 +08:00
naq
9785281f7d cstest: fix issues.cs 2019-06-08 12:36:57 +08:00
ksherlock
05b3fbf2d7 updated 6502 support. (#1498)
* updated 6502 support. some improvements to the base 6502 support but also adds support for 65c02, w65c02, and 65816.

* add CS_OPT_SYNTAX_MOTOROLA.

This will use "$" as a hex prefix instead of "0x"

* remove excess blank lines
2019-06-03 23:20:51 +08:00
Nguyen Anh Quynh
a095f344ce ppc: mnemonic with dot postfix should update CR0. issue #1478 2019-05-17 11:50:11 +08:00
Nguyen Anh Quynh
72e70daeb7 ppc: add missing condition registers of BDNZT. fixes issue #970 2019-05-17 11:36:55 +08:00
Nguyen Anh Quynh
942e5eb8a1 ppc: fix bdnzflr operand 2 missing. issue #969 2019-05-17 09:56:03 +08:00
Nguyen Anh Quynh
832180d695 arm64: LDR operands[1] is memory operand. fix issue #1481 2019-05-16 21:29:51 +08:00
Nguyen Anh Quynh
e3edf79e7e ppc: BDZLA is absolute branch. fix issue #968 2019-05-16 11:06:24 +08:00
Nguyen Anh Quynh
1ede71254d cstest: add tests for xacquire/xrelease xchg 2019-05-14 10:59:07 +08:00
Nguyen Anh Quynh
eb25f46d6a x86: recognize xrelease lock 2019-05-14 09:59:23 +08:00
Nguyen Anh Quynh
d5dd80e979 x86: recognize xacquire prefix. issue #1477 2019-05-13 22:27:05 +08:00
Nguyen Anh Quynh
9e2912899a ppc: add JUMP group for some branch instructions 2019-05-11 11:52:43 +08:00
Nguyen Anh Quynh
7ce9c792b1 ppc: fix target address of bdnz. issue #1468 2019-05-11 10:18:36 +08:00
Nguyen Anh Quynh
b6924f4b86 synctools: udpate somes scripts 2019-05-10 16:51:23 +08:00
Nguyen Anh Quynh
10c5081482 synctools: fix genall-arch.sh for Arm & Arm64 2019-05-10 16:39:36 +08:00
Nguyen Anh Quynh
c40e2fa375 ppc: fix target address for bdnzt 2019-05-10 14:38:51 +08:00
Nguyen Anh Quynh
d399bd3fb8 cstest: do not use CS_OPT_SYNTAX_NOREGNAME in ppc64-encoding.s.cs 2019-05-09 00:39:37 +08:00
Nguyen Anh Quynh
4b9d4857d7 ppc: fix suite/MC/PowerPC/ppc64-encoding.s.cs 2019-05-08 14:38:11 +08:00
Nguyen Anh Quynh
0c31f14db1 ppc: print condition register bits. issue #1469 2019-05-08 13:56:40 +08:00
Nguyen Anh Quynh
d59d1e75d1 Merge branch 'next' of github.com:aquynh/capstone into next 2019-05-07 16:31:48 +08:00
Nguyen Anh Quynh
ac63e2b80c ppc: add issue #1456 for B to issues.cs 2019-05-07 16:31:25 +08:00
Catena cyber
829a461743 Right endianness for ppc platforms (#1473)
* Right endianness for ppc platforms

* Right mode CS_MODE_64 for ppc
2019-05-07 15:12:23 +07:00
Nguyen Anh Quynh
71370554ac add suite/synctools 2019-05-07 12:26:19 +08:00
Nguyen Anh Quynh
a27da62b0d x86: update tablegen to fix MOV CRx/DRx, TEST & LOCK prefix in #1456 & #1472 2019-05-06 17:28:37 +08:00
Nguyen Anh Quynh
49e383d4fd x86: handle MOV CRx/DRx & LOCK prefix in issues #1456 & #1472 2019-05-06 16:18:45 +08:00
Nguyen Anh Quynh
02e63faac5 x86: lock adc is valid. issue #1472 2019-05-06 12:44:09 +08:00
Nguyen Anh Quynh
11206deb78 ppc: sync with llvm 7.0.1 2019-04-30 13:50:42 +08:00
Nguyen Anh Quynh
120c80fc14 MC: fix intel-syntax-encoding.s.cs 2019-04-17 23:01:07 +08:00
Nguyen Anh Quynh
d5286f100e MC: fix intel-syntax-encoding.s.cs 2019-04-17 22:52:02 +08:00
Nguyen Anh Quynh
a740af902b x86: fix xmmword ptr issue in #1456 (TODO: better fix) 2019-04-17 20:39:21 +08:00
Nguyen Anh Quynh
d7b4e936a6 cstest: Thub mode for pkhtb test 2019-04-17 01:51:17 +08:00
Nguyen Anh Quynh
931ee9d871 cstest: fix wfi.ww, wfe.ww, yield.ww & nop.ww in basic-thumb2-instructions.s.cs 2019-04-17 01:14:00 +08:00
Nguyen Anh Quynh
70ac81bba2 MC: remove EIZ in x86-32-avx.s.cs 2019-04-17 00:00:42 +08:00
Nguyen Anh Quynh
f9da22b59e cstest: add EIZ test in #1456 2019-04-16 23:39:52 +08:00
Nguyen Anh Quynh
40405afffe arm: alias LDR [sp], 4 to POP 2019-04-16 00:01:54 +08:00
Nguyen Anh Quynh
4dabe798b0 arm: fix the missing third operand of LSR - issue #1456 2019-04-15 07:47:04 +08:00