Commit Graph

22 Commits

Author SHA1 Message Date
Rot127
926cfebd6b Architecture updater (auto-sync) - Updating PPC (#2013) 2023-09-05 12:24:59 +08:00
Rot127
104f693c11 Architecture updater (auto-sync) - Updating ARM (#1949)
* Add auto-sync updater.

* Update Capstone core with auto-sync changes.

* Update ARM via auto-sync.

* Make changes to arch modules which are introduced by auto-sync.

* Update tests for ARM.

* Fix build warnings for make

* Remove meson.build

* Print shift amount in decimal

* Patch non LLVM register alias.

* Change type of immediate operand to unsiged (due to: #771)

* Replace all occurances of a register with its alias.

* Fix printing of signed imms

* Print rotate amount in decimal

* CHange imm type to int64_t to match LLVM imm type.

* Fix search for register names, by completing string first.

* Print ModImm operands always in decimal

* Use number format of previous capstone version.

* Correct implicit writes and update_flags according to SBit.

* Add missing test for RegImmShift

* Reverse incorrect comparision.

* Set shift information for move instructions.

* Set mem access for all memory operands

* Set subtracted flag if offset is negative.

* Add flag for post-index memory operands.

* Add detail op for BX_RET and MOVPCLR

* Use instruction post_index operand.

* Add VPOP and VPUSH as unique CS IDs.

* Add shifting info for MOVsr.

* Add TODOs.

* Add in LLVM hardcoded operands to detail.

* Move detail editing from InstPrinter to Mapping

* Formatting

* Add removed check.

* Add writeback register and constraints to RFEI instructions.

* Translate shift immediate

* Print negative immediates

* Remove duplicate invalid entry

* Add CS groups to instructions

* Fix write attriutes of stores.

* Add missing names of added instructions

* Fix LLVM bug

* Add more post_index flags

* http -> https

* Make generated functions static

* Remove tab prefix for alias instructions.

* Set ValidateMCOperand to NULL.

* Fix AddrMode3Operand operands

* Allow getting system and banked register name via API

* Add writeback to STC/LDC instructions.

* Fix (hopefully) last case where disp is negative and subtracted = true

* Remove accidentially introduced regressions
2023-07-19 17:56:27 +08:00
Riccardo Schirone
c316ef189d arch/M68k: do not return reg_name if beyond limits (#1219)
* arch/M68k: do not return reg_name if beyond limits

(patch coming from radare2)

* arch: checks index when returning reg names
2018-07-24 16:25:47 +08:00
Nguyen Anh Quynh
76c1c3c4e9 merge next to master 2018-07-20 12:36:50 +08:00
Richard Henderson
5423b215bf Constify backend data (#1040)
* Constify string literals

Use -Wwrite-strings to force string literals to be of
type "const char[]", then fix up all warning fallout.

* Constify common infrastructure

Step one in allowing backend data to be readonly.
Minimal changes to backends for now; just set all pointers
in common structs that aren't modified to const.

* Constify AArch64 backend

Section size changes within libcapstone.so are

-.rodata               602587
-.data.rel.ro          228416
-.data                1003746
+.rodata               769051
+.data.rel.ro          241120
+.data                 824578

* Constify ARM backend

Section size changes within libcapstone.so are

-.rodata               769051
-.data.rel.ro          241120
-.data                 824578
+.rodata               959835
+.data.rel.ro          245120
+.data                 629506

* Constify Mips backend

Section size changes within libcapstone.so are

-.rodata               959835
-.data.rel.ro          245120
-.data                 629506
+.rodata              1069851
+.data.rel.ro          256416
+.data                 508194

* Constify PowerPC backend

Section size changes within libcapstone.so are

-.rodata              1069851
-.data.rel.ro          256416
-.data                 508194
+.rodata              1142715
+.data.rel.ro          272224
+.data                 419490

* Constify Sparc backend

Section size changes within libcapstone.so are

-.rodata              1142715
-.data.rel.ro          272224
-.data                 419490
+.rodata              1175227
+.data.rel.ro          277536
+.data                 381666

* Constify SystemZ backend

Section size changes within libcapstone.so are

-.rodata              1175227
-.data.rel.ro          277536
-.data                 381666
+.rodata              1221883
+.data.rel.ro          278016
+.data                 334498

* Constify X86 backend

Section size changes within libcapstone.so are

-.rodata              1221883
-.data.rel.ro          278016
-.data                 334498
+.rodata              1533531
+.data.rel.ro          281184
+.data                  19714

* Constify XCore backend

Section size changes within libcapstone.so are

-.rodata              1533531
-.data.rel.ro          281184
-.data                  19714
+.rodata              1553026
+.data.rel.ro          281280
+.data                     40
2017-10-22 08:45:40 +08:00
Nguyen Anh Quynh
1182d25759 simplify ARCH_group_name() by using lookup table as suggested by @learn_more. also added the missing group name for GRP_PRIVILEGE 2015-04-27 12:13:34 +08:00
Nguyen Anh Quynh
efffe787d1 Add new API and start to provide access information for instruction operands
- New API cs_regs_access() that provide registers being read & modified by instruction

- New field cs_x86_op.access provides access info (READ, WRITE) for each operand

- New field cs_x86.eflags provides EFLAGS affected by instruction

- Extend cs_detail.{regs_read, regs_write} from uint8_t to uint16_t type
2015-03-25 15:02:13 +08:00
Nguyen Anh Quynh
bb5dccedfa core: put insns[] into separate .inc files to make it easier to manage 2015-03-08 10:54:32 +08:00
Nguyen Anh Quynh
bfcaba5851 2015 2015-03-04 17:45:23 +08:00
Nguyen Anh Quynh
c2ea812ea7 fix cs_group_name() after the change on generic group ids 2014-10-31 15:36:19 +08:00
Nguyen Anh Quynh
d7e42b7d36 rename all the constants marking ending from _MAX to _ENDING. this also updates Java/Python/Ocaml bindings accordingly 2014-09-29 17:15:25 +08:00
Nguyen Anh Quynh
1738a3e6bf sparc: handle some alias instructions & more details for some special instructions. update Python & Java bindings accordingly with new instructions & registers 2014-09-17 00:01:04 +08:00
Nguyen Anh Quynh
4c95022c74 fix warnings on unused variables when compiling in Diet mode 2014-08-27 18:33:38 +08:00
Mr. eXoDia
9be1f93f88 fixed warnings in MSVC x64 compilation 2014-08-26 23:51:12 +08:00
Nguyen Anh Quynh
a726402513 sparc: update core. this added/removed some instructions & groups. updated Python & Java bindings accordingly 2014-08-15 18:29:17 +08:00
Nguyen Anh Quynh
159ddbd99f ppc: add new groups to group_name_maps[] 2014-08-15 16:35:12 +08:00
Nguyen Anh Quynh
650f96ce43 add new API cs_group_name() to return group name in string, given the group id 2014-07-08 08:59:27 +08:00
Nguyen Anh Quynh
04f2ec6d0f cleanup redundant headers included 2014-05-27 10:39:04 +08:00
Nguyen Anh Quynh
8598a219f3 enable arch code from source with CAPSTONE_HAS_* for MSVC to pick up 2014-05-14 11:26:41 +08:00
Nguyen Anh Quynh
f6c7cbc972 core: fix some warnings 2014-03-12 12:50:54 +08:00
Nguyen Anh Quynh
65c7a01d4f sparc: fix warning on unused variable 2014-03-11 10:31:53 +08:00
Nguyen Anh Quynh
05e27138ae core: add Sparc arch 2014-03-10 11:58:57 +08:00