Commit Graph

423 Commits

Author SHA1 Message Date
Nguyen Anh Quynh
faa925ab8f fix bindings (python/java) and tests after the last change on the type of imm of cs_arm64_op 2014-11-17 11:39:36 +08:00
Nguyen Anh Quynh
ff9a5743d9 ocaml: update Mips modes to CS_MODE_MIPS32 & CS_MODE_MIPS64 2014-11-13 12:09:49 +08:00
Nguyen Anh Quynh
e01fdfb94f java: add comments on hardware modes 2014-11-13 11:58:11 +08:00
Nguyen Anh Quynh
75c9b6a45c python: fix comments on hardware modes 2014-11-13 11:55:56 +08:00
Nguyen Anh Quynh
26fd6b1bd9 ocaml: typo (CS_MODE_32) in test_ppc.ml 2014-11-13 11:51:59 +08:00
Nguyen Anh Quynh
bf4723f970 java: update Mips modes to CS_MODE_MIPS32 & CS_MODE_MIPS64 2014-11-13 11:49:14 +08:00
Nguyen Anh Quynh
143a494ae7 python: add CS_MODE_MIPS32/64 2014-11-13 11:45:57 +08:00
Nguyen Anh Quynh
ec58a02c6d python: update Mips modes to CS_MODE_MIPS32 & CS_MODE_MIPS64 2014-11-13 11:42:38 +08:00
Nguyen Anh Quynh
7e75ca6d21 python: CS_MODE_MIPS32R6 is independent from CS_MODE_32 2014-11-13 11:17:38 +08:00
Nguyen Anh Quynh
6782cbf5fd cython: support the newly added field mem_barrier in cs_arm 2014-11-12 11:22:16 +08:00
Nguyen Anh Quynh
128124c995 python: typo on README 2014-11-12 11:13:39 +08:00
Nguyen Anh Quynh
6f00a9827b Merge branch 'next' of https://github.com/aquynh/capstone into next 2014-11-12 11:07:32 +08:00
Nguyen Anh Quynh
39785fb3d6 java: add CS_SUPPORT_X86_REDUCE 2014-11-12 11:05:14 +08:00
Nguyen Anh Quynh
bd8543152a cython: add XCore to debug string 2014-11-12 11:04:39 +08:00
Nguyen Anh Quynh
5db983d8ec java: fix a wrong type for memBarrier in Arm.java 2014-11-12 10:43:59 +08:00
Nguyen Anh Quynh
7b7d7455b0 ocaml: properly handle newly added mode CS_MODE_V8 & PPC_OP_CRX in test_ppc.ml 2014-11-12 10:26:17 +08:00
Nguyen Anh Quynh
9ba1906470 python: test_ppc.py prints crx.scale & crx.cond as integers 2014-11-12 10:13:11 +08:00
Nguyen Anh Quynh
0b3d95e4b3 java/ocaml/python: support the newly added mem_barrier field of cs_arm struct 2014-11-11 23:00:35 +08:00
Nguyen Anh Quynh
2e40e69207 arm: add sample code for ARM's CS_MODE_MCLASS & CS_MODE_V8 2014-11-11 21:54:22 +08:00
Nguyen Anh Quynh
8e53890a8e ocaml/java: support CS_MODE_V8 for Arm 2014-11-10 22:06:23 +08:00
Nguyen Anh Quynh
c942f22a09 arm: support new mode CS_MODE_V8 for Armv8 A32 encodings 2014-11-10 21:52:09 +08:00
Nguyen Anh Quynh
248519efea mips: properly handle Mips32R6 mode. bug reported by Jay Oster 2014-11-09 14:07:07 +08:00
Nguyen Anh Quynh
2e5c0c7de0 update bindings/README 2014-11-02 22:17:54 +08:00
Nguyen Anh Quynh
a65d7ef5fa java/ocaml/python: update bindings after the last change on generic instruction groups 2014-10-31 15:47:17 +08:00
Nguyen Anh Quynh
69271ddf74 java/ocaml/python: add the missing generic instruction operand types 2014-10-31 14:32:34 +08:00
Nguyen Anh Quynh
b0464ef805 java/python/ocaml: update bindings after the last changes on operand types 2014-10-31 13:59:19 +08:00
Nguyen Anh Quynh
5720cb7ae1 tests: add tests for mips's modes: MIPS32R6 & MICRO (C & Python code) 2014-10-29 22:35:02 +08:00
Nguyen Anh Quynh
58086346bc java/python/ocaml: update after latest changes in x86.h 2014-10-18 06:16:26 +08:00
Nguyen Anh Quynh
bec9af7f6d java: update after the latest change on PPC in the core 2014-10-17 22:30:19 +08:00
Nguyen Anh Quynh
9dbb2f0b32 ocaml: update after the latest change on PPC in the core 2014-10-17 22:27:26 +08:00
Nguyen Anh Quynh
4d2c362aa6 python: update after the latest change on PPC in the core 2014-10-17 21:51:13 +08:00
Jay Oster
79e253c516 Remove CS_MODE_N64
- This mode is for the so-called MIPS "N64" ABI; it has nothing to do with the Nintendo 64 game platform.
- N64, O64, et al. are just different ABIs for the 64-bit MIPS architecture, so we replace CS_MODE_N64 with the existing CS_MODE_64
2014-10-12 16:03:12 -07:00
Nguyen Anh Quynh
b10418e79b java: a call to printf() in TestArm.java is missing a variable 2014-10-10 22:37:49 +08:00
Nguyen Anh Quynh
db8eaa3d0b bindings: remove MIPS_REG_PC constant following the change in the core 2014-10-10 21:13:30 +08:00
Nguyen Anh Quynh
5be2592a57 Merge branch 'next' of https://github.com/aquynh/capstone into next 2014-10-06 21:02:47 +08:00
Nguyen Anh Quynh
b0cc71da59 bindings: update java/ocaml/python after the last change in Arm's core 2014-10-06 21:01:32 +08:00
Nguyen Anh Quynh
fe4822c32a Ocaml: major update
- support cs_option & cs_close API.

- do not turn on DETAIL mode by default.

- all test_<arch> samples turn on DETAIL mode at runtime.

- remove OO sample code in test*.ml.

- better API, so interface is natural & close to C API.

- ATT syntax support for X86 sample code.
2014-10-04 16:30:02 +08:00
Nguyen Anh Quynh
a3f87a54d9 java: add 'check' target to Makefile 2014-10-01 17:13:58 +08:00
Nguyen Anh Quynh
984d45068c Makefile: add 'check' target 2014-10-01 16:42:29 +08:00
Nguyen Anh Quynh
839890b83a tests: use cs_group_name() to print out group names in test_detail.c & test_detail.py 2014-10-01 10:51:18 +08:00
danghvu
ebeec9d9c2 Cython: update installation and tests to v3 2014-09-29 11:55:01 -05:00
Nguyen Anh Quynh
d7e42b7d36 rename all the constants marking ending from _MAX to _ENDING. this also updates Java/Python/Ocaml bindings accordingly 2014-09-29 17:15:25 +08:00
danghvu
3671d70429 Java binding: fix missing dependency 2014-09-28 16:20:15 -05:00
Nguyen Anh Quynh
ed7e43dc08 Merge branch 'v3' of https://github.com/aquynh/capstone into v3 2014-09-28 23:56:40 +08:00
Nguyen Anh Quynh
82354b60ba ocaml: rename cs_disasm() back to cs_disasm_quick(), which rightly reflects its nature 2014-09-28 23:56:02 +08:00
danghvu
2412069453 Fix python binding tests 2014-09-27 17:59:42 -05:00
danghvu
ef92cdb918 Update java binding to v3 2014-09-27 17:53:49 -05:00
danghvu
53bbee32f9 Fix java binding tests 2014-09-27 16:09:44 -05:00
Nguyen Anh Quynh
6dc1dd5ae0 ocaml: remove fields regs_read_count, regs_write_count, groups_count, as they can be derived from the lengths of related arrays 2014-09-27 00:40:34 +08:00
Nguyen Anh Quynh
bf23075e32 ocaml: activate test_xcore.ml's non-class test 2014-09-26 23:57:08 +08:00