Nguyen Anh Quynh
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7957ed1def
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arm64: add some alias registers. attn: bindings
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2013-12-15 00:32:20 +08:00 |
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Nguyen Anh Quynh
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46a5afd810
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add comment to clarify which information in cs_insn is available when CS_OPT_DETAIL = OFF
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2013-12-14 11:52:06 +08:00 |
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Nguyen Anh Quynh
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4994c587ad
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bindings: support new 'detail' option for java & python
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2013-12-14 11:39:33 +08:00 |
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Nguyen Anh Quynh
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4d3e852fbb
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detail option: provide instruction id even when detail option is OFF
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2013-12-14 10:45:09 +08:00 |
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Nguyen Anh Quynh
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a209e67f8a
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support to turn on/off building instruction details
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2013-12-14 00:23:41 +08:00 |
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pancake
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f0e4eed89d
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Use const on all read-only buffers
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2013-12-11 22:14:42 +01:00 |
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Nguyen Anh Quynh
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ad89d25d05
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mips: optimize Mips_map_register() to O(1). suggested by Pancake
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2013-12-11 23:20:34 +08:00 |
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Nguyen Anh Quynh
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66f6c2283e
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mips: fix NEGU alias instruction. bug reported by Pancake
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2013-12-11 21:37:24 +08:00 |
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Nguyen Anh Quynh
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36df4bb6a7
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revert the cs_version() API
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2013-12-10 13:31:20 +08:00 |
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Nguyen Anh Quynh
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bb64b0bdca
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more API version to capstone.h, and remove cs_version(). reset API back to 1.0 for public release
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2013-12-10 07:56:17 +08:00 |
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Nguyen Anh Quynh
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bdaf3b5089
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x86: delete useless constant values assigned for instructions in x86.h
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2013-12-09 00:55:49 +08:00 |
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Nguyen Anh Quynh
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162409e730
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mips: upgrade core engine
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2013-12-08 20:17:28 +08:00 |
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Nguyen Anh Quynh
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731bf2a714
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arm64: update core engine
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2013-12-08 15:13:47 +08:00 |
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Nguyen Anh Quynh
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041e25dd66
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add CS_ERR_OPTION type. cs_option() returns this error code on invalid option
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2013-12-06 00:37:32 +08:00 |
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Nguyen Anh Quynh
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a236902656
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fix CS_INSN_OFFSET: calculate offset based on the address of related instruction only
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2013-12-05 20:21:09 +08:00 |
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Nguyen Anh Quynh
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a84d747f7c
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fix typo in CS_INSN_OFFSET
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2013-12-05 18:33:34 +08:00 |
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Nguyen Anh Quynh
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bb5460348b
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add CS_INSN_OFFSET macro, so we can easily calculate offset of one insn, given its position in its array
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2013-12-05 18:29:51 +08:00 |
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Nguyen Anh Quynh
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4d70daf83d
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note that Intel is default syntax
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2013-12-05 09:50:50 +08:00 |
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Nguyen Anh Quynh
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a2f825ff07
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support comments in autogen files, so constant files are more friendly
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2013-12-04 23:56:24 +08:00 |
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Nguyen Anh Quynh
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79976c1370
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fix some comments in capstone.h
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2013-12-04 23:03:13 +08:00 |
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Nguyen Anh Quynh
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8f13f3c6ab
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rename @hex_code to @bytes, and move it to next to @size
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2013-12-04 22:57:04 +08:00 |
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Nguyen Anh Quynh
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c45b1588ef
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Merge branch 'master' of https://github.com/joxeankoret/capstone into hexcode
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2013-12-04 19:28:54 +08:00 |
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Joxean
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367a4df66f
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Partially reverted previous commit
I added mistakenly various local-only changes.
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2013-12-04 07:15:45 +01:00 |
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Joxean
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114df0ef2a
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Added @hex_code member
It's used to retrieve the bytes of the instruction.
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2013-12-04 07:11:32 +01:00 |
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Nguyen Anh Quynh
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f8db76ab94
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arm64: correct value of ARM64_SFT_ROR
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2013-12-04 12:37:55 +08:00 |
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Nguyen Anh Quynh
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ea5b79d058
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move some alias registers around to after REG_MAX. this seems to fix some issues of clang, which struggles with enum that assign value from other enum
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2013-12-04 12:10:47 +08:00 |
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Nguyen Anh Quynh
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b39ef0bfa6
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arm: added some alias registers
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2013-12-04 11:52:28 +08:00 |
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Nguyen Anh Quynh
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da8adaded2
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API cs_option(): @value now has size_t, so mapping opaque pointer is possible for future options
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2013-12-04 09:44:07 +08:00 |
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Nguyen Anh Quynh
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c618db4473
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change option names for cs_option(), and update python binding accordingly to support new cs_option()
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2013-12-04 00:05:04 +08:00 |
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Nguyen Anh Quynh
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b8ce68ec05
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change cs_option() API to be more flexible with option value
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2013-12-03 23:45:08 +08:00 |
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Nguyen Anh Quynh
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01aba002e3
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add cs_option() API. move ATT & Intel syntax here, rather than having them as CS_MODE, which is wrong
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2013-12-03 21:00:09 +08:00 |
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Nguyen Anh Quynh
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612b5d23e8
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consistently use same param name @address rather than @offset in all cs_disasm*() API
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2013-12-03 12:23:09 +08:00 |
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Nguyen Anh Quynh
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f2a649e1ef
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cs_insn.address also needs to be changed after the change on @offset of cs_disasm*() API
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2013-12-03 12:21:01 +08:00 |
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Nguyen Anh Quynh
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7d5f96d3a7
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merge Radare's pull request on API change on @address of cs_disasm*()
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2013-12-03 11:53:42 +08:00 |
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Nguyen Anh Quynh
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029df200b4
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add some comments referring to cs_errno() on failure of some APIs
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2013-12-03 11:36:54 +08:00 |
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Nguyen Anh Quynh
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f35e2ad35c
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add @regs_read_count, @regs_write_count, @groups_count to @cs_insn. bump API to 1.4
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2013-12-03 11:10:26 +08:00 |
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pancake
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c04f873791
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Use uint64_t instead of size_t for addresses
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2013-12-03 02:51:46 +01:00 |
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Nguyen Anh Quynh
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3582bc1b9b
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arm64: ARM64_GRP_JUMP is in the wrong place. move it to its place and also clarify some GRP comments
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2013-12-03 09:43:27 +08:00 |
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Nguyen Anh Quynh
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ec0ed8ee94
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semantics: add insn group JUMP, so now we can check if this insn is branching
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2013-12-02 13:55:38 +08:00 |
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Nguyen Anh Quynh
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173ed2b1cb
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arm: upgrade core engine
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2013-12-01 22:19:27 +08:00 |
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Nguyen Anh Quynh
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270d8ae712
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Merge branch 'master' into x86
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2013-12-01 00:28:38 +08:00 |
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Nguyen Anh Quynh
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3640f3cc73
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clarify in capstone.h that no API accepts CS_ARCH_* as handle anymore
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2013-12-01 00:26:27 +08:00 |
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Nguyen Anh Quynh
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36d143b6d0
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x86: update core engine
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2013-12-01 00:05:22 +08:00 |
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Nguyen Anh Quynh
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6b9b6647c1
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arm64: support more alias insn
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2013-11-30 12:28:56 +08:00 |
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Nguyen Anh Quynh
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6b7abe3c81
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arm64: handle alias insn in a better way, and add support for MNEG. bug reported by Patroklos Argyroudis
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2013-11-30 00:54:24 +08:00 |
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Nguyen Anh Quynh
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f1656de40a
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reduce the size of @operands for arm & arm64
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2013-11-29 20:26:34 +08:00 |
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Nguyen Anh Quynh
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90acea3530
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fix arm64_op_mem & arm64_op_type structures: int32_t is enough for imm & disp
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2013-11-29 17:54:17 +08:00 |
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Nguyen Anh Quynh
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b42a657873
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change cs_disasm() and cs_disasm_dyn() to be portable API. fix related code using these API
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2013-11-29 17:40:07 +08:00 |
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Nguyen Anh Quynh
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26ee41aa67
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initial import
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2013-11-27 12:11:31 +08:00 |
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