cmp instruction does not modify its operands. Currently, cmp
variants that accept a memory operand have CS_AC_WRITE access mode
set. This commit removes CS_AC_WRITE mode from cmp variants that
have it.
* Add FPUFLAGS information.
* Change the structure insn_op: from uint64_t eflags to union{ uint64_t eflags, uint64_t fpuflags; }.
* Adjust the modified structure insn_op.
* Add missing flags.
* Change flags information acorrding to xed files and instruction manual.
* Rename fpuflags to fpu_flags.
* Updating flags information accoring to manual and xed files.
* Changing the name eflags to flags.
* Printing the FPU_FLAGS information when it belongs to group X86_GRP_FPU.
* Defining new flags.
* Updating flags information according to manual and xed files.
* Adding X86_GRP_FPU to all the instructions which have modified fpu_flags.
* Solving the conflict problem when do git commit.
* Rectify the annotation within the structure insn_op.
* Supplement fpu flags information for floating-point instructions which missed fpu flags before.
* Print fpu group information when an instructure belongs to X86_GRP_FPU.
* Add two new groups ARM64_GRP_BASE(base instructions) and ARM64_GRP_FPSIMD(SIMD&FP instructions).
* Revert "Add two new groups ARM64_GRP_BASE(base instructions) and ARM64_GRP_FPSIMD(SIMD&FP instructions)."
This reverts commit 8ab50e80a3.
* X86 clean up.
* Clean up arch/X86/X86MappingInsn.inc.
* Double check.
* Delete files.
* Clean up x86.
* Clean up reduce file
* Fix btr
* fix x86
- New API cs_regs_access() that provide registers being read & modified by instruction
- New field cs_x86_op.access provides access info (READ, WRITE) for each operand
- New field cs_x86.eflags provides EFLAGS affected by instruction
- Extend cs_detail.{regs_read, regs_write} from uint8_t to uint16_t type
