Commit Graph

243 Commits

Author SHA1 Message Date
Spike
55f242d498 Add webassembly arch (#1359)
* add wasm arch

* fix bug

* delete todo & add wasm into readme
2019-02-01 23:03:47 +08:00
Sebastian Macke
82cd4c0747 Add support for the MOS65XX family such as the MOS 6502.
Signed-off-by: Sebastian Macke <sebastian@macke.de>
2018-12-06 22:53:33 +01:00
Nguyen Anh Quynh
76c1c3c4e9 merge next to master 2018-07-20 12:36:50 +08:00
Travis Finkenauer
292116bd0d Declare global arch arrays with contents (next branch) (#1186)
* Declare global arch arrays with contents (#1171)

This eliminates the need for archs_enable() and eliminates the racey
initialization.

This makes the architecture-specific init and option functions
non-static so that they may be called from a different file.

Cherry-picked 853a2870

* Add cs_arch_disallowed_mode_mask global

Cherry-pick 94bce437:
mips: CS_MODE_MIPS32R6 implies CS_MODE_32

Cherry-pick 8998a3a1:
ppc: fix endian check (#1029)
Fixes bug where endianness could not be set for ppc.

Remove `big_endian` field of `cs_struct`.
Added a helper macro `MODE_IS_BIG_ENDIAN()` to check if
`CS_MODE_BIG_ENDIAN` is set.

Refactored `cs_open()` check for valid mode out of arch-specific code
into arch-independent code. Also added a valid mode check to
`cs_option()`.  The checks use a new global array
`cs_arch_disallowed_mode_mask[]`.

* Make global arrays static

Make all_arch uint32_t to guarantee a certain number of bits (with
adequate room for growth).
2018-06-24 21:05:04 +08:00
Nguyen Anh Quynh
7566f79879 cleanup 2018-06-22 01:03:26 +08:00
Travis Finkenauer
ce597d5296 Declare global arch arrays with contents (#1171)
This eliminates the need for archs_enable() and eliminates the racey
initialization.

This makes the architecture-specific init, option, and destroy functions
non-static so that they may be called from a different file.
2018-06-21 14:52:35 +08:00
vit9696
c2514aab00 Add Availability.h include to fix macOS SDK instrinsics 2018-06-15 22:14:48 +08:00
vit9696
f52aa1f39c Add Availability.h include to fix macOS SDK instrinsics (#1175) 2018-06-14 22:12:26 +01:00
Nguyen Anh Quynh
9c7a094b58 add Ethereum VM architecture 2018-03-31 17:29:22 +08:00
Alberto Garcia Illera
3c8e828b14 prefix cs_ to global variables to avoid link problems (#1108)
* prefix cs_ to global variables to avoid link problems

* force Capstone to be build using MT

* fix identation
2018-03-29 22:17:37 +08:00
Alberto Garcia Illera
d0525ca346 prefix cs_ to global variables to avoid link problems (#1102) 2018-03-19 22:23:09 +08:00
Wolfgang Schwotzer
e8d1f1d4d2 M680X: Target ready for pull request (#1034)
* Added new M680X target. Supports M6800/1/2/3/9, HD6301

* M680X: Reformat for coding guide lines. Set alphabetical order in HACK.TXT

* M680X: Prepare for python binding. Move cs_m680x, m680x_insn to m680x_info. Chec
> k cpu type, no default.

* M680X: Add python bindings. Added python tests.

* M680X: Added cpu types to usage message.

* cstool: Avoid segfault for invalid <arch+mode>.

* Make test_m680x.c/test_m680x.py output comparable (diff params: -bu). Keep xprint.py untouched.

* M680X: Update CMake/make for m680x support. Update .gitignore.

* M680X: Reduce compiler warnings.

* M680X: Reduce compiler warnings.

* M680X: Reduce compiler warnings.

* M680X: Make test_m680x.c/test_m680x.py output comparable (diff params: -bu).

* M680X: Add ocaml bindings and tests.

* M680X: Add java bindings and tests.

* M680X: Added tests for all indexed addressing modes. C/Python/Ocaml

* M680X: Naming, use page1 for PAGE1 instructions (without prefix).

* M680X: Naming, use page1 for PAGE1 instructions (without prefix).

* M680X: Used M680X_FIRST_OP_IN_MNEM in tests C/python/java/ocaml.

* M680X: Added access property to cs_m680x_op.

* M680X: Added operand size.

* M680X: Remove compiler warnings.

* M680X: Added READ/WRITE access property per operator.

* M680X: Make reg_inherent_hdlr independent of CPU type.

* M680X: Add HD6309 support + bug fixes

* M680X: Remove errors and warning.

* M680X: Add Bcc/LBcc to group BRAREL (relative branch).

* M680X: Add group JUMP to BVS/BVC/LBVS/LBVC. Remove BRAREL from BRN/LBRN.

* M680X: Remove LBRN from group BRAREL.

* M680X: Refactored cpu_type initialization for better readability.

* M680X: Add two operands for insn having two reg. in mnemonic. e.g. ABX.

* M680X: Remove typo in cstool.c

* M680X: Some format improvements in changed_regs.

* M680X: Remove insn id string list from tests (C/python/java/ocaml).

* M680X: SEXW, set access of reg. D to WRITE.

* M680X: Sort changed_regs in increasing m680x_insn order.

* M680X: Add M68HC11 support + Reduced from two to one INDEXED operand.

* M680X: cstool, also write '(in mnemonic)' for second reg. operand.

* M680X: Add BRN/LBRN to group JUMP and BRAREL.

* M680X: For Bcc/LBcc/BRSET/BRCLR set reg. CC to read access.

* M680X: Correctly print negative immediate values with option CS_OPT_UNSIGNED.

* M680X: Rename some instruction handlers.

* M680X: Add M68HC05 support.

* M680X: Dont print prefix '<' for direct addr. mode.

* M680X: Add M68HC08 support + resorted tables + bug fixes.

* M680X: Add Freescale HCS08 support.

* M680X: Changed group names, avoid spaces.

* M680X: Refactoring, rename addessing mode handlers.

* M680X: indexed addr. mode, changed pre/post inc-/decrement representation.

* M680X: Rename some M6809/HD6309 specific functions.

* M680X: Add CPU12 (68HC12/HCS12) support.

* M680X: Correctly display illegal instruction as FCB .

* M680X: bugfix: BRA/BRN/BSR/LBRA/LBRN/LBSR does not read CC reg.

* M680X: bugfix: Correctly check for sufficient code size for M6809 indexed addressing.

* M680X: Better support for changing insn id within handler for addessing mode.

* M680X: Remove warnings.

* M680X: In set_changed_regs_read_write_counts use own access_mode.

* M680X: Split cpu specific tables into separate *.inc files.

* M680X: Remove warnings.

* M680X: Removed address_mode. Addressing mode is available in operand.type

* M680X: Bugfix: BSET/BCLR/BRSET/BRCLR correct read/modify CC reg.

* M680X: Remove register TMP1. It is first visible in CPU12X.

* M680X: Performance improvement + bug fixes.

* M680X: Performance improvement, make cpu_tables const static.

* M680X: Simplify operand decoding by using two handlers.

* M680X: Replace M680X_OP_INDEX by M680X_OP_CONSTANT + bugfix in java/python/ocaml bindings.

* M680X: Format with astyle.

* M680X: Update documentation.

* M680X: Corrected author for m680x specific files.

* M680X: Make max. number of architectures single source.
2017-10-21 21:44:36 +08:00
Travis Finkenauer
de99147c73 ppc: fix endian check (#1029)
* Remove `big_endian` field of `cs_struct`

Added a helper macro `MODE_IS_BIG_ENDIAN()` to check if
`CS_MODE_BIG_ENDIAN` is set.

Refactored `cs_open()` check for valid mode out of arch-specific code
into arch-independent code. Also added a valid mode check to
`cs_option()`.  The checks use a new global array
`arch_disallowed_mode_mask[]`, which is initialized in the arch-specific
`*_enable()` functions.

Fixes bug where endianness could not be set for ppc.

* Fix Mac OS brew for Travis CI
2017-10-20 23:33:24 +08:00
vit9696
1c0f3d887c Merge #929 with some changes to get things compile (#930) 2017-05-25 16:01:48 +08:00
vit9696
62cf15d334 Several changes for size reduction (#929)
* Support CAPSTONE_STATIC with __GNUC__ compilers

* Allow custom export rules

* Make CAPSTONE_SHARED the default visibility option with GNUC (avoids behaviour changes)

* Reduce capstone static build size (mainly for kernel usage)

* Allow basic cs_detail support in diet mode

* Fixed valid_bnd unused function warning

* Do not disable cs_detail generation in CAPSTONE_DIET, use CAPSTONE_NO_DETAIL for that.

* Reverted CAPSTONE_NO_DETAIL at least until capstone supports more flexible configuration

* Added a missing endif

* Disallow custom export rules
2017-05-24 13:07:11 +08:00
Fotis Loukos
3247c00622 Minor fixes for the M68K port. 2017-04-14 17:00:40 +03:00
Fotis Loukos
ae6f2d1411 Added support for the TMS320C64x architecture. 2017-04-14 17:00:40 +03:00
Nguyen Anh Quynh
c17b1539c5 Update cs.c
remove a dead code, suggested by @vit9696 on #867
2017-03-08 20:59:16 +08:00
Nguyen Anh Quynh
7869f1758f Update cs.c
remove a dead code, suggested by @vit9696 on #867
2017-03-08 20:57:33 +08:00
Satoshi Tanda
c7b00b3756 suppress MSVC code analysis (PREfast) warnings
Signed-off-by: Satoshi Tanda <tanda.sat@gmail.com>
2016-09-28 07:33:39 -07:00
Satoshi Tanda
d7e38cd903 suppress MSVC code analysis (PREfast) warnings
Signed-off-by: Satoshi Tanda <tanda.sat@gmail.com>
2016-09-27 08:08:58 -07:00
Nguyen Anh Quynh
fae35cedac x86: properly handle SSE/AVX instructions 2016-07-15 20:37:19 +08:00
tandasat
7b2f93068d port #684 to the next branch 2016-05-16 20:32:36 -07:00
tandasat
0368aa7c42 fix #681 2016-05-16 08:32:58 -07:00
tandasat
11f254250c edit documents and comments 2016-05-14 16:04:28 -07:00
tandasat
e36384e224 Merge remote-tracking branch 'upstream/next' into next 2016-05-11 22:52:34 -07:00
tandasat
d4ef430b33 port Windows driver support 2016-05-11 21:48:32 -07:00
tandasat
f29ee89489 fix #673 2016-05-07 08:44:04 +08:00
tandasat
aa49f54831 fix #673 2016-05-06 17:03:57 -07:00
tandasat
8d377f3b7b address warnings with capstone_static_winkernel 2016-05-04 05:54:28 -07:00
Nguyen Anh Quynh
7c723bceca Merge branch 'windriver' 2016-05-03 23:04:36 +08:00
Nguyen Anh Quynh
5e8948bef6 arm: only reset IT block for ARM 2016-04-27 14:47:28 +08:00
Nguyen Anh Quynh
260a7cea8a arm: only reset IT block for ARM 2016-04-27 14:47:05 +08:00
Nguyen Anh Quynh
efb1c5a096 arm: reset IT block before cs_disasm(). this fixes issue #643 2016-04-27 14:43:38 +08:00
Nguyen Anh Quynh
c1d2f1eeda arm: reset IT block before cs_disasm(). this fixes issue #643 2016-04-27 14:43:10 +08:00
tandasat
cd7e7697a4 enable winkernel default memmory mgmt 2016-04-23 15:51:24 -07:00
Koutheir Attouchi
77cc684bc0 "vsnprintf()" is unsupported on Windows CE. The closest match is "_vsnprintf()". 2016-04-12 09:25:37 +02:00
tandasat
be2e9d17aa Addressed compile/link errors when built on VS for drivers 2016-03-31 18:14:43 -07:00
Nguyen Anh Quynh
a23f9d37ed add CS_OPT_UNSIGNED option to print immediate in unsigned form. only ARM is supported for now (issue #585) 2016-03-14 13:52:23 +08:00
Pb
2c50f16ff7 Fix instruction size define 2015-11-10 23:06:20 +01:00
Pb
fe7cb87c72 OS X kernel support (see https://github.com/aquynh/capstone/pull/528) 2015-11-10 23:02:26 +01:00
Pb
a21cc8c919 Fix instruction cache size define 2015-11-10 22:43:51 +01:00
Nguyen Anh Quynh
197e457a0b code style 2015-11-10 22:56:53 +08:00
Pb
2769c772ce Correct build settings for xnu kext. Changed calloc name to avoid potential conflicts 2015-11-06 14:44:55 +01:00
Pb
86ad3d6a67 Support of xnu memory allocator 2015-11-05 18:08:25 +01:00
Tyler J. Stachecki
d07a21b255 Kill a shadowed declaration of a local variable.
The variable tmp was already defined in the frame.
Redefining it makes some code linters grumpy.

Signed-off-by: Tyler J. Stachecki <tstache1@binghamton.edu>
2015-10-24 18:51:33 +08:00
Tyler J. Stachecki
7520fe5165 Kill a shadowed declaration of a local variable.
The variable tmp was already defined in the frame.
Redefining it makes some code linters grumpy.

Signed-off-by: Tyler J. Stachecki <tstache1@binghamton.edu>
2015-10-23 20:59:20 -04:00
Daniel Collin
2ee675c10a This adds M68K support to Capstone 2015-10-02 20:47:00 +02:00
Nguyen Anh Quynh
8aba4cd913 add error code CS_ERR_X86_MASM 2015-08-09 10:52:18 -07:00
Nguyen Anh Quynh
0b96545f66 new option CS_OPT_MNEMONIC to customize instruction mnemonic 2015-04-26 22:54:41 +08:00