* RISCV: Check CS_MODE_RISCVC in getFeatureBits
Enable compressed instruction extension with RISCVC.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* RISCV: Fix skipdata_size for CS_MODE_RISCVC
RISC-V compressed instructions are 2 bytes, not 1.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
if integer is 32-bit, and numeric literals default to int type,
the following applies (from The C Standard, 6.5.7, paragraph 4
[ISO/IEC 9899:2011]):
If E1 has a signed type and nonnegative value, and E1 × 2^E2 is
representable in the result type, then that is the resulting value;
otherwise, the behavior is undefined.
which means that the only way to safely shift is unsigned, so
use 1U to indicate the shifted bit is unsigned.
On x86_64-linux gentoo system capstone was installing
it's files to 'lib64' libdir, but was referring 'lib' libdir:
```
$ cat /usr/lib64/pkgconfig/capstone.pc
...
libdir=${prefix}/lib
...
```
On radare2 built it means injecting -L/usr/lib into a 64-build
and pulling in 32-bit libraries. 'ld.lld' is not able to resolve
the ambiguity.
It happens because @LIBSUFFIX@ is not present in cmake-3.17.3.
Let's fix the paths by using @CMAKE_INSTALL_LIBDIR@.
This variable is already used in capstone's build system,
thus should be safe to rely on.
Reported-by: Agostino Sarubbo
Bug: https://bugs.gentoo.org/730722
Signed-off-by: Sergei Trofimovich <slyfox@gentoo.org>
This commit adds some registers to the list of implicit used registers and
implicit modified registers for several AArch64 instructions.
This commit also maps the `ARM64_GRP_CALL` group to the BL* instruction family.
It should fix issue #1606.
* Add __repr__ for capstone.CsInsn
Currently, a `print(instruction)` displays a not very useful string like `<capstone.CsInsn object at 0x7f3759d88128>`.
This PR enhances adds a `__repr__` magic method to the `capstone.CsInsn` class so it displays as follows:
```
<cs.CsInsn: address=0x5555555545fa, size=1, mnemonic=push, op_str=rbp>
```
* Update __init__.py
Apple Clang 11.0.0 error:
```
capstone/include/capstone/m68k.h:160:3: error: anonymous types declared in an anonymous union are an extension [-Werror,-Wnested-anon-types]
struct { ///< register pair in one operand
^
```
* Constify registerinfo.py output
Remove two conditionals separating identical bits of code.
Add "const" markup to MCRegisterDesc and MCRegisterClass.
Signed-off-by: Richard Henderson <rth@twiddle.net>
* Constify instrinfo-arch.py output
In this case, do not actively strip const.
Signed-off-by: Richard Henderson <rth@twiddle.net>
* Constify the AArch64 backend
Signed-off-by: Richard Henderson <rth@twiddle.net>
* Constify the EVM backend
Signed-off-by: Richard Henderson <rth@twiddle.net>
* Constify M680X backend
Signed-off-by: Richard Henderson <rth@twiddle.net>
* Constify M68K backend
Signed-off-by: Richard Henderson <rth@twiddle.net>
* Constify the Mips backend
The Mips backend has not been regenerated from LLVM recently,
and there are more fixups required than I'd like. Just apply
the fixes to the tables by hand for now.
Signed-off-by: Richard Henderson <rth@twiddle.net>
* Constify the Sparc backend
Signed-off-by: Richard Henderson <rth@twiddle.net>
* Constify the TMS320C64x backend
Signed-off-by: Richard Henderson <rth@twiddle.net>
* Constify the X86 backend
Signed-off-by: Richard Henderson <rth@twiddle.net>
* Constify the XCore backend
Signed-off-by: Richard Henderson <rth@twiddle.net>
* Constify systemregister.py output
Signed-off-by: Richard Henderson <rth@twiddle.net>
* Constify the ARM backend
Signed-off-by: Richard Henderson <rth@twiddle.net>
* Constify the PowerPC backend
Signed-off-by: Richard Henderson <rth@twiddle.net>
* Constify the MOS65XX backend
Signed-off-by: Richard Henderson <rth@twiddle.net>
* Constify the SystemZ backend
The mapping of system register to indexes is easy to
generate read-only. Since we know the indexes are
between 0 and 31, use uint8_t instead of unsigned.
Signed-off-by: Richard Henderson <rth@twiddle.net>
* Constify the WASM backend
Signed-off-by: Richard Henderson <rth@twiddle.net>
* Constify cs.c
Signed-off-by: Richard Henderson <rth@twiddle.net>
* Constify the BPF backend
Signed-off-by: Richard Henderson <rth@twiddle.net>
* Fix a few registry access mode mappings
* Fix rollback of operand access changes
Re-fix operand access of three mov instructions
* Remove binding breaking #if 0
The python script for generating constants in the bindings does not know how to handle the #if 0 statements included in these files.
* Fix Excessive and Missing Dependencies found by Vemake
* Remove extra spaces at the end of Makefile
* Remove used macro df
* Change "-rf" to "-f" in tests/Makefile
* Change "-rf" to "-f" in suite/fuzz/Makefile
* Remove 'r' from the removal command.
* Remove an extra blank line.
Previously, a long was used instead of a pointer in the JNA binding library.
This would work until the allocated pointers exceeded 32-bits. On modern JVMs,
allocations may produce pointers in excess of 32-bits which would result in
invalid memory access errors.
This also updates the binding version to 5.0.
