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Author SHA1 Message Date
Nguyen Anh Quynh
d392f6ef89 simplify code copying @mnemonic in fill_insn() 2014-07-02 12:22:39 +08:00
Nguyen Anh Quynh
22ea683583 only verify x86_prefix[0] for x86 arch. bug reported by @pancake 2014-07-02 09:09:08 +08:00
Guillaume Jeanne
58fe9716d9 ocaml: simplification in ocaml.c: op_count variable 2014-06-30 16:18:55 +02:00
Guillaume Jeanne
da1c2d0d7d ocaml: ppc test is working 2014-06-30 15:59:21 +02:00
Guillaume Jeanne
e002ac7b10 ocaml: add support of ppc 2014-06-30 15:46:04 +02:00
Guillaume Jeanne
2147194e1f ocaml: add ppc.ml with all ppc const 2014-06-30 15:19:02 +02:00
Nguyen Anh Quynh
ed6b8c5a96 x86: address-size prefix should override RIP relative address in x64 mode. bug reported by @hlide 2014-06-30 07:57:29 +08:00
Nguyen Anh Quynh
656ebc9625 x86: handle RIP relative addressing in 64bit mode properly. bug reported by @hlide 2014-06-30 02:01:42 +08:00
Nguyen Anh Quynh
af6825a480 Merge branch 'next' of https://github.com/aquynh/capstone into next 2014-06-27 22:32:48 +08:00
Nguyen Anh Quynh
e9476ae696 update bindings/README for C++ binding 2014-06-27 22:32:25 +08:00
Guillaume Jeanne
7ce90f1649 ocaml: update reg/inst/group const in x86 2014-06-27 13:41:25 +02:00
Guillaume Jeanne
0a50980831 ocaml: update reg/inst/group const in mips 2014-06-27 13:39:45 +02:00
Guillaume Jeanne
e2cb91d866 ocaml: update reg/inst/group const in arm 2014-06-27 13:35:25 +02:00
Guillaume Jeanne
d157775c20 ocaml: update reg/inst/group const in arm64 2014-06-27 13:30:26 +02:00
Nguyen Anh Quynh
078f833da7 update CREDITS.TXT 2014-06-26 22:49:16 +08:00
Nguyen Anh Quynh
28b1f49b39 ocaml: update README 2014-06-26 22:29:46 +08:00
Nguyen Anh Quynh
a3676e31b5 update .gitignore for Ocaml binding 2014-06-26 22:10:41 +08:00
Guillaume Jeanne
cece24e426 working OCaml bindings 2014-06-26 15:35:06 +02:00
Nguyen Anh Quynh
5a7f409dec set @insn to NULL on error in cs_disasm_ex() 2014-06-19 11:15:54 +08:00
Nguyen Anh Quynh
6c182aedcf fix a memleaking issue in cs_disasm_ex() where memory was not freed when input code is illegit 2014-06-18 21:50:25 +08:00
Nguyen Anh Quynh
cb6fc59da1 remove redundant return in MCInst_Init() 2014-06-18 15:39:00 +08:00
Nguyen Anh Quynh
cff03629ac arm64: assign NULL to char pointer, not zero. bug reported by Coverity 2014-06-18 14:04:42 +08:00
Nguyen Anh Quynh
7ae389ede8 suite: support XCore in fuzz.py 2014-06-17 18:17:59 +08:00
Nguyen Anh Quynh
6a5cc570cc suite: support XCore in benchmark.py 2014-06-17 18:17:26 +08:00
Nguyen Anh Quynh
73eb5d5486 arm: op_addImm() is called only when detail mode is ON 2014-06-17 18:08:29 +08:00
Nguyen Anh Quynh
b287301ef4 bump number of operands supported by MCInst to 48. this fixes a segfault in ARM 2014-06-17 17:19:11 +08:00
Nguyen Anh Quynh
476d5ad7a5 msvc: disable warning on strcpy() 2014-06-17 15:09:59 +08:00
Nguyen Anh Quynh
cae09bf543 replace offset_of with offsetof from stddef.h 2014-06-17 14:58:39 +08:00
Nguyen Anh Quynh
4fe59955d6 python: test_detail.py print groups with space delimiter 2014-06-17 13:59:08 +08:00
Nguyen Anh Quynh
ebe2443b9b arm: some special instructions need to have numerical operand added manually in printInstruction() 2014-06-17 13:56:01 +08:00
Nguyen Anh Quynh
eccb9da7a8 arm64: zeroout a whole cs_arm64 struct of MCI in *getInstruction(). 2014-06-17 13:34:25 +08:00
Nguyen Anh Quynh
aaddb25453 no need to zeroout insn_cache in make_id2insn() 2014-06-17 13:32:37 +08:00
Nguyen Anh Quynh
73bbbb3800 arm: add ASRS, LSRS, VCLE, VCLT instructions. update Python & Java bindings at the same time 2014-06-17 13:29:54 +08:00
Nguyen Anh Quynh
8693fcdc99 arm: correct operand setup for REG type in printAddrMode3OffsetOperand() 2014-06-17 13:28:33 +08:00
Nguyen Anh Quynh
2a461ed422 arm: zeroout a whole cs_arm struct in *getInstruction(). this makes sure operand of REG type has shift type = 0 by default 2014-06-17 13:27:38 +08:00
Nguyen Anh Quynh
9672cd259a update README 2014-06-16 22:06:44 +08:00
Nguyen Anh Quynh
6217f36d12 update README 2014-06-16 18:38:32 +08:00
Nguyen Anh Quynh
64091f77e0 resize total memory allocated for @insns to just the right size for cs_disasm_ex() 2014-06-16 18:37:11 +08:00
Nguyen Anh Quynh
9cf88119fb x86: InternalInstruction@xAcquireRelease should be initialized to 0 (FALSE) 2014-06-16 18:32:34 +08:00
Nguyen Anh Quynh
fec5539f3a use calloc() to zerout insn_cache in make_id2insn. this makes sure uninitialized data zero 2014-06-16 17:31:43 +08:00
Nguyen Anh Quynh
495295ecd4 MCInst_Init() is arch-independent 2014-06-16 15:54:32 +08:00
Nguyen Anh Quynh
370b7d7d4e remove unused MCInst/MCOperand functions 2014-06-16 14:57:07 +08:00
Nguyen Anh Quynh
264ca37ad8 MCInst_addOperand2() does not need to return value 2014-06-16 14:52:09 +08:00
Nguyen Anh Quynh
215e76b223 ppc: use MCInst_insert0() instead of MCInst_insert() to avoid malloc/free 2014-06-16 14:47:43 +08:00
Nguyen Anh Quynh
d06f3d662b xcore: use CreateImm0() & CreateReg0() to create MCOperand* to avoid using malloc/free 2014-06-16 14:35:08 +08:00
Nguyen Anh Quynh
88fca42a5f xcore: use SStream_concat0() instead of SStream_concat() for simple string processing whenever possible 2014-06-16 14:30:19 +08:00
Nguyen Anh Quynh
7062988855 systemz: use CreateImm0() & CreateReg0() to create MCOperand* to avoid using malloc/free 2014-06-16 13:09:15 +08:00
Nguyen Anh Quynh
bddd215099 systemz: use SStream_concat0() instead of SStream_concat() for simple string processing whenever possible 2014-06-16 13:02:41 +08:00
Nguyen Anh Quynh
3d3b6cec01 sparc: use CreateImm0() & CreateReg0() to create MCOperand* to avoid using malloc/free 2014-06-16 12:57:02 +08:00
Nguyen Anh Quynh
9b91de0ae3 sparc: use SStream_concat0() instead of SStream_concat() for simple string processing whenever possible 2014-06-16 12:51:07 +08:00