Commit Graph

166 Commits

Author SHA1 Message Date
tandasat
d4ef430b33 port Windows driver support 2016-05-11 21:48:32 -07:00
Nguyen Anh Quynh
1a4253b88f arm64: another attempt to fix MSVC warning 2016-03-08 01:07:36 +08:00
Nguyen Anh Quynh
15768eafb0 fix some compilation warnings reported by MSVC 2016-03-08 00:49:15 +08:00
Álvaro Felipe Melchor
58e8a93755 fix oob write in arch/AArch64/AArch64InstPrinter.c 2016-03-07 00:01:52 +01:00
Nguyen Anh Quynh
885e488a2e arm64: LDR does not write to second operand 2016-03-01 12:40:11 +08:00
Nguyen Anh Quynh
0c2e8a2d60 arm64: LDR instructions do not read target register 2016-03-01 12:13:38 +08:00
Nguyen Anh Quynh
4b5dc21fa9 arm64: TBX & TBL have up to 4 registers in vector list 2016-03-01 11:05:55 +08:00
Nguyen Anh Quynh
aab7f63b02 arm64: fix some compilation warnings & indentation 2016-01-22 22:25:49 +08:00
Pranith Kumar
653827bf5a Add register access info for ARM64
Signed-off-by: Pranith Kumar <bobby.prani@gmail.com>
2016-01-06 15:54:10 -05:00
Zach Riggle
1e882cf542 Add ARM64_GRP_INT to AArch64 for SVC instruction 2015-07-27 12:42:06 -04:00
Nguyen Anh Quynh
b6f0d440b2 arm64: print immediate as signed int64 for memory operands. suggested by @pancake 2015-05-23 23:57:00 +08:00
Nguyen Anh Quynh
a071b4750a arm64: make the new code instroduced by David more friendly with MSVC & do check for valid detail pointer before updating writeback 2015-05-19 21:18:36 +08:00
David Callahan
19dc1ce875 fix stray typo 2015-05-18 11:58:21 -07:00
David Callahan
4cd188502f reformat 2015-05-16 09:52:12 -07:00
David Callahan
63542aba18 merge 2015-05-16 09:44:50 -07:00
David Callahan
9c95bdef67 fix setting writeback for post index memory accesses 2015-05-16 09:40:24 -07:00
David Callahan
63547c70d4 fix setting writeback for post index memory accesses 2015-05-10 16:39:15 -07:00
Nguyen Anh Quynh
1182d25759 simplify ARCH_group_name() by using lookup table as suggested by @learn_more. also added the missing group name for GRP_PRIVILEGE 2015-04-27 12:13:34 +08:00
Cr4sh
19ee2d10b3 inttypes.h fix 2015-03-29 21:16:38 +08:00
Nguyen Anh Quynh
efffe787d1 Add new API and start to provide access information for instruction operands
- New API cs_regs_access() that provide registers being read & modified by instruction

- New field cs_x86_op.access provides access info (READ, WRITE) for each operand

- New field cs_x86.eflags provides EFLAGS affected by instruction

- Extend cs_detail.{regs_read, regs_write} from uint8_t to uint16_t type
2015-03-25 15:02:13 +08:00
Nguyen Anh Quynh
5e5b1f5366 core: rename operand access symbols from CS_OP_* to CS_AC_* 2015-03-23 00:09:20 +08:00
Nguyen Anh Quynh
f97067924c arm64: use symbol rather than constant (128) for calculating group name in AArch64_group_name() 2015-03-16 11:49:33 +07:00
David Callahan
9092e5295f Change AArch64 GRP_JUMP to use a static table implementation
Added support for GRP_CALL and GRP_RETURN to AArch64
2015-03-15 18:01:48 -07:00
Nguyen Anh Quynh
681070ccf4 Merge pull request #279 from radare/arm64-priv
add ARM64_GRP_PRIVILEGE group and tag some instructions
2015-03-12 17:42:14 +08:00
pancake
21b0bdd0e1 Fix indent issue 2015-03-11 00:40:14 +01:00
pancake
dae7c3ee9f add ARM64_GRP_PRIVILEGE group and tag some instructions 2015-03-11 00:23:22 +01:00
Nguyen Anh Quynh
bb5dccedfa core: put insns[] into separate .inc files to make it easier to manage 2015-03-08 10:54:32 +08:00
Nguyen Anh Quynh
bfcaba5851 2015 2015-03-04 17:45:23 +08:00
Nguyen Anh Quynh
2c55b81f06 mips: fix conflict when merging with 'next' branch 2015-03-04 11:29:49 +08:00
Félix Cloutier
f6a065c9ba Silencing uninitialized variable warning about insn_id 2015-03-04 11:26:39 +08:00
Nguyen Anh Quynh
3e4c3572f7 arm64: update core 2015-03-03 22:58:54 +08:00
Nguyen Anh Quynh
c87ccd1b89 mips: fix bugs in the last update 2015-03-02 17:31:44 +08:00
Nguyen Anh Quynh
96ee76fa2a Merge branch 'next' of https://github.com/radare/capstone into test2 2015-02-28 08:29:21 +08:00
Nguyen Anh Quynh
ed6d75a701 arm64: fix a wrong declaration of array insn_ops[] 2015-02-24 22:03:28 +08:00
BuiDinhCuong
51ff8496d1 Add instructions into insn_ops 2015-02-24 20:22:08 +07:00
pancake
9c10ace558 Make pkg-config and source consistent with installation 2015-02-24 05:03:04 +01:00
Nguyen Anh Quynh
e8eb536346 arm64: add place holder for insn_ops[] 2015-02-23 11:35:35 +08:00
Nguyen Anh Quynh
273c6f4a9e arm64 & sparc: fix some warnings reported by MSVC 2015-01-13 14:33:09 +08:00
Nguyen Anh Quynh
0c30daf749 arm64: BL & BLR do not read SP register 2015-01-13 10:41:18 +08:00
Nguyen Anh Quynh
c9c3fdc3c9 arm64: print ADR with absolute address. bug reported by blackboxer123 2014-12-23 15:30:40 +08:00
Nguyen Anh Quynh
03a1836454 arm64: set absolute (rather than relative) address B/BL. issue reported by Pancake 2014-12-12 22:06:06 +08:00
reverser
68197d9a5e Make it C89 compatible. 2014-11-20 13:45:43 +00:00
reverser
202da41980 Fix compiler warnings about different sizes and sign. 2014-11-20 12:13:19 +00:00
Nguyen Anh Quynh
aa50c645a8 arm64: fix ADRP (relative offset). bug reported by @shadymallow 2014-11-17 11:21:57 +08:00
Nguyen Anh Quynh
23280950b7 arm64: cleanup 2014-11-15 08:53:00 +08:00
Nguyen Anh Quynh
6ee95188b5 arm64: print immediate in hexa for binary bitwise arith instructions: AND/ORR/EOR/TST 2014-11-10 21:43:02 +08:00
Nguyen Anh Quynh
0157ba1ebe arm64: add missing commas in SBFIZ/UBFIZ/SBFX/UBFX instructions 2014-11-08 14:33:16 +08:00
Nguyen Anh Quynh
c109e8eef3 arm64: print shifter in decimal mode. this is to be consistent with ARM engine 2014-11-08 13:58:50 +08:00
Nguyen Anh Quynh
c2ea812ea7 fix cs_group_name() after the change on generic group ids 2014-10-31 15:36:19 +08:00
Nguyen Anh Quynh
c96f1b06b2 x86: fix Out-of-bounds read error in is16BitEquivalent(). issue reported by Coverity 2014-10-01 14:35:29 +08:00