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Author SHA1 Message Date
Nguyen Anh Quynh
344d5e250a Merge branch 'next' of https://github.com/aquynh/capstone into next 2014-12-04 23:13:46 +07:00
Nguyen Anh Quynh
ba31f26d5d x86: MOV32ms should reference word rather than dword. bug reported by Gabriel Quadros 2014-12-04 23:12:38 +07:00
Nguyen Anh Quynh
3caf837c9a arm: alias LDR instruction with operands '[sp], 4' to POP. suggested by Pancake 2014-11-27 14:34:40 +08:00
Nguyen Anh Quynh
a2934a7b6a arm: print immediate op of MVN instruction in positive hexadecimal form. issue reported by Pancake 2014-11-25 21:02:18 +08:00
Peter Mackay
4e732c7db4 Populate PowerPC slwi/srwi instruction details with SH operand. 2014-11-23 00:15:19 +00:00
Nguyen Anh Quynh
c00bc2efb6 fix the left-over C89 issues introduced by Pedro 2014-11-21 19:29:47 +08:00
Nguyen Anh Quynh
07532bd620 Merge branch 'master' of https://github.com/gdbinit/capstone into fix 2014-11-21 19:21:40 +08:00
reverser
68197d9a5e Make it C89 compatible. 2014-11-20 13:45:43 +00:00
reverser
202da41980 Fix compiler warnings about different sizes and sign. 2014-11-20 12:13:19 +00:00
Nguyen Anh Quynh
8ab01369d7 python: export generic operand types & groups 2014-11-19 22:12:40 +08:00
Nguyen Anh Quynh
b53a59af53 update ChangeLog for 3.0 2014-11-19 17:56:04 +08:00
Nguyen Anh Quynh
812221894c merge next branch 2014-11-19 16:56:59 +08:00
Nguyen Anh Quynh
89460299c3 python: python2.6 does not understand sys.versionn_info.major 2014-11-19 14:37:08 +08:00
Nguyen Anh Quynh
0ea529a6f3 java: add close() method to avoid some unknown crash caused by finallize() on Ubuntu 14.04. FIXME 2014-11-19 10:58:31 +08:00
Nguyen Anh Quynh
fadbddcbf8 update ChangeLog for 3.0 2014-11-18 22:53:32 +08:00
Nguyen Anh Quynh
22278ec937 mips & xcore: some safety guards to make sure printOperand() do not overflow Operands[] for some unknown reasons 2014-11-17 22:59:24 +08:00
Nguyen Anh Quynh
d83c8c7d44 suite: change CS_MODE_32 -> CS_MODE_MIPS32, CS_MODE_64 -> CS_MODE_MIPS64 for fuzz.py & benchmark.py 2014-11-17 17:38:18 +08:00
Nguyen Anh Quynh
faa925ab8f fix bindings (python/java) and tests after the last change on the type of imm of cs_arm64_op 2014-11-17 11:39:36 +08:00
Nguyen Anh Quynh
56128da515 arm64: for operand type IMM, value should have the type int64_t, not int32_t. all bindings should be fixed 2014-11-17 11:27:15 +08:00
Nguyen Anh Quynh
aa50c645a8 arm64: fix ADRP (relative offset). bug reported by @shadymallow 2014-11-17 11:21:57 +08:00
Nguyen Anh Quynh
57a902d045 suite: add crc32 instruction to x86odd.py 2014-11-16 19:48:41 +08:00
Nguyen Anh Quynh
b0082295a1 suite: add some tricky x86 code to x86odd.py 2014-11-16 19:08:25 +08:00
Nguyen Anh Quynh
bb77154a4f Merge branch 'next' of https://github.com/aquynh/capstone into next 2014-11-16 00:26:23 +08:00
Nguyen Anh Quynh
23280950b7 arm64: cleanup 2014-11-15 08:53:00 +08:00
Nguyen Anh Quynh
736762d395 update COMPILE.TXT to add more bindings 2014-11-14 15:22:05 +08:00
Nguyen Anh Quynh
b0ee0c9c4e Merge branch 'next' of https://github.com/aquynh/capstone into next 2014-11-14 10:11:39 +08:00
Nguyen Anh Quynh
f85f981be8 update COMPILE.TXT 2014-11-13 14:58:45 +08:00
Nguyen Anh Quynh
02cafeb8bd suite: update Mips modes of MC input to CS_MODE_MIPS32 & CS_MODE_MIPS64 2014-11-13 12:46:48 +08:00
Nguyen Anh Quynh
ff9a5743d9 ocaml: update Mips modes to CS_MODE_MIPS32 & CS_MODE_MIPS64 2014-11-13 12:09:49 +08:00
Nguyen Anh Quynh
a7b06fda6e capstone.h: add comments on some hardware modes 2014-11-13 12:00:48 +08:00
Nguyen Anh Quynh
e01fdfb94f java: add comments on hardware modes 2014-11-13 11:58:11 +08:00
Nguyen Anh Quynh
75c9b6a45c python: fix comments on hardware modes 2014-11-13 11:55:56 +08:00
Nguyen Anh Quynh
26fd6b1bd9 ocaml: typo (CS_MODE_32) in test_ppc.ml 2014-11-13 11:51:59 +08:00
Nguyen Anh Quynh
bf4723f970 java: update Mips modes to CS_MODE_MIPS32 & CS_MODE_MIPS64 2014-11-13 11:49:14 +08:00
Nguyen Anh Quynh
143a494ae7 python: add CS_MODE_MIPS32/64 2014-11-13 11:45:57 +08:00
Nguyen Anh Quynh
ec58a02c6d python: update Mips modes to CS_MODE_MIPS32 & CS_MODE_MIPS64 2014-11-13 11:42:38 +08:00
Nguyen Anh Quynh
952da90e5b suite: add missing tests to test_c.sh 2014-11-13 11:39:58 +08:00
Nguyen Anh Quynh
84df600944 tests: update Mips modes to CS_MODE_MIPS32 & CS_MODE_MIPS64 2014-11-13 11:27:51 +08:00
Nguyen Anh Quynh
d3f0373ed1 add CS_MODE_MIPS32 & CS_MODE_MIPS64. these modes are aliases of CS_MODE_32 & CS_MODE_64, so no old code is broken 2014-11-13 11:20:09 +08:00
Nguyen Anh Quynh
7e75ca6d21 python: CS_MODE_MIPS32R6 is independent from CS_MODE_32 2014-11-13 11:17:38 +08:00
Nguyen Anh Quynh
0d97a3b3aa mips: CS_MODE_MIPS32R6 is an independent mode, and should not combine with CS_MODE_32 2014-11-13 11:12:52 +08:00
Nguyen Anh Quynh
cc60d10940 mips: add comments on mips32 & mips64 to capstone.h 2014-11-12 18:18:26 +08:00
Nguyen Anh Quynh
7dada4f36a Merge branch 'next' of https://github.com/wodz/capstone into mips 2014-11-12 18:00:56 +08:00
Marcin Bukat
921a46c38f mips: Fix j/jal target address calculation 2014-11-12 11:06:34 +01:00
Nguyen Anh Quynh
c36e675213 mips: refine getFeatureBits() to make it more clear what Mips features are supported 2014-11-12 15:57:52 +08:00
Nguyen Anh Quynh
1ffc1b2201 arm: fix printMemBOption() that was wrongly fixed in 51888c3e08 2014-11-12 13:33:15 +08:00
Nguyen Anh Quynh
6782cbf5fd cython: support the newly added field mem_barrier in cs_arm 2014-11-12 11:22:16 +08:00
Nguyen Anh Quynh
128124c995 python: typo on README 2014-11-12 11:13:39 +08:00
Nguyen Anh Quynh
6f00a9827b Merge branch 'next' of https://github.com/aquynh/capstone into next 2014-11-12 11:07:32 +08:00
Nguyen Anh Quynh
753f44a6b7 capstone.h: add comment for CS_ARCH_ALL 2014-11-12 11:05:42 +08:00