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Author SHA1 Message Date
remittor
368c367d4e [x86] Fix decode opcode A0 and A1 (X86_MOV32ao16 + X86_MOV64ao32) 2015-04-17 14:07:02 +03:00
Vincent Bénony
b5e0f13cb0 Merge branch 'next' of https://github.com/aquynh/capstone into next 2015-04-17 11:43:15 +02:00
Vincent Bénony
d2f47d065f Remove enum for ASRS, LSRS, SUBS and MOVS 
These instructions are now disassembled ASR, LSR, SUB and MOV, with the "update_flags" bit set.
 2015-04-17 11:42:45 +02:00
Vincent Bénony
68d7f723da remove some variants 2015-04-17 11:25:23 +02:00
Nguyen Anh Quynh
ba2ead07aa some fixes for bindings/README 2015-04-17 11:13:18 +08:00
Nguyen Anh Quynh
1dacf5a26d update bindings/README to add Capstone.NET binding 2015-04-17 11:13:08 +08:00
Nguyen Anh Quynh
de693e48e1 delete a trailing whitespace in x86.h 2015-04-16 21:49:56 +08:00
Nguyen Anh Quynh
62f843f82a Merge branch 'next' of https://github.com/remittor/capstone into t5 2015-04-16 21:45:54 +08:00
Nguyen Anh Quynh
75bd853b84 Merge pull request #318 from captincook/next 
x86: add more cases to print as unsigned 8bit imm
 2015-04-16 21:40:37 +08:00
remittor
f59b3a759b [x86] Fix decode opcode A0 and A1 (movabs) 
Bug:
  00491AD0  A0 11 12 13 14            mov al, byte ptr [0x14131211]
        Prefix:0x00 0x00 0x00 0x00
        Opcode:0xa0 0x00 0x00 0x00
        addr_size: 4
        op_count: 1
                operands[0].type: MEM
                        operands[0].mem.disp: 0x14131211
                operands[0].size: 1
 2015-04-15 13:44:11 +03:00
remittor
556f4fe41a [x86] Replace "enum x86_eflags_type" to #define 
Needed for compatible with MS VS 2008 compiler.
 2015-04-15 13:15:53 +03:00
remittor
3a75479a65 Changed type for segment,base,index in struct x86_op_mem 2015-04-15 13:09:46 +03:00
remittor
68e948b2c1 Changed type for cs_x86_op.reg 
Fixed type for cs_x86_op reg to be a x86_reg instead of unsigned int.  This makes it easier to understand that reg is a x86_reg enumeration versus something else.  It is currently not clear which type reg is.
 2015-04-15 13:04:39 +03:00
learn_more
21a26950ac whitespace, as requested. 2015-04-15 07:24:59 +08:00
learn_more
147d95b6ce Change msvc ImportLib for static target to 'capstone_dll.lib' 
This is the same as e268f46 changed in the vcxproj file.
 2015-04-15 07:24:47 +08:00
NighterMan
72ee3c9b15 sparc: Improved displacement decoding for banching instructions 2015-04-14 10:00:22 +08:00
Vincent Bénony
299dd09814 Merge branch 'next' of https://github.com/aquynh/capstone into next 2015-04-13 12:07:24 +02:00
me
26cb4aa50f x86: add more cases to print as unsigned 8bit imm 2015-04-12 15:37:00 +02:00
Nguyen Anh Quynh
89820c40ae x86: print 8 bit immediate number in positive form. still need a more systematic approach to do same thing for other forms of immediates 2015-04-11 14:30:46 +08:00
Nguyen Anh Quynh
8db578a7ec fix typo in myinttypes.h 2015-04-10 23:22:22 +08:00
reverser
160e198584 Add support to embed Capstone 3.x branch into OS X kernel extensions. 2015-04-09 18:28:19 +01:00
Nguyen Anh Quynh
fa17d871f1 remove stdio.h from capstone.h. this is to make it possible to embed to OSX kernel. issue reported by Pedro 2015-04-09 22:56:15 +08:00
Vincent Bénony
66cff88870 Merge branch 'next' of https://github.com/aquynh/capstone into next 2015-04-08 16:25:37 +02:00
Nguyen Anh Quynh
7289f15a5d x86: tighter check on return of consumeByte() & lookAtByte(). this fixes the segfault on the sole input of 0xf3 reported by windhl 2015-04-08 12:17:12 +08:00
Félix Cloutier
e5e874356b Renaming inttypes.h -> myinttypes.h 2015-04-08 09:31:27 +08:00
Nguyen Anh Quynh
cbbbac24c3 Merge branch 'next' of https://github.com/aquynh/capstone into next 2015-04-07 16:06:27 +08:00
Nguyen Anh Quynh
c343a917fb python: revert to use distutils rather than setuptools 2015-04-07 16:03:01 +08:00
Hank Leininger
3feaa11cd9 Add DESTDIR support for the python binding. 
Without this patch, DESTDIR is ignored, so build systems that use a
staging sandbox prior to installing in real-root, such as Gentoo,
cannot build the python binding.

Caveats:

1) I wrote/tested this against the 3.0.2 release, not current HEAD.

2) It might be preferable to do DESTDIR ?= / at the top of the Makefile,
   so that the if/else/fi can be squashed back out.

3) The install_cython target probably needs a similar change; untested.

4) Other bindings might need something similar.
 2015-04-07 15:39:05 +08:00
Nguyen Anh Quynh
ed643e8622 README: add Rust as supported binding language 2015-04-07 15:05:28 +08:00
Hank Leininger
1c0288043c Add DESTDIR support for the python binding. 
Without this patch, DESTDIR is ignored, so build systems that use a
staging sandbox prior to installing in real-root, such as Gentoo,
cannot build the python binding.

Caveats:

1) I wrote/tested this against the 3.0.2 release, not current HEAD.

2) It might be preferable to do DESTDIR ?= / at the top of the Makefile,
   so that the if/else/fi can be squashed back out.

3) The install_cython target probably needs a similar change; untested.

4) Other bindings might need something similar.
 2015-04-07 13:16:55 +08:00
Nguyen Anh Quynh
2a36c1631b python: fix test_arm.py (indentation on output) 2015-04-07 13:09:16 +08:00
Nguyen Anh Quynh
8fa48fbd8a bindings: update java/ocaml/python bindings after the last change on Arm core 2015-04-07 12:22:51 +08:00
Nguyen Anh Quynh
29f777bdd9 arm: support cs_regs_access() API 2015-04-07 11:59:26 +08:00
Nguyen Anh Quynh
5f22deb071 add links to Lua & Rust bindings 2015-04-05 11:07:54 +08:00
Nguyen Anh Quynh
7fc876ad28 x86: add some FP instructions with st(0) register to insn_regs_att[] & insn_regs_intel[]. also add missing access info for these instructions to insn_ops[] 2015-04-04 14:00:20 +08:00
Nguyen Anh Quynh
ad18ed0ef2 x86: fix issue #305. also correct arrays insn_regs_att[] & insn_regs_intel[] 2015-04-04 13:36:25 +08:00
Vincent Bénony
e3b572364d Merge branch 'next' of https://github.com/aquynh/capstone into next 2015-04-03 21:17:02 +02:00
Nguyen Anh Quynh
b023ffe077 x86: add missing CL register operand for shift rotate instructions involving CL (AT&T syntax) 2015-04-03 21:23:19 +08:00
Nguyen Anh Quynh
3f1bfc97cc x86: fix operand access info of string instructions 2015-04-03 16:47:43 +08:00
Nguyen Anh Quynh
199ef4259b x86: the exact registers (*SI/*DI) that string instructions access depend on hardware mode (16/32/64bit) 2015-04-03 13:29:37 +08:00
Vincent Bénony
230c7814e1 Merge branch 'eflags-fix' into next 2015-04-02 18:30:10 +02:00
Nguyen Anh Quynh
fce28ce159 x86: revert the old change that check prefix location more strictly 2015-04-03 00:10:31 +08:00
Nguyen Anh Quynh
85b194fcf8 Merge pull request #303 from bSr43/eflags-fix 
Same fix on the reduce table.
 2015-04-02 23:55:18 +08:00
Vincent Bénony
1f33733482 Same fix on the reduce table. 2015-04-02 17:34:25 +02:00
Nguyen Anh Quynh
865dd8fa45 Merge branch 'eflags-fix' of https://github.com/bSr43/capstone into t9 2015-04-02 23:00:00 +08:00
Nguyen Anh Quynh
4544ba1f02 cython: support cs_regs_access() API 2015-04-02 22:54:52 +08:00
Vincent Bénony
7b02b12399 Fix EFLAGS for the sar/sal/shr/shl instructions. 2015-04-02 16:29:52 +02:00
Nguyen Anh Quynh
58eb07355e x86: avoid duplicating registers returned by cs_regs_access(). also add *CX registers to regs_read[], regs_write[] for REP* instructions 2015-04-02 15:18:33 +08:00
Nguyen Anh Quynh
9239967dd7 x86: fix instruction 66f20f59ff reported by @maijin 2015-04-02 12:41:41 +08:00
Nguyen Anh Quynh
6a4d27706a x86: fix the pause instruction reported by @maijin in issue #298 2015-04-02 12:32:33 +08:00