capstone/arch/RISCV
Rot127 3a2cd3c331
Coverity defects (#2469)
* Fix CID 508418 - Uninitialized struct

* Fix CID 509089 - Fix OOB read and write

* Fix CID 509088 - OOB.

Also adds tests and to ensure no OOB access.

* Fix CID 509085 - Resource leak.

* Fix CID 508414 and companions - Using undefined values.

* Fix CID 508405 - Use of uninitialized value

* Remove unnecessary and badly implemented dev fuzz code.

* Fix CID 508396 - Uninitialzied variable.

* Fix CID 508393, 508365 -- OOB read.

* Fix CID 432207 - OVerlapping memory access.

* Remove unused functions

* Fix CID 432170 - Overlapping memory access.

* Fix CID 166022 - Check for negative index

* Let strncat not depend n src operand.

* Fix 509083 and 509084 - NULL dereference

* Remove duplicated code.

* Initialize sysop

* Fix resource leak

* Remove unreachable code.

* Remove duplicate code.

* Add assert to check return value of cmoack

* Fixed: d should be a signed value, since it is checked against < 0

* Add missing break.

* Add NULL check

* Fix signs of binary search comparisons.

* Add explicit cast of or result

* Fix correct scope of case.

* Handle invalid integer type.

* Return UINT_MAX instead of implicitly casted -1

* Remove dead code

* Fix type of im

* Fix type of d

* Remove duplicated code.

* Add returns after CS_ASSERTS

* Check for len == 0 case.

* Ensure shift operates on uint64

* Replace strcpy with strncpy.

* Handle edge cases for 32bit rotate

* Fix some out of enum warnings

* Replace a strcpy with strncpy.

* Fix increment of address

* Skip some linting

* Fix: set instruction id

* Remove unused enum

* Replace the last usages of strcpy with SStream functions.

* Increase number of allowed AArch64 operands.

* Check safety of incrementing t the next operand.

* Fix naming of operand

* Update python constants

* Fix option setup of CS_OPT_DETAIL_REAL

* Document DETAIL_REAL has to be used with CS_OPT_ON.

* Run Coverity scan every Monday.

* Remove dead code

* Fix OOB read

* Rename macro to reflect it is only used with sstreams

* Fix rebase issues
2024-09-18 21:19:42 +08:00
..
RISCVBaseInfo.h [RISCV] Use CS_ASSERT (#1493) 2019-05-23 08:25:36 +07:00
RISCVDisassembler.c Add access support for RISC-V (#2393) 2024-07-10 11:36:39 +08:00
RISCVDisassembler.h RISCV support ISRV32/ISRV64 (#1401) 2019-03-09 08:41:12 +08:00
RISCVGenAsmWriter.inc Coverity defects (#2469) 2024-09-18 21:19:42 +08:00
RISCVGenDisassemblerTables.inc Coverity defects (#2469) 2024-09-18 21:19:42 +08:00
RISCVGenInsnNameMaps.inc RISCV support ISRV32/ISRV64 (#1401) 2019-03-09 08:41:12 +08:00
RISCVGenInstrInfo.inc RISCV support ISRV32/ISRV64 (#1401) 2019-03-09 08:41:12 +08:00
RISCVGenRegisterInfo.inc AArch64 update to LLVM 18 (#2298) 2024-07-08 10:28:54 +08:00
RISCVGenSubtargetInfo.inc RISCV support ISRV32/ISRV64 (#1401) 2019-03-09 08:41:12 +08:00
RISCVInstPrinter.c Add access support for RISC-V (#2393) 2024-07-10 11:36:39 +08:00
RISCVInstPrinter.h RISCV support ISRV32/ISRV64 (#1401) 2019-03-09 08:41:12 +08:00
RISCVMapping.c Add access support for RISC-V (#2393) 2024-07-10 11:36:39 +08:00
RISCVMapping.h Add access support for RISC-V (#2393) 2024-07-10 11:36:39 +08:00
RISCVMappingInsn.inc RISCV: add more instruction groups 2023-05-01 22:55:26 +02:00
RISCVMappingInsnOp.inc Add access support for RISC-V (#2393) 2024-07-10 11:36:39 +08:00
RISCVModule.c Modern Testing (#2456) 2024-08-31 21:33:38 +08:00
RISCVModule.h RISCV support ISRV32/ISRV64 (#1401) 2019-03-09 08:41:12 +08:00