capstone/arch
2014-05-21 12:38:10 +08:00
..
AArch64 x86: add immediate operand (1) for SHL/SHR/ROR/ROL/SAR/SAL in detail mode & Intel syntax 2014-05-19 16:46:31 +08:00
ARM x86: add immediate operand (1) for SHL/SHR/ROR/ROL/SAR/SAL in detail mode & Intel syntax 2014-05-19 16:46:31 +08:00
Mips MIPS: Add HI, LO, and PC registers to MipsMapping.c 2014-05-19 22:56:19 -07:00
PowerPC x86: add immediate operand (1) for SHL/SHR/ROR/ROL/SAR/SAL in detail mode & Intel syntax 2014-05-19 16:46:31 +08:00
Sparc x86: add immediate operand (1) for SHL/SHR/ROR/ROL/SAR/SAL in detail mode & Intel syntax 2014-05-19 16:46:31 +08:00
SystemZ x86: add immediate operand (1) for SHL/SHR/ROR/ROL/SAR/SAL in detail mode & Intel syntax 2014-05-19 16:46:31 +08:00
X86 x86: prefix REP/REPNE are only relevant for MOVS/CMPS/SCAS/LDOS/STOS/INS/OUTS instructions 2014-05-21 12:38:10 +08:00