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21f7bc85f9
* Fix leaks * Remove unnecessary new lines * Add checks for actual buffer length before attempting reading it. * Xtensa: add xtensa support * Xtensa fixes - fix MCExpr - fix Xtensa_add_cs_detail - add `add_cs_detail` - add `MCExpr *MCOperand_getExpr(const MCOperand *MC)` `void printExpr(const MCExpr *E, SStream *O)` autosync fix - fix StreamOperation.py - replace `report_fatal_error` with `CS_ASSERT` - fix patch StreamOperation.py - replace `assert` with `CS_ASSERT` - fix AddCSDetail.py - fix QualifiedIdentifier * Xtensa fix * Xtensa fix .py * add Xtensa to the fuzzer * Xtensa `LITBASE`: add a basic implementation * Xtensa `LITBASE`: add a integration test * Xtensa: fix cs_v6_release_guide.md * Xtensa: fix `XTENSA_OP_GROUP_MEMOPERAND` * Xtensa: fix * Xtensa: fix Targets.py * Use isUint and isInt all over Xtensa * Add documentation about LITBASE functionality * Fix typo * Replace hard with Capstone assert * Xtensa: fix arch_config.json * Xtensa: fix --------- Co-authored-by: Rot127 <unisono@quyllur.org> |
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.. | ||
aarch64.h | ||
alpha.h | ||
arm64.h | ||
arm.h | ||
bpf.h | ||
capstone.h | ||
cs_operand.h | ||
evm.h | ||
hppa.h | ||
loongarch.h | ||
m68k.h | ||
m680x.h | ||
mips.h | ||
mos65xx.h | ||
platform.h | ||
ppc.h | ||
riscv.h | ||
sh.h | ||
sparc.h | ||
systemz_compatibility.h | ||
systemz.h | ||
tms320c64x.h | ||
tricore.h | ||
wasm.h | ||
x86.h | ||
xcore.h | ||
xtensa.h |