mirror of
https://github.com/capstone-engine/capstone.git
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6ba9f001b9
Signed-off-by: Sebastian Macke <sebastian@macke.de>
170 lines
4.0 KiB
C
170 lines
4.0 KiB
C
/* Capstone Disassembler Engine */
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/* By Sebastian Macke <sebastian@macke.de>, 2018 */
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#include <stdio.h>
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#include <stdlib.h>
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#include <capstone/platform.h>
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#include <capstone/capstone.h>
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struct platform {
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cs_arch arch;
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cs_mode mode;
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unsigned char *code;
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size_t size;
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const char *comment;
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};
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static csh handle;
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static void print_string_hex(const char *comment, unsigned char *str, size_t len)
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{
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unsigned char *c;
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printf("%s", comment);
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for (c = str; c < str + len; c++) {
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printf(" 0x%02x", *c & 0xff);
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}
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printf("\n");
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}
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static const char *get_am_name(mos65xx_address_mode mode)
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{
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switch(mode) {
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default:
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case MOS65XX_AM_NONE:
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return "No address mode";
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case MOS65XX_AM_IMP:
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return "implied addressing (no addressing mode)";
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case MOS65XX_AM_ACC:
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return "accumulator addressing";
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case MOS65XX_AM_ABS:
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return "absolute addressing";
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case MOS65XX_AM_ZP:
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return "zeropage addressing";
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case MOS65XX_AM_IMM:
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return "8 Bit immediate value";
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case MOS65XX_AM_ABSX:
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return "indexed absolute addressing by the X index register";
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case MOS65XX_AM_ABSY:
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return "indexed absolute addressing by the Y index register";
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case MOS65XX_AM_INDX:
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return "indexed indirect addressing by the X index register";
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case MOS65XX_AM_INDY:
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return "indirect indexed addressing by the Y index register";
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case MOS65XX_AM_ZPX:
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return "indexed zeropage addressing by the X index register";
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case MOS65XX_AM_ZPY:
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return "indexed zeropage addressing by the Y index register";
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case MOS65XX_AM_REL:
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return "relative addressing used by branches";
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case MOS65XX_AM_IND:
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return "absolute indirect addressing";
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}
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}
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static void print_insn_detail(cs_insn *ins)
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{
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cs_mos65xx *mos65xx;
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int i;
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// detail can be NULL on "data" instruction if SKIPDATA option is turned ON
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if (ins->detail == NULL)
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return;
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mos65xx = &(ins->detail->mos65xx);
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// printf("insn_detail\n");
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printf("\taddress mode: %s\n", get_am_name(mos65xx->am));
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printf("\tmodifies flags: %s\n", mos65xx->modifies_flags ? "true": "false");
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if (mos65xx->op_count)
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printf("\top_count: %u\n", mos65xx->op_count);
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for (i = 0; i < mos65xx->op_count; i++) {
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cs_mos65xx_op *op = &(mos65xx->operands[i]);
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switch((int)op->type) {
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default:
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break;
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case MOS65XX_OP_REG:
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printf("\t\toperands[%u].type: REG = %s\n", i, cs_reg_name(handle, op->reg));
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break;
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case MOS65XX_OP_IMM:
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printf("\t\toperands[%u].type: IMM = 0x%x\n", i, op->imm);
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break;
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case MOS65XX_OP_MEM:
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printf("\t\toperands[%u].type: MEM = 0x%x\n", i, op->mem);
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break;
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}
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}
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}
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static void test()
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{
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#define MOS65XX_CODE "\x0d\x34\x12\x00\x81\x87\x6c\x01\x00\x85\xFF\x10\x00\x19\x42\x42\x00\x49\x42"
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struct platform platforms[] = {
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{
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CS_ARCH_MOS65XX,
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0,
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(unsigned char *)MOS65XX_CODE,
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sizeof(MOS65XX_CODE) - 1,
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"MOS65XX"
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},
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};
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uint64_t address = 0x1000;
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cs_insn *insn;
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int i;
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size_t count;
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for (i = 0; i < sizeof(platforms)/sizeof(platforms[0]); i++) {
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cs_err err = cs_open(platforms[i].arch, platforms[i].mode, &handle);
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if (err) {
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printf("Failed on cs_open() with error returned: %u\n", err);
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abort();
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}
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cs_option(handle, CS_OPT_DETAIL, CS_OPT_ON);
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count = cs_disasm(handle, platforms[i].code, platforms[i].size, address, 0, &insn);
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if (count) {
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size_t j;
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printf("****************\n");
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printf("Platform: %s\n", platforms[i].comment);
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print_string_hex("Code:", platforms[i].code, platforms[i].size);
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printf("Disasm:\n");
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for (j = 0; j < count; j++) {
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printf("0x%" PRIx64 ":\t%s\t%s\n", insn[j].address, insn[j].mnemonic, insn[j].op_str);
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print_insn_detail(&insn[j]);
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puts("");
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}
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printf("0x%" PRIx64 ":\n", insn[j-1].address + insn[j-1].size);
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// free memory allocated by cs_disasm()
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cs_free(insn, count);
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} else {
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printf("****************\n");
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printf("Platform: %s\n", platforms[i].comment);
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print_string_hex("Code:", platforms[i].code, platforms[i].size);
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printf("ERROR: Failed to disasm given code!\n");
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abort();
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}
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printf("\n");
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cs_close(&handle);
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}
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}
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int main()
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{
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test();
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return 0;
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}
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