mirror of
https://github.com/capstone-engine/capstone.git
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44ce36d1ad
* Bump the "cs_insn.bytes[]" size to 24 (from 16) to support M680x0 instructions with full EA (maximum 11 words) Added a test for this in test_m68k.s * Bump the "cs_detail.regs_read[]" size to 16 (from 12) to support M680x0 instructions with full REG_BITS (Dn+An = 16) * m68k: use immediate mode syntax (#$0) for movem/fmovem instructions with empty register list * update bindings to match changes to cs_insn and cs_detail
213 lines
5.7 KiB
C
213 lines
5.7 KiB
C
/* Capstone Disassembler Engine */
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/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 */
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#include <stdio.h>
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#include <assert.h>
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#include <capstone/platform.h>
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#include <capstone/capstone.h>
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struct platform {
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cs_arch arch;
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cs_mode mode;
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unsigned char* code;
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size_t size;
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const char* comment;
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};
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static csh handle;
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static void print_string_hex(const char* comment, unsigned char* str, size_t len)
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{
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unsigned char *c;
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printf("%s", comment);
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for (c = str; c < str + len; c++) {
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printf("0x%02x ", *c & 0xff);
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}
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printf("\n");
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}
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const char* s_addressing_modes[] = {
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"<invalid mode>",
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"Register Direct - Data",
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"Register Direct - Address",
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"Register Indirect - Address",
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"Register Indirect - Address with Postincrement",
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"Register Indirect - Address with Predecrement",
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"Register Indirect - Address with Displacement",
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"Address Register Indirect With Index - 8-bit displacement",
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"Address Register Indirect With Index - Base displacement",
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"Memory indirect - Postindex",
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"Memory indirect - Preindex",
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"Program Counter Indirect - with Displacement",
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"Program Counter Indirect with Index - with 8-Bit Displacement",
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"Program Counter Indirect with Index - with Base Displacement",
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"Program Counter Memory Indirect - Postindexed",
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"Program Counter Memory Indirect - Preindexed",
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"Absolute Data Addressing - Short",
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"Absolute Data Addressing - Long",
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"Immediate value",
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};
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static void print_read_write_regs(cs_detail* detail)
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{
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int i;
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for (i = 0; i < detail->regs_read_count; ++i)
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{
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uint16_t reg_id = detail->regs_read[i];
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const char* reg_name = cs_reg_name(handle, reg_id);
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printf("\treading from reg: %s\n", reg_name);
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}
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for (i = 0; i < detail->regs_write_count; ++i)
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{
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uint16_t reg_id = detail->regs_write[i];
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const char* reg_name = cs_reg_name(handle, reg_id);
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printf("\twriting to reg: %s\n", reg_name);
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}
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}
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static void print_insn_detail(cs_insn *ins)
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{
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cs_m68k* m68k;
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cs_detail* detail;
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int i;
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// detail can be NULL on "data" instruction if SKIPDATA option is turned ON
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if (ins->detail == NULL)
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return;
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detail = ins->detail;
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m68k = &detail->m68k;
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if (m68k->op_count)
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printf("\top_count: %u\n", m68k->op_count);
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print_read_write_regs(detail);
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printf("\tgroups_count: %u\n", detail->groups_count);
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for (i = 0; i < m68k->op_count; i++) {
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cs_m68k_op* op = &(m68k->operands[i]);
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switch((int)op->type) {
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default:
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break;
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case M68K_OP_REG:
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printf("\t\toperands[%u].type: REG = %s\n", i, cs_reg_name(handle, op->reg));
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break;
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case M68K_OP_IMM:
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printf("\t\toperands[%u].type: IMM = 0x%x\n", i, (int)op->imm);
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break;
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case M68K_OP_MEM:
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printf("\t\toperands[%u].type: MEM\n", i);
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if (op->mem.base_reg != M68K_REG_INVALID)
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printf("\t\t\toperands[%u].mem.base: REG = %s\n",
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i, cs_reg_name(handle, op->mem.base_reg));
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if (op->mem.index_reg != M68K_REG_INVALID) {
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printf("\t\t\toperands[%u].mem.index: REG = %s\n",
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i, cs_reg_name(handle, op->mem.index_reg));
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printf("\t\t\toperands[%u].mem.index: size = %c\n",
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i, op->mem.index_size ? 'l' : 'w');
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}
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if (op->mem.disp != 0)
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printf("\t\t\toperands[%u].mem.disp: 0x%x\n", i, op->mem.disp);
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if (op->mem.scale != 0)
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printf("\t\t\toperands[%u].mem.scale: %d\n", i, op->mem.scale);
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printf("\t\taddress mode: %s\n", s_addressing_modes[op->address_mode]);
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break;
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case M68K_OP_FP_SINGLE:
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printf("\t\toperands[%u].type: FP_SINGLE\n", i);
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printf("\t\t\toperands[%u].simm: %f\n", i, op->simm);
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break;
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case M68K_OP_FP_DOUBLE:
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printf("\t\toperands[%u].type: FP_DOUBLE\n", i);
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printf("\t\t\toperands[%u].dimm: %lf\n", i, op->dimm);
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break;
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case M68K_OP_REG_BITS:
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printf("\t\toperands[%u].type: REG_BITS = $%x\n", i, op->register_bits);
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}
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}
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printf("\n");
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}
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static void test()
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{
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#define M68K_CODE "\xf0\x10\xf0\x00\x48\xaf\xff\xff\x7f\xff\x11\xb0\x01\x37\x7f\xff\xff\xff\x12\x34\x56\x78\x01\x33\x10\x10\x10\x10\x32\x32\x32\x32\x4C\x00\x54\x04\x48\xe7\xe0\x30\x4C\xDF\x0C\x07\xd4\x40\x87\x5a\x4e\x71\x02\xb4\xc0\xde\xc0\xde\x5c\x00\x1d\x80\x71\x12\x01\x23\xf2\x3c\x44\x22\x40\x49\x0e\x56\x54\xc5\xf2\x3c\x44\x00\x44\x7a\x00\x00\xf2\x00\x0a\x28\x4E\xB9\x00\x00\x00\x12\x4E\x75"
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struct platform platforms[] = {
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{
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CS_ARCH_M68K,
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(cs_mode)(CS_MODE_BIG_ENDIAN | CS_MODE_M68K_040),
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(unsigned char*)M68K_CODE,
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sizeof(M68K_CODE) - 1,
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"M68K",
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},
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};
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uint64_t address = 0x01000;
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cs_insn *insn;
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int i;
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size_t count;
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for (i = 0; i < sizeof(platforms)/sizeof(platforms[0]); i++) {
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cs_err err = cs_open(platforms[i].arch, platforms[i].mode, &handle);
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if (err) {
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printf("Failed on cs_open() with error returned: %u\n", err);
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abort();
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}
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cs_option(handle, CS_OPT_DETAIL, CS_OPT_ON);
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count = cs_disasm(handle, platforms[i].code, platforms[i].size, address, 0, &insn);
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if (count) {
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size_t j;
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printf("****************\n");
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printf("Platform: %s\n", platforms[i].comment);
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print_string_hex("Code: ", platforms[i].code, platforms[i].size);
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printf("Disasm:\n");
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for (j = 0; j < count; j++) {
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assert(address == insn[j].address && "this means the size of the previous instruction was incorrect");
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address += insn[j].size;
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printf("0x%" PRIx64 ":\t%s\t%s\n", insn[j].address, insn[j].mnemonic, insn[j].op_str);
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print_insn_detail(&insn[j]);
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}
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printf("0x%" PRIx64 ":\n", insn[j-1].address + insn[j-1].size);
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// free memory allocated by cs_disasm()
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cs_free(insn, count);
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} else {
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printf("****************\n");
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printf("Platform: %s\n", platforms[i].comment);
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print_string_hex("Code:", platforms[i].code, platforms[i].size);
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printf("ERROR: Failed to disasm given code!\n");
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abort();
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}
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printf("\n");
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cs_close(&handle);
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}
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}
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int main()
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{
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test();
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return 0;
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}
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