mirror of
https://github.com/capstone-engine/capstone.git
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311 lines
9.7 KiB
C
311 lines
9.7 KiB
C
//===-- SystemZInstPrinter.cpp - Convert SystemZ MCInst to assembly syntax --------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This class prints an SystemZ MCInst to a .s file.
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//
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//===----------------------------------------------------------------------===//
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/* Capstone Disassembly Engine */
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/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 */
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <inttypes.h>
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#include "SystemZInstPrinter.h"
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#include "../../MCInst.h"
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#include "../../utils.h"
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#include "../../SStream.h"
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#include "../../MCRegisterInfo.h"
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#include "../../MathExtras.h"
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#include "SystemZMapping.h"
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static const char *getRegisterName(unsigned RegNo);
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static void set_mem_access(MCInst *MI, bool status)
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{
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if (MI->csh->detail != CS_OPT_ON)
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return;
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MI->csh->doing_mem = status;
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if (status) {
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MI->flat_insn.sysz.operands[MI->flat_insn.sysz.op_count].type = SYSZ_OP_MEM;
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MI->flat_insn.sysz.operands[MI->flat_insn.sysz.op_count].mem.base = SYSZ_REG_INVALID;
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MI->flat_insn.sysz.operands[MI->flat_insn.sysz.op_count].mem.disp = 0;
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} else {
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// done, create the next operand slot
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MI->flat_insn.sysz.op_count++;
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}
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}
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void SystemZ_post_printer(csh ud, cs_insn *insn, char *insn_asm)
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{
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/*
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if (((cs_struct *)ud)->detail != CS_OPT_ON)
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return;
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*/
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}
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static void printAddress(MCInst *MI, unsigned Base, int64_t Disp, unsigned Index, SStream *O)
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{
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if (Disp >= 0) {
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if (Disp > HEX_THRESHOLD)
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SStream_concat(O, "0x%"PRIx64, Disp);
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else if (Disp) // do not print Zero offset
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SStream_concat(O, "%"PRIu64, Disp);
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} else {
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if (Disp < -HEX_THRESHOLD)
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SStream_concat(O, "-0x%"PRIx64, -Disp);
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else
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SStream_concat(O, "-%"PRIu64, -Disp);
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}
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if (Base) {
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SStream_concat(O, "(");
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if (Index)
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SStream_concat(O, "%%%s, ", getRegisterName(Index));
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SStream_concat(O, "%%%s)", getRegisterName(Base));
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MI->flat_insn.sysz.operands[MI->flat_insn.sysz.op_count].type = SYSZ_OP_MEM;
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MI->flat_insn.sysz.operands[MI->flat_insn.sysz.op_count].mem.base = (uint8_t)SystemZ_map_register(Base);
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MI->flat_insn.sysz.operands[MI->flat_insn.sysz.op_count].mem.index = (uint8_t)SystemZ_map_register(Index);
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MI->flat_insn.sysz.operands[MI->flat_insn.sysz.op_count].mem.disp = Disp;
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MI->flat_insn.sysz.op_count++;
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} else if (!Index) {
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MI->flat_insn.sysz.operands[MI->flat_insn.sysz.op_count].type = SYSZ_OP_IMM;
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MI->flat_insn.sysz.operands[MI->flat_insn.sysz.op_count].imm = Disp;
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MI->flat_insn.sysz.op_count++;
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}
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}
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static void _printOperand(MCInst *MI, MCOperand *MO, SStream *O)
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{
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if (MCOperand_isReg(MO)) {
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unsigned reg;
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reg = MCOperand_getReg(MO);
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SStream_concat(O, "%%%s", getRegisterName(reg));
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reg = SystemZ_map_register(reg);
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if (MI->csh->detail) {
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MI->flat_insn.sysz.operands[MI->flat_insn.sysz.op_count].type = SYSZ_OP_REG;
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MI->flat_insn.sysz.operands[MI->flat_insn.sysz.op_count].reg = reg;
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MI->flat_insn.sysz.op_count++;
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}
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} else if (MCOperand_isImm(MO)) {
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int64_t Imm = MCOperand_getImm(MO);
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if (Imm >= 0) {
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if (Imm > HEX_THRESHOLD)
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SStream_concat(O, "0x%"PRIx64, Imm);
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else
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SStream_concat(O, "%"PRIu64, Imm);
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} else {
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if (Imm < -HEX_THRESHOLD)
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SStream_concat(O, "-0x%"PRIx64, -Imm);
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else
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SStream_concat(O, "%"PRIu64, -Imm);
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}
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if (MI->csh->detail) {
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MI->flat_insn.sysz.operands[MI->flat_insn.sysz.op_count].type = SYSZ_OP_IMM;
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MI->flat_insn.sysz.operands[MI->flat_insn.sysz.op_count].imm = Imm;
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MI->flat_insn.sysz.op_count++;
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}
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}
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}
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static void printU4ImmOperand(MCInst *MI, int OpNum, SStream *O)
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{
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int64_t Value = MCOperand_getImm(MCInst_getOperand(MI, OpNum));
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// assert(isUInt<4>(Value) && "Invalid u4imm argument");
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SStream_concat(O, "0x%"PRIx64, Value);
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if (MI->csh->detail) {
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MI->flat_insn.sysz.operands[MI->flat_insn.sysz.op_count].type = SYSZ_OP_IMM;
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MI->flat_insn.sysz.operands[MI->flat_insn.sysz.op_count].imm = Value;
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MI->flat_insn.sysz.op_count++;
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}
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}
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static void printU6ImmOperand(MCInst *MI, int OpNum, SStream *O)
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{
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uint32_t Value = (uint32_t)MCOperand_getImm(MCInst_getOperand(MI, OpNum));
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// assert(isUInt<6>(Value) && "Invalid u6imm argument");
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SStream_concat(O, "0x%x", Value);
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if (MI->csh->detail) {
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MI->flat_insn.sysz.operands[MI->flat_insn.sysz.op_count].type = SYSZ_OP_IMM;
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MI->flat_insn.sysz.operands[MI->flat_insn.sysz.op_count].imm = Value;
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MI->flat_insn.sysz.op_count++;
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}
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}
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static void printS8ImmOperand(MCInst *MI, int OpNum, SStream *O)
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{
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int8_t Value = (int8_t)MCOperand_getImm(MCInst_getOperand(MI, OpNum));
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// assert(isInt<8>(Value) && "Invalid s8imm argument");
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SStream_concat(O, "0x%x", Value);
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if (MI->csh->detail) {
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MI->flat_insn.sysz.operands[MI->flat_insn.sysz.op_count].type = SYSZ_OP_IMM;
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MI->flat_insn.sysz.operands[MI->flat_insn.sysz.op_count].imm = Value;
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MI->flat_insn.sysz.op_count++;
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}
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}
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static void printU8ImmOperand(MCInst *MI, int OpNum, SStream *O)
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{
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uint8_t Value = (uint8_t)MCOperand_getImm(MCInst_getOperand(MI, OpNum));
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// assert(isUInt<8>(Value) && "Invalid u8imm argument");
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SStream_concat(O, "0x%x", Value);
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if (MI->csh->detail) {
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MI->flat_insn.sysz.operands[MI->flat_insn.sysz.op_count].type = SYSZ_OP_IMM;
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MI->flat_insn.sysz.operands[MI->flat_insn.sysz.op_count].imm = Value;
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MI->flat_insn.sysz.op_count++;
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}
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}
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static void printS16ImmOperand(MCInst *MI, int OpNum, SStream *O)
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{
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int16_t Value = (int16_t)MCOperand_getImm(MCInst_getOperand(MI, OpNum));
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// assert(isInt<16>(Value) && "Invalid s16imm argument");
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SStream_concat(O, "0x%x", Value);
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if (MI->csh->detail) {
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MI->flat_insn.sysz.operands[MI->flat_insn.sysz.op_count].type = SYSZ_OP_IMM;
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MI->flat_insn.sysz.operands[MI->flat_insn.sysz.op_count].imm = Value;
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MI->flat_insn.sysz.op_count++;
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}
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}
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static void printU16ImmOperand(MCInst *MI, int OpNum, SStream *O)
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{
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uint16_t Value = (uint16_t)MCOperand_getImm(MCInst_getOperand(MI, OpNum));
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// assert(isUInt<16>(Value) && "Invalid u16imm argument");
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SStream_concat(O, "0x%x", Value);
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if (MI->csh->detail) {
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MI->flat_insn.sysz.operands[MI->flat_insn.sysz.op_count].type = SYSZ_OP_IMM;
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MI->flat_insn.sysz.operands[MI->flat_insn.sysz.op_count].imm = Value;
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MI->flat_insn.sysz.op_count++;
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}
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}
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static void printS32ImmOperand(MCInst *MI, int OpNum, SStream *O)
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{
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int32_t Value = (int32_t)MCOperand_getImm(MCInst_getOperand(MI, OpNum));
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// assert(isInt<32>(Value) && "Invalid s32imm argument");
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SStream_concat(O, "0x%x", Value);
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if (MI->csh->detail) {
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MI->flat_insn.sysz.operands[MI->flat_insn.sysz.op_count].type = SYSZ_OP_IMM;
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MI->flat_insn.sysz.operands[MI->flat_insn.sysz.op_count].imm = Value;
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MI->flat_insn.sysz.op_count++;
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}
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}
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static void printU32ImmOperand(MCInst *MI, int OpNum, SStream *O)
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{
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uint32_t Value = (uint32_t)MCOperand_getImm(MCInst_getOperand(MI, OpNum));
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// assert(isUInt<32>(Value) && "Invalid u32imm argument");
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SStream_concat(O, "0x%x", Value);
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if (MI->csh->detail) {
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MI->flat_insn.sysz.operands[MI->flat_insn.sysz.op_count].type = SYSZ_OP_IMM;
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MI->flat_insn.sysz.operands[MI->flat_insn.sysz.op_count].imm = Value;
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MI->flat_insn.sysz.op_count++;
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}
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}
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static void printAccessRegOperand(MCInst *MI, int OpNum, SStream *O)
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{
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int64_t Value = MCOperand_getImm(MCInst_getOperand(MI, OpNum));
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// assert(Value < 16 && "Invalid access register number");
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SStream_concat(O, "%%a%u", (unsigned int)Value);
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/*
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if (MI->csh->detail) {
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MI->flat_insn.sysz.operands[MI->flat_insn.sysz.op_count].type = SYSZ_OP_IMM;
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MI->flat_insn.sysz.operands[MI->flat_insn.sysz.op_count].imm = Value;
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MI->flat_insn.sysz.op_count++;
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}
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*/
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}
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static void printPCRelOperand(MCInst *MI, int OpNum, SStream *O)
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{
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MCOperand *MO = MCInst_getOperand(MI, OpNum);
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if (MCOperand_isImm(MO))
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SStream_concat(O, "0x%x", MCOperand_getImm(MO));
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}
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static void printOperand(MCInst *MI, int OpNum, SStream *O)
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{
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_printOperand(MI, MCInst_getOperand(MI, OpNum), O);
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}
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static void printBDAddrOperand(MCInst *MI, int OpNum, SStream *O)
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{
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printAddress(MI, MCOperand_getReg(MCInst_getOperand(MI, OpNum)),
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MCOperand_getImm(MCInst_getOperand(MI, OpNum + 1)), 0, O);
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}
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static void printBDXAddrOperand(MCInst *MI, int OpNum, SStream *O)
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{
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printAddress(MI, MCOperand_getReg(MCInst_getOperand(MI, OpNum)),
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MCOperand_getImm(MCInst_getOperand(MI, OpNum + 1)),
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MCOperand_getReg(MCInst_getOperand(MI, OpNum + 2)), O);
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}
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static void printBDLAddrOperand(MCInst *MI, int OpNum, SStream *O)
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{
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unsigned Base = MCOperand_getReg(MCInst_getOperand(MI, OpNum));
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uint64_t Disp = MCOperand_getImm(MCInst_getOperand(MI, OpNum + 1));
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uint64_t Length = MCOperand_getImm(MCInst_getOperand(MI, OpNum + 2));
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SStream_concat(O, "0x%"PRIx64"(0x%"PRIx64, Disp, Length);
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if (Base)
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SStream_concat(O, ", %s", getRegisterName(Base));
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SStream_concat(O, ")");
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MI->flat_insn.sysz.operands[MI->flat_insn.sysz.op_count].type = SYSZ_OP_MEM;
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MI->flat_insn.sysz.operands[MI->flat_insn.sysz.op_count].mem.base = (uint8_t)SystemZ_map_register(Base);
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MI->flat_insn.sysz.operands[MI->flat_insn.sysz.op_count].mem.index = Length;
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MI->flat_insn.sysz.operands[MI->flat_insn.sysz.op_count].mem.disp = Disp;
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MI->flat_insn.sysz.op_count++;
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}
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static void printCond4Operand(MCInst *MI, int OpNum, SStream *O)
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{
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static const char *const CondNames[] = {
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"o", "h", "nle", "l", "nhe", "lh", "ne",
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"e", "nlh", "he", "nl", "le", "nh", "no"
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};
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uint64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, OpNum));
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// assert(Imm > 0 && Imm < 15 && "Invalid condition");
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SStream_concat(O, CondNames[Imm - 1]);
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if (MI->csh->detail)
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MI->flat_insn.sysz.cc = (sysz_cc)Imm;
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}
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#define PRINT_ALIAS_INSTR
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#include "SystemZGenAsmWriter.inc"
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void SystemZ_printInst(MCInst *MI, SStream *O, void *Info)
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{
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printInstruction(MI, O, Info);
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}
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