mirror of
https://github.com/capstone-engine/capstone.git
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226 lines
7.1 KiB
C
226 lines
7.1 KiB
C
/* Capstone Disassembler Engine */
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/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013> */
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#include <stdio.h>
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#include <stdlib.h>
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#include <inttypes.h>
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#include <capstone.h>
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static csh handle;
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struct platform {
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cs_arch arch;
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cs_mode mode;
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unsigned char *code;
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size_t size;
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char *comment;
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};
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static void print_string_hex(char *comment, unsigned char *str, int len)
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{
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unsigned char *c;
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printf("%s", comment);
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for (c = str; c < str + len; c++) {
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printf("0x%02x ", *c & 0xff);
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}
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printf("\n");
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}
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static void print_insn_detail(cs_arch mode, cs_insn *ins)
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{
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cs_arm *arm = &(ins->arm);
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if (arm->op_count)
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printf("\top_count: %u\n", arm->op_count);
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int i;
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for (i = 0; i < arm->op_count; i++) {
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cs_arm_op *op = &(arm->operands[i]);
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switch((int)op->type) {
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default:
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break;
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case ARM_OP_REG:
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printf("\t\toperands[%u].type: REG = %s\n", i, cs_reg_name(handle, op->reg));
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break;
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case ARM_OP_IMM:
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printf("\t\toperands[%u].type: IMM = 0x%x\n", i, op->imm);
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break;
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case ARM_OP_FP:
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printf("\t\toperands[%u].type: FP = %f\n", i, op->fp);
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break;
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case ARM_OP_MEM:
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printf("\t\toperands[%u].type: MEM\n", i);
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if (op->mem.base != X86_REG_INVALID)
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printf("\t\t\toperands[%u].mem.base: REG = %s\n",
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i, cs_reg_name(handle, op->mem.base));
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if (op->mem.index != X86_REG_INVALID)
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printf("\t\t\toperands[%u].mem.index: REG = %s\n",
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i, cs_reg_name(handle, op->mem.index));
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if (op->mem.scale != 1)
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printf("\t\t\toperands[%u].mem.scale: %u\n", i, op->mem.scale);
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if (op->mem.disp != 0)
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printf("\t\t\toperands[%u].mem.disp: 0x%x\n", i, op->mem.disp);
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break;
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case ARM_OP_PIMM:
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printf("\t\toperands[%u].type: P-IMM = %u\n", i, op->imm);
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break;
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case ARM_OP_CIMM:
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printf("\t\toperands[%u].type: C-IMM = %u\n", i, op->imm);
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break;
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}
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if (op->shift.type != ARM_SFT_INVALID && op->shift.value) {
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if (op->shift.type < ARM_SFT_ASR_REG)
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// shift with constant value
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printf("\t\t\tShift: %u = %u\n", op->shift.type, op->shift.value);
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else
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// shift with register
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printf("\t\t\tShift: %u = %s\n", op->shift.type,
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cs_reg_name(handle, op->shift.value));
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}
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}
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if (arm->cc != ARM_CC_AL && arm->cc != ARM_CC_INVALID)
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printf("\tCode condition: %u\n", ins->arm.cc);
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if (arm->update_flags)
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printf("\tUpdate-flags: True\n");
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if (arm->writeback)
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printf("\tWrite-back: True\n");
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printf("\n");
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}
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static void test()
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{
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//#define ARM_CODE "\x04\xe0\x2d\xe5" // str lr, [sp, #-0x4]!
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//#define ARM_CODE "\xe0\x83\x22\xe5" // str r8, [r2, #-0x3e0]!
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//#define ARM_CODE "\xf1\x02\x03\x0e" // mcreq p0x2, #0x0, r0, c0x3, c0x1, #0x7
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//#define ARM_CODE "\x00\x00\xa0\xe3" // mov r0, #0x0
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//#define ARM_CODE "\x02\x30\xc1\xe7" // strb r3, [r1, r2]
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//#define ARM_CODE "\x00\x00\x53\xe3" // cmp r3, #0x0
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//#define ARM_CODE "\x02\x00\xa1\xe2" // adc r0, r1, r2
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//#define ARM_CODE "\x21\x01\xa0\xe0" // adc r0, r0, r1, lsr #2
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//#define ARM_CODE "\x21\x01\xb0\xe0" // adcs r0, r0, r1, lsr #2
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//#define ARM_CODE "\x32\x03\xa1\xe0" // adc r0, r1, r2, lsr r3
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//#define ARM_CODE "\x22\x01\xa1\xe0" // adc r0, r1, r2, lsr #2
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//#define ARM_CODE "\x65\x61\x4f\x50" // subpl r6, pc, r5, ror #2
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//#define ARM_CODE "\x30\x30\x53\xe5" // ldrb r3, [r3, #-0x30]
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//#define ARM_CODE "\xb6\x10\xdf\xe1" // ldrh r1, [pc, #0x6]
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//#define ARM_CODE "\x02\x00\x9f\xef" // svc #0x9f0002
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//#define ARM_CODE "\x00\xc0\x27\xea" // b 0x9F0002: FIXME: disasm as "b #0x9f0000"
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//#define ARM_CODE "\x12\x13\xa0\xe1" // lsl r1, r2, r3
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//#define ARM_CODE "\x82\x11\xa0\xe1" // lsl r1, r2, #0x3
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//#define ARM_CODE "\x00\xc0\xa0\xe1" // mov ip, r0
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//#define ARM_CODE "\x02\x00\x12\xe3" // tst r2, #2
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//#define ARM_CODE "\x51\x12\xa0\xe1" // asr r1, r2
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//#define ARM_CODE "\x72\x10\xef\xe6" // uxtb r1, r2
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//#define ARM_CODE "\xe0\x0a\xb7\xee" // vcvt.f64.f32 d0, s1
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//#define ARM_CODE "\x9f\x0f\x91\xe1" // ldrex r0, [r1]
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//#define ARM_CODE "\x0f\x06\x20\xf4" // vld1.8 {d0, d1, d2}, [r0]
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//#define ARM_CODE "\x72\x00\xa1\xe6" // sxtab r0, r1, r2
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//#define ARM_CODE "\x50\x06\x84\xf2" // vmov.i32 q0, #0x40000000
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//#define ARM_CODE "\x73\xe0\xb8\xee" // mrc p0, #5, lr, c8, c3, #3
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//#define ARM_CODE "\x12\x02\x81\xe6" // pkhbt r0, r1, r2, lsl #0x4
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//#define ARM_CODE "\x12\x00\xa0\xe6" // ssat r0, #0x1, r2
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//#define ARM_CODE "\x03\x60\x2d\xe9" // push {r0, r1, sp, lr}
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//#define ARM_CODE "\x8f\x40\x60\xf4" // vld4.32 {d20, d21, d22, d23}, [r0]
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//#define ARM_CODE "\xd0\x00\xc2\xe1" // ldrd r0, r1, [r2]
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//#define ARM_CODE "\x08\xf0\xd0\xf5" // pld [r0, #0x8]
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//#define ARM_CODE "\x10\x8b\xbc\xec" // ldc p11, c8, [r12], #64
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//#define ARM_CODE "\xd4\x30\xd2\xe1" // ldrsb r3, [r2, #0x4]
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//#define ARM_CODE "\x11\x0f\xbe\xf2" // vcvt.s32.f32 d0, d1, #2
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//#define ARM_CODE "\x01\x01\x70\xe1" // cmn r0, r1, lsl #2
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//#define ARM_CODE "\x06\x00\x91\xe2" // adds r0, r1, #6
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//#define ARM_CODE "\x5b\xf0\x7f\xf5" // dmb ish
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//#define ARM_CODE "\xf7\xff\xff\xfe"
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#define ARM_CODE "\xED\xFF\xFF\xEB\x04\xe0\x2d\xe5\x00\x00\x00\x00\xe0\x83\x22\xe5\xf1\x02\x03\x0e\x00\x00\xa0\xe3\x02\x30\xc1\xe7\x00\x00\x53\xe3"
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//#define ARM_CODE2 "\xf0\x24"
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//#define ARM_CODE2 "\x83\xb0"
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#define ARM_CODE2 "\xd1\xe8\x00\xf0\xf0\x24\x04\x07\x1f\x3c\xf2\xc0\x00\x00\x4f\xf0\x00\x01\x46\x6c"
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//#define THUMB_CODE "\x70\x47" // bl 0x26
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//#define THUMB_CODE "\x07\xdd" // ble 0x1c
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#define THUMB_CODE "\x70\x47\xeb\x46\x83\xb0\xc9\x68\x1f\xb1"
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#define THUMB_CODE2 "\x4f\xf0\x00\x01\xbd\xe8\x00\x88\xd1\xe8\x00\xf0"
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struct platform platforms[] = {
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{
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.arch = CS_ARCH_ARM,
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.mode = CS_MODE_ARM,
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.code = (unsigned char *)ARM_CODE,
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.size = sizeof(ARM_CODE) - 1,
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.comment = "ARM"
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},
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{
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.arch = CS_ARCH_ARM,
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.mode = CS_MODE_THUMB,
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.code = (unsigned char *)THUMB_CODE,
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.size = sizeof(THUMB_CODE) - 1,
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.comment = "Thumb"
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},
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{
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.arch = CS_ARCH_ARM,
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.mode = CS_MODE_THUMB,
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.code = (unsigned char *)ARM_CODE2,
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.size = sizeof(ARM_CODE2) - 1,
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.comment = "Thumb-mixed"
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},
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{
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.arch = CS_ARCH_ARM,
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.mode = CS_MODE_THUMB,
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.code = (unsigned char *)THUMB_CODE2,
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.size = sizeof(THUMB_CODE2) - 1,
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.comment = "Thumb-2"
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},
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};
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size_t address = 0x1000;
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cs_insn *insn;
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int i;
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for (i = 0; i < sizeof(platforms)/sizeof(platforms[0]); i++) {
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if (cs_open(platforms[i].arch, platforms[i].mode, &handle))
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return;
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size_t count = cs_disasm_dyn(handle, platforms[i].code, platforms[i].size, address, 0, &insn);
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if (count) {
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printf("****************\n");
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printf("Platform: %s\n", platforms[i].comment);
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print_string_hex("Code:", platforms[i].code, platforms[i].size);
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printf("Disasm:\n");
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size_t j;
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for (j = 0; j < count; j++) {
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printf("0x%"PRIx64":\t%s\t%s\n", (uint64_t)insn[j].address, insn[j].mnemonic, insn[j].op_str);
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print_insn_detail(platforms[i].mode, &insn[j]);
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}
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printf("0x%"PRIx64":\n", (uint64_t)insn[j-1].address + insn[j-1].size);
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// free memory allocated by cs_disasm_dyn()
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cs_free(insn);
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} else {
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printf("****************\n");
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printf("Platform: %s\n", platforms[i].comment);
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print_string_hex("Code:", platforms[i].code, platforms[i].size);
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printf("ERROR: Failed to disasm given code!\n");
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}
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printf("\n");
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cs_close(handle);
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}
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}
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int main()
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{
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test();
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return 0;
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}
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