| .. |
|
AArch64
|
arm64: some POST instructions miss IMM operand. this fixes issue #1627
|
2020-05-10 01:39:57 +08:00 |
|
ARM
|
fix: Remove wrong write in ARM_t2STMDB_UPD instruction (#1588)
|
2020-02-21 09:56:35 +08:00 |
|
BPF
|
Constify backends (#1549)
|
2019-12-23 20:30:57 +08:00 |
|
EVM
|
Constify backends (#1549)
|
2019-12-23 20:30:57 +08:00 |
|
M68K
|
Constify backends (#1549)
|
2019-12-23 20:30:57 +08:00 |
|
M680X
|
Constify backends (#1549)
|
2019-12-23 20:30:57 +08:00 |
|
Mips
|
Constify backends (#1549)
|
2019-12-23 20:30:57 +08:00 |
|
MOS65XX
|
Constify backends (#1549)
|
2019-12-23 20:30:57 +08:00 |
|
PowerPC
|
Constify backends (#1549)
|
2019-12-23 20:30:57 +08:00 |
|
RISCV
|
[RISCV] Use CS_ASSERT (#1493)
|
2019-05-23 08:25:36 +07:00 |
|
Sparc
|
Constify backends (#1549)
|
2019-12-23 20:30:57 +08:00 |
|
SystemZ
|
Constify backends (#1549)
|
2019-12-23 20:30:57 +08:00 |
|
TMS320C64x
|
Constify backends (#1549)
|
2019-12-23 20:30:57 +08:00 |
|
WASM
|
Constify backends (#1549)
|
2019-12-23 20:30:57 +08:00 |
|
X86
|
Bug solved: SSE variant of MOVSD incorrectly decoded as REPNE MOVSD (#1540)
|
2020-02-21 09:58:32 +08:00 |
|
XCore
|
Constify backends (#1549)
|
2019-12-23 20:30:57 +08:00 |
