.. |
AArch64
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Add more cases for LD1 instruction immediate fixups (#1632)
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2020-05-10 10:03:52 +08:00 |
ARM
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fix: Remove wrong write in ARM_t2STMDB_UPD instruction (#1588)
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2020-02-21 09:56:35 +08:00 |
BPF
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Constify backends (#1549)
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2019-12-23 20:30:57 +08:00 |
EVM
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Constify backends (#1549)
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2019-12-23 20:30:57 +08:00 |
M68K
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M68K: fix MOVEC operand transfer direction. (#1663)
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2020-07-19 17:06:08 +08:00 |
M680X
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Constify backends (#1549)
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2019-12-23 20:30:57 +08:00 |
Mips
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Constify backends (#1549)
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2019-12-23 20:30:57 +08:00 |
MOS65XX
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Constify backends (#1549)
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2019-12-23 20:30:57 +08:00 |
PowerPC
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Constify backends (#1549)
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2019-12-23 20:30:57 +08:00 |
RISCV
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[RISCV] Use CS_ASSERT (#1493)
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2019-05-23 08:25:36 +07:00 |
Sparc
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Constify backends (#1549)
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2019-12-23 20:30:57 +08:00 |
SystemZ
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Constify backends (#1549)
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2019-12-23 20:30:57 +08:00 |
TMS320C64x
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Constify backends (#1549)
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2019-12-23 20:30:57 +08:00 |
WASM
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Constify backends (#1549)
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2019-12-23 20:30:57 +08:00 |
X86
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fix bug in displacement offset (#1600)
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2020-05-11 02:20:13 +08:00 |
XCore
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Constify backends (#1549)
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2019-12-23 20:30:57 +08:00 |