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https://github.com/capstone-engine/capstone.git
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292116bd0d
* Declare global arch arrays with contents (#1171) This eliminates the need for archs_enable() and eliminates the racey initialization. This makes the architecture-specific init and option functions non-static so that they may be called from a different file. Cherry-picked 853a2870 * Add cs_arch_disallowed_mode_mask global Cherry-pick 94bce437: mips: CS_MODE_MIPS32R6 implies CS_MODE_32 Cherry-pick 8998a3a1: ppc: fix endian check (#1029) Fixes bug where endianness could not be set for ppc. Remove `big_endian` field of `cs_struct`. Added a helper macro `MODE_IS_BIG_ENDIAN()` to check if `CS_MODE_BIG_ENDIAN` is set. Refactored `cs_open()` check for valid mode out of arch-specific code into arch-independent code. Also added a valid mode check to `cs_option()`. The checks use a new global array `cs_arch_disallowed_mode_mask[]`. * Make global arrays static Make all_arch uint32_t to guarantee a certain number of bits (with adequate room for growth).
90 lines
2.8 KiB
C
90 lines
2.8 KiB
C
/* Capstone Disassembly Engine */
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/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2015 */
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#ifndef CS_PRIV_H
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#define CS_PRIV_H
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#include <capstone/capstone.h>
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#include "MCInst.h"
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#include "SStream.h"
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typedef void (*Printer_t)(MCInst *MI, SStream *OS, void *info);
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// function to be called after Printer_t
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// this is the best time to gather insn's characteristics
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typedef void (*PostPrinter_t)(csh handle, cs_insn *, char *mnem, MCInst *mci);
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typedef bool (*Disasm_t)(csh handle, const uint8_t *code, size_t code_len, MCInst *instr, uint16_t *size, uint64_t address, void *info);
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typedef const char *(*GetName_t)(csh handle, unsigned int id);
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typedef void (*GetID_t)(cs_struct *h, cs_insn *insn, unsigned int id);
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// return register name, given register ID
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typedef char *(*GetRegisterName_t)(unsigned RegNo);
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// return registers accessed by instruction
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typedef void (*GetRegisterAccess_t)(const cs_insn *insn,
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cs_regs regs_read, uint8_t *regs_read_count,
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cs_regs regs_write, uint8_t *regs_write_count);
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// for ARM only
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typedef struct ARM_ITStatus {
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unsigned char ITStates[8];
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unsigned int size;
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} ARM_ITStatus;
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// Customize mnemonic for instructions with alternative name.
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struct customized_mnem {
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// ID of instruction to be customized.
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unsigned int id;
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// Customized instruction mnemonic.
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char mnemonic[CS_MNEMONIC_SIZE];
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};
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struct insn_mnem {
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struct customized_mnem insn;
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struct insn_mnem *next; // linked list of customized mnemonics
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};
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struct cs_struct {
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cs_arch arch;
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cs_mode mode;
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Printer_t printer; // asm printer
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void *printer_info; // aux info for printer
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Disasm_t disasm; // disassembler
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void *getinsn_info; // auxiliary info for printer
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GetName_t reg_name;
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GetName_t insn_name;
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GetName_t group_name;
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GetID_t insn_id;
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PostPrinter_t post_printer;
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cs_err errnum;
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ARM_ITStatus ITBlock; // for Arm only
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cs_opt_value detail, imm_unsigned;
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int syntax; // asm syntax for simple printer such as ARM, Mips & PPC
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bool doing_mem; // handling memory operand in InstPrinter code
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unsigned short *insn_cache; // index caching for mapping.c
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GetRegisterName_t get_regname;
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bool skipdata; // set this to True if we skip data when disassembling
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uint8_t skipdata_size; // how many bytes to skip
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cs_opt_skipdata skipdata_setup; // user-defined skipdata setup
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uint8_t *regsize_map; // map to register size (x86-only for now)
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GetRegisterAccess_t reg_access;
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struct insn_mnem *mnem_list; // linked list of customized instruction mnemonic
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};
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#define MAX_ARCH CS_ARCH_MAX
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// Returns a bool (0 or 1) whether big endian is enabled for a mode
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#define MODE_IS_BIG_ENDIAN(mode) (((mode) & CS_MODE_BIG_ENDIAN) != 0)
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extern cs_malloc_t cs_mem_malloc;
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extern cs_calloc_t cs_mem_calloc;
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extern cs_realloc_t cs_mem_realloc;
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extern cs_free_t cs_mem_free;
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extern cs_vsnprintf_t cs_vsnprintf;
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#endif
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