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capstone/arch/RISCV
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Richard Henderson 9a29b6afa7 RISC-V CSR output (#1690) 
* riscv: Fix printAliasInstr

We do not want to append the entire string, only the
single non-argument character.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

* riscv: Implement printCSRSystemRegister

While upstream LLVM probably has a tablegen thing for these
somewhere, the current import doesn't include them.  Take the
list from riscv-privileged-v1.10.pdf.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-03-07 21:28:43 +08:00
..
RISCVBaseInfo.h [RISCV] Use CS_ASSERT (#1493) 2019-05-23 08:25:36 +07:00
RISCVDisassembler.c Two RISC-V fixes (#1682) 2020-09-16 17:04:18 +08:00
RISCVDisassembler.h RISCV support ISRV32/ISRV64 (#1401) 2019-03-09 08:41:12 +08:00
RISCVGenAsmWriter.inc RISC-V CSR output (#1690) 2021-03-07 21:28:43 +08:00
RISCVGenDisassemblerTables.inc [RISCV] Use CS_ASSERT (#1493) 2019-05-23 08:25:36 +07:00
RISCVGenInsnNameMaps.inc RISCV support ISRV32/ISRV64 (#1401) 2019-03-09 08:41:12 +08:00
RISCVGenInstrInfo.inc RISCV support ISRV32/ISRV64 (#1401) 2019-03-09 08:41:12 +08:00
RISCVGenRegisterInfo.inc RISCV support ISRV32/ISRV64 (#1401) 2019-03-09 08:41:12 +08:00
RISCVGenSubtargetInfo.inc RISCV support ISRV32/ISRV64 (#1401) 2019-03-09 08:41:12 +08:00
RISCVInstPrinter.c RISC-V CSR output (#1690) 2021-03-07 21:28:43 +08:00
RISCVInstPrinter.h RISCV support ISRV32/ISRV64 (#1401) 2019-03-09 08:41:12 +08:00
RISCVMapping.c riscv: coding style cleanup 2019-03-09 08:47:11 +08:00
RISCVMapping.h RISCV support ISRV32/ISRV64 (#1401) 2019-03-09 08:41:12 +08:00
RISCVMappingInsn.inc RISCV support ISRV32/ISRV64 (#1401) 2019-03-09 08:41:12 +08:00
RISCVModule.c RISCV support ISRV32/ISRV64 (#1401) 2019-03-09 08:41:12 +08:00
RISCVModule.h RISCV support ISRV32/ISRV64 (#1401) 2019-03-09 08:41:12 +08:00