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https://github.com/capstone-engine/capstone.git
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81 lines
3.2 KiB
Python
Executable File
81 lines
3.2 KiB
Python
Executable File
#!/usr/bin/env python
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# Capstone Python bindings, by Nguyen Anh Quynnh <aquynh@gmail.com>
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from capstone import *
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X86_CODE16 = "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00"
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X86_CODE32 = "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00"
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X86_CODE64 = "\x55\x48\x8b\x05\xb8\x13\x00\x00"
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ARM_CODE = "\xED\xFF\xFF\xEB\x04\xe0\x2d\xe5\x00\x00\x00\x00\xe0\x83\x22\xe5\xf1\x02\x03\x0e\x00\x00\xa0\xe3\x02\x30\xc1\xe7\x00\x00\x53\xe3"
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ARM_CODE2 = "\x10\xf1\x10\xe7\x11\xf2\x31\xe7\xdc\xa1\x2e\xf3\xe8\x4e\x62\xf3"
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THUMB_CODE = "\x70\x47\xeb\x46\x83\xb0\xc9\x68"
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THUMB_CODE2 = "\x4f\xf0\x00\x01\xbd\xe8\x00\x88"
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MIPS_CODE = "\x0C\x10\x00\x97\x00\x00\x00\x00\x24\x02\x00\x0c\x8f\xa2\x00\x00\x34\x21\x34\x56"
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MIPS_CODE2 = "\x56\x34\x21\x34\xc2\x17\x01\x00"
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ARM64_CODE = "\x21\x7c\x02\x9b\x21\x7c\x00\x53\x00\x40\x21\x4b\xe1\x0b\x40\xb9"
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PPC_CODE = "\x80\x20\x00\x00\x80\x3f\x00\x00\x10\x43\x23\x0e\xd0\x44\x00\x80\x4c\x43\x22\x02\x2d\x03\x00\x80\x7c\x43\x20\x14\x7c\x43\x20\x93\x4f\x20\x00\x21\x4c\xc8\x00\x21"
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all_tests = (
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(CS_ARCH_X86, CS_MODE_16, X86_CODE16, "X86 16bit (Intel syntax)", 0),
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(CS_ARCH_X86, CS_MODE_32, X86_CODE32, "X86 32bit (ATT syntax)", CS_OPT_SYNTAX_ATT),
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(CS_ARCH_X86, CS_MODE_32, X86_CODE32, "X86 32 (Intel syntax)", 0),
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(CS_ARCH_X86, CS_MODE_64, X86_CODE64, "X86 64 (Intel syntax)", 0),
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(CS_ARCH_ARM, CS_MODE_ARM, ARM_CODE, "ARM", 0),
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(CS_ARCH_ARM, CS_MODE_ARM, ARM_CODE2, "ARM: Cortex-A15 + NEON", 0),
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(CS_ARCH_ARM, CS_MODE_THUMB, THUMB_CODE, "THUMB", 0),
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(CS_ARCH_ARM, CS_MODE_THUMB, THUMB_CODE2, "THUMB-2", 0),
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(CS_ARCH_ARM64, CS_MODE_ARM, ARM64_CODE, "ARM-64", 0),
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(CS_ARCH_MIPS, CS_MODE_32 + CS_MODE_BIG_ENDIAN, MIPS_CODE, "MIPS-32 (Big-endian)", 0),
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(CS_ARCH_MIPS, CS_MODE_64+ CS_MODE_LITTLE_ENDIAN, MIPS_CODE2, "MIPS-64-EL (Little-endian)", 0),
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(CS_ARCH_PPC, CS_MODE_BIG_ENDIAN, PPC_CODE, "PPC-64", 0),
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)
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### Test class Cs
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def test_class():
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def print_detail(insn):
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if len(insn.regs_read) > 0:
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print("\tImplicit registers read: "),
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for m in insn.regs_read:
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print("%s " %insn.reg_name(m)),
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print
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if len(insn.regs_write) > 0:
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print("\tImplicit registers modified: "),
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for m in insn.regs_write:
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print("%s " %insn.reg_name(m)),
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print
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if len(insn.groups) > 0:
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print("\tThis instruction belongs to groups:"),
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for m in insn.groups:
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print("%u" %m),
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print
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for (arch, mode, code, comment, syntax) in all_tests:
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print('*' * 40)
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print("Platform: %s" %comment)
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print("Disasm:")
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try:
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md = Cs(arch, mode)
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md.detail = True
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if syntax != 0:
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md.syntax = syntax
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for insn in md.disasm(code, 0x1000):
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print("0x%x:\t%s\t%s // insn-ID: %u, insn-mnem: %s" \
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%(insn.address, insn.mnemonic, insn.op_str, insn.id, \
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insn.insn_name()))
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print_detail(insn)
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print
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except CsError as e:
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print("ERROR: %s" %e)
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test_class()
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